tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'soc-fixes-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
"These are the latest bug fixes that have come up in the soc tree. Most
of these are fairly minor. Most notably, the majority of changes this
time are not for dts files as usual.

- Updates to the addresses of the broadcom and aspeed entries in the
MAINTAINERS file.

- Defconfig updates to address a regression on samsung and a build
warning from an unknown Kconfig symbol

- Build fixes for the StrongARM and Uniphier platforms

- Code fixes for SCMI and FF-A firmware drivers, both of which had a
simple bug that resulted in invalid data, and a lesser fix for the
optee firmware driver

- Multiple fixes for the recently added loongson/loongarch "guts" soc
driver

- Devicetree fixes for RISC-V on the startfive platform, addressing
issues with NOR flash, usb and uart.

- Multiple fixes for NXP i.MX8/i.MX9 dts files, fixing problems with
clock, gpio, hdmi settings and the Makefile

- Bug fixes for i.MX firmware code and the OCOTP soc driver

- Multiple fixes for the TI sysc bus driver

- Minor dts updates for TI omap dts files, to address boot time
warnings and errors"

* tag 'soc-fixes-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (35 commits)
MAINTAINERS: Fix Florian Fainelli's email address
arm64: defconfig: enable syscon-poweroff driver
ARM: locomo: fix locomolcd_power declaration
soc: loongson: loongson2_guts: Remove unneeded semicolon
soc: loongson: loongson2_guts: Convert to devm_platform_ioremap_resource()
soc: loongson: loongson_pm2: Populate children syscon nodes
dt-bindings: soc: loongson,ls2k-pmc: Allow syscon-reboot/syscon-poweroff as child
soc: loongson: loongson_pm2: Drop useless of_device_id compatible
dt-bindings: soc: loongson,ls2k-pmc: Use fallbacks for ls2k-pmc compatible
soc: loongson: loongson_pm2: Add dependency for INPUT
arm64: defconfig: remove CONFIG_COMMON_CLK_NPCM8XX=y
ARM: uniphier: fix cache kernel-doc warnings
MAINTAINERS: aspeed: Update Andrew's email address
MAINTAINERS: aspeed: Update git tree URL
firmware: arm_ffa: Don't set the memory region attributes for MEM_LEND
arm64: dts: imx: Add imx8mm-prt8mm.dtb to build
arm64: dts: imx8mm-evk: Fix hdmi@3d node
soc: imx8m: Enable OCOTP clock for imx8mm before reading registers
arm64: dts: imx8mp-beacon-kit: Fix audio_pll2 clock
arm64: dts: imx8mp: Fix SDMA2/3 clocks
...

Linus Torvalds e402b086 3b347e40

+179 -90
+37 -6
Documentation/devicetree/bindings/soc/loongson/loongson,ls2k-pmc.yaml
··· 11 11 12 12 properties: 13 13 compatible: 14 - items: 15 - - enum: 16 - - loongson,ls2k0500-pmc 17 - - loongson,ls2k1000-pmc 18 - - const: syscon 14 + oneOf: 15 + - items: 16 + - const: loongson,ls2k0500-pmc 17 + - const: syscon 18 + - items: 19 + - enum: 20 + - loongson,ls2k1000-pmc 21 + - loongson,ls2k2000-pmc 22 + - const: loongson,ls2k0500-pmc 23 + - const: syscon 19 24 20 25 reg: 21 26 maxItems: 1 ··· 37 32 addition, the PM need according to it to indicate that current 38 33 SoC whether support Suspend To RAM. 39 34 35 + syscon-poweroff: 36 + $ref: /schemas/power/reset/syscon-poweroff.yaml# 37 + type: object 38 + description: 39 + Node for power off method 40 + 41 + syscon-reboot: 42 + $ref: /schemas/power/reset/syscon-reboot.yaml# 43 + type: object 44 + description: 45 + Node for reboot method 46 + 40 47 required: 41 48 - compatible 42 49 - reg ··· 61 44 #include <dt-bindings/interrupt-controller/irq.h> 62 45 63 46 power-management@1fe27000 { 64 - compatible = "loongson,ls2k1000-pmc", "syscon"; 47 + compatible = "loongson,ls2k1000-pmc", "loongson,ls2k0500-pmc", "syscon"; 65 48 reg = <0x1fe27000 0x58>; 66 49 interrupt-parent = <&liointc1>; 67 50 interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 68 51 loongson,suspend-address = <0x0 0x1c000500>; 52 + 53 + syscon-reboot { 54 + compatible = "syscon-reboot"; 55 + offset = <0x30>; 56 + mask = <0x1>; 57 + }; 58 + 59 + syscon-poweroff { 60 + compatible = "syscon-poweroff"; 61 + regmap = <&pmc>; 62 + offset = <0x14>; 63 + mask = <0x3c00>; 64 + value = <0x3c00>; 65 + }; 69 66 };
+5 -5
MAINTAINERS
··· 1963 1963 1964 1964 ARM/ASPEED MACHINE SUPPORT 1965 1965 M: Joel Stanley <joel@jms.id.au> 1966 - R: Andrew Jeffery <andrew@aj.id.au> 1966 + R: Andrew Jeffery <andrew@codeconstruct.com.au> 1967 1967 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 1968 1968 L: linux-aspeed@lists.ozlabs.org (moderated for non-subscribers) 1969 1969 S: Supported 1970 1970 Q: https://patchwork.ozlabs.org/project/linux-aspeed/list/ 1971 - T: git git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed.git 1971 + T: git git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc.git 1972 1972 F: Documentation/devicetree/bindings/arm/aspeed/ 1973 1973 F: arch/arm/boot/dts/aspeed/ 1974 1974 F: arch/arm/mach-aspeed/ ··· 3058 3058 F: drivers/peci/controller/peci-aspeed.c 3059 3059 3060 3060 ASPEED PINCTRL DRIVERS 3061 - M: Andrew Jeffery <andrew@aj.id.au> 3061 + M: Andrew Jeffery <andrew@codeconstruct.com.au> 3062 3062 L: linux-aspeed@lists.ozlabs.org (moderated for non-subscribers) 3063 3063 L: openbmc@lists.ozlabs.org (moderated for non-subscribers) 3064 3064 L: linux-gpio@vger.kernel.org ··· 3075 3075 F: include/dt-bindings/interrupt-controller/aspeed-scu-ic.h 3076 3076 3077 3077 ASPEED SD/MMC DRIVER 3078 - M: Andrew Jeffery <andrew@aj.id.au> 3078 + M: Andrew Jeffery <andrew@codeconstruct.com.au> 3079 3079 L: linux-aspeed@lists.ozlabs.org (moderated for non-subscribers) 3080 3080 L: openbmc@lists.ozlabs.org (moderated for non-subscribers) 3081 3081 L: linux-mmc@vger.kernel.org ··· 4082 4082 4083 4083 BROADCOM BRCMSTB GPIO DRIVER 4084 4084 M: Doug Berger <opendmb@gmail.com> 4085 - M: Florian Fainelli <florian.fainelli@broadcom> 4085 + M: Florian Fainelli <florian.fainelli@broadcom.com> 4086 4086 R: Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com> 4087 4087 S: Supported 4088 4088 F: Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.yaml
+3 -2
arch/arm/boot/dts/ti/omap/motorola-mapphone-common.dtsi
··· 614 614 /* Configure pwm clock source for timers 8 & 9 */ 615 615 &timer8 { 616 616 assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>; 617 - assigned-clock-parents = <&sys_clkin_ck>; 617 + assigned-clock-parents = <&sys_32k_ck>; 618 618 }; 619 619 620 620 &timer9 { 621 621 assigned-clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>; 622 - assigned-clock-parents = <&sys_clkin_ck>; 622 + assigned-clock-parents = <&sys_32k_ck>; 623 623 }; 624 624 625 625 /* ··· 640 640 &uart3 { 641 641 interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH 642 642 &omap4_pmx_core 0x17c>; 643 + overrun-throttle-ms = <500>; 643 644 }; 644 645 645 646 &uart4 {
+1 -2
arch/arm/boot/dts/ti/omap/omap3-cpu-thermal.dtsi
··· 12 12 polling-delay = <1000>; /* milliseconds */ 13 13 coefficients = <0 20000>; 14 14 15 - /* sensor ID */ 16 - thermal-sensors = <&bandgap 0>; 15 + thermal-sensors = <&bandgap>; 17 16 18 17 cpu_trips: trips { 19 18 cpu_alert0: cpu_alert {
+4 -1
arch/arm/boot/dts/ti/omap/omap4-cpu-thermal.dtsi
··· 12 12 polling-delay-passive = <250>; /* milliseconds */ 13 13 polling-delay = <1000>; /* milliseconds */ 14 14 15 - /* sensor ID */ 15 + /* 16 + * See 44xx files for single sensor addressing, omap5 and dra7 need 17 + * also sensor ID for addressing. 18 + */ 16 19 thermal-sensors = <&bandgap 0>; 17 20 18 21 cpu_trips: trips {
+1
arch/arm/boot/dts/ti/omap/omap443x.dtsi
··· 69 69 }; 70 70 71 71 &cpu_thermal { 72 + thermal-sensors = <&bandgap>; 72 73 coefficients = <0 20000>; 73 74 }; 74 75
+1
arch/arm/boot/dts/ti/omap/omap4460.dtsi
··· 79 79 }; 80 80 81 81 &cpu_thermal { 82 + thermal-sensors = <&bandgap>; 82 83 coefficients = <348 (-9301)>; 83 84 }; 84 85
+1 -1
arch/arm/include/asm/hardware/locomo.h
··· 195 195 196 196 #define LOCOMO_DRIVER_NAME(_ldev) ((_ldev)->dev.driver->name) 197 197 198 - void locomo_lcd_power(struct locomo_dev *, int, unsigned int); 198 + extern void locomolcd_power(int on); 199 199 200 200 int locomo_driver_register(struct locomo_driver *); 201 201 void locomo_driver_unregister(struct locomo_driver *);
+2 -2
arch/arm/mach-omap2/pm44xx.c
··· 99 99 * possible causes. 100 100 * http://www.spinics.net/lists/arm-kernel/msg218641.html 101 101 */ 102 - pr_warn("A possible cause could be an old bootloader - try u-boot >= v2012.07\n"); 102 + pr_debug("A possible cause could be an old bootloader - try u-boot >= v2012.07\n"); 103 103 } else { 104 104 pr_info("Successfully put all powerdomains to target state\n"); 105 105 } ··· 257 257 * http://www.spinics.net/lists/arm-kernel/msg218641.html 258 258 */ 259 259 if (cpu_is_omap44xx()) 260 - pr_warn("OMAP4 PM: u-boot >= v2012.07 is required for full PM support\n"); 260 + pr_debug("OMAP4 PM: u-boot >= v2012.07 is required for full PM support\n"); 261 261 262 262 ret = pwrdm_for_each(pwrdms_setup, NULL); 263 263 if (ret) {
-2
arch/arm/mach-sa1100/include/mach/collie.h
··· 16 16 17 17 #include "hardware.h" /* Gives GPIO_MAX */ 18 18 19 - extern void locomolcd_power(int on); 20 - 21 19 #define COLLIE_SCOOP_GPIO_BASE (GPIO_MAX + 1) 22 20 #define COLLIE_GPIO_CHARGE_ON (COLLIE_SCOOP_GPIO_BASE + 0) 23 21 #define COLLIE_SCP_DIAG_BOOT1 SCOOP_GPCR_PA12
+3 -1
arch/arm/mm/cache-uniphier.c
··· 58 58 ((op & UNIPHIER_SSCOQM_S_MASK) == UNIPHIER_SSCOQM_S_RANGE) 59 59 60 60 /** 61 - * uniphier_cache_data - UniPhier outer cache specific data 61 + * struct uniphier_cache_data - UniPhier outer cache specific data 62 62 * 63 63 * @ctrl_base: virtual base address of control registers 64 64 * @rev_base: virtual base address of revision registers 65 65 * @op_base: virtual base address of operation registers 66 + * @way_ctrl_base: virtual address of the way control registers for this 67 + * SoC revision 66 68 * @way_mask: each bit specifies if the way is present 67 69 * @nsets: number of associativity sets 68 70 * @line_size: line size in bytes
+1
arch/arm64/boot/dts/freescale/Makefile
··· 66 66 dtb-$(CONFIG_ARCH_MXC) += imx8mm-nitrogen-r2.dtb 67 67 dtb-$(CONFIG_ARCH_MXC) += imx8mm-phg.dtb 68 68 dtb-$(CONFIG_ARCH_MXC) += imx8mm-phyboard-polis-rdk.dtb 69 + dtb-$(CONFIG_ARCH_MXC) += imx8mm-prt8mm.dtb 69 70 dtb-$(CONFIG_ARCH_MXC) += imx8mm-tqma8mqml-mba8mx.dtb 70 71 dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb 71 72 dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw71xx-0x.dtb
+20 -12
arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
··· 26 26 27 27 port { 28 28 hdmi_connector_in: endpoint { 29 - remote-endpoint = <&adv7533_out>; 29 + remote-endpoint = <&adv7535_out>; 30 30 }; 31 31 }; 32 32 }; ··· 70 70 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; 71 71 off-on-delay-us = <20000>; 72 72 enable-active-high; 73 + }; 74 + 75 + reg_vddext_3v3: regulator-vddext-3v3 { 76 + compatible = "regulator-fixed"; 77 + regulator-name = "VDDEXT_3V3"; 78 + regulator-min-microvolt = <3300000>; 79 + regulator-max-microvolt = <3300000>; 73 80 }; 74 81 75 82 backlight: backlight { ··· 324 317 325 318 hdmi@3d { 326 319 compatible = "adi,adv7535"; 327 - reg = <0x3d>, <0x3c>, <0x3e>, <0x3f>; 328 - reg-names = "main", "cec", "edid", "packet"; 320 + reg = <0x3d>; 321 + interrupt-parent = <&gpio1>; 322 + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; 329 323 adi,dsi-lanes = <4>; 330 - 331 - adi,input-depth = <8>; 332 - adi,input-colorspace = "rgb"; 333 - adi,input-clock = "1x"; 334 - adi,input-style = <1>; 335 - adi,input-justification = "evenly"; 324 + avdd-supply = <&buck5_reg>; 325 + dvdd-supply = <&buck5_reg>; 326 + pvdd-supply = <&buck5_reg>; 327 + a2vdd-supply = <&buck5_reg>; 328 + v3p3-supply = <&reg_vddext_3v3>; 329 + v1p2-supply = <&buck5_reg>; 336 330 337 331 ports { 338 332 #address-cells = <1>; ··· 342 334 port@0 { 343 335 reg = <0>; 344 336 345 - adv7533_in: endpoint { 337 + adv7535_in: endpoint { 346 338 remote-endpoint = <&dsi_out>; 347 339 }; 348 340 }; ··· 350 342 port@1 { 351 343 reg = <1>; 352 344 353 - adv7533_out: endpoint { 345 + adv7535_out: endpoint { 354 346 remote-endpoint = <&hdmi_connector_in>; 355 347 }; 356 348 }; ··· 456 448 reg = <1>; 457 449 458 450 dsi_out: endpoint { 459 - remote-endpoint = <&adv7533_in>; 451 + remote-endpoint = <&adv7535_in>; 460 452 data-lanes = <1 2 3 4>; 461 453 }; 462 454 };
+3 -2
arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
··· 381 381 &sai3 { 382 382 pinctrl-names = "default"; 383 383 pinctrl-0 = <&pinctrl_sai3>; 384 - assigned-clocks = <&clk IMX8MP_CLK_SAI3>; 384 + assigned-clocks = <&clk IMX8MP_CLK_SAI3>, 385 + <&clk IMX8MP_AUDIO_PLL2> ; 385 386 assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>; 386 - assigned-clock-rates = <12288000>; 387 + assigned-clock-rates = <12288000>, <361267200>; 387 388 fsl,sai-mclk-direction-output; 388 389 status = "okay"; 389 390 };
+6
arch/arm64/boot/dts/freescale/imx8mp.dtsi
··· 790 790 reg = <IMX8MP_POWER_DOMAIN_AUDIOMIX>; 791 791 clocks = <&clk IMX8MP_CLK_AUDIO_ROOT>, 792 792 <&clk IMX8MP_CLK_AUDIO_AXI>; 793 + assigned-clocks = <&clk IMX8MP_CLK_AUDIO_AHB>, 794 + <&clk IMX8MP_CLK_AUDIO_AXI_SRC>; 795 + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>, 796 + <&clk IMX8MP_SYS_PLL1_800M>; 797 + assigned-clock-rates = <400000000>, 798 + <600000000>; 793 799 }; 794 800 795 801 pgc_gpu2d: power-domain@6 {
+1 -1
arch/arm64/boot/dts/freescale/imx93-tqma9352.dtsi
··· 81 81 &gpio1 { 82 82 pmic-irq-hog { 83 83 gpio-hog; 84 - gpios = <2 GPIO_ACTIVE_LOW>; 84 + gpios = <3 GPIO_ACTIVE_LOW>; 85 85 input; 86 86 line-name = "PMIC_IRQ#"; 87 87 };
+5 -5
arch/arm64/boot/dts/mediatek/mt8195.dtsi
··· 2957 2957 clock-names = "merge","merge_async"; 2958 2958 power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; 2959 2959 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xc000 0x1000>; 2960 - mediatek,merge-mute = <1>; 2960 + mediatek,merge-mute; 2961 2961 resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE0_DL_ASYNC>; 2962 2962 }; 2963 2963 ··· 2970 2970 clock-names = "merge","merge_async"; 2971 2971 power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; 2972 2972 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xd000 0x1000>; 2973 - mediatek,merge-mute = <1>; 2973 + mediatek,merge-mute; 2974 2974 resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE1_DL_ASYNC>; 2975 2975 }; 2976 2976 ··· 2983 2983 clock-names = "merge","merge_async"; 2984 2984 power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; 2985 2985 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xe000 0x1000>; 2986 - mediatek,merge-mute = <1>; 2986 + mediatek,merge-mute; 2987 2987 resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE2_DL_ASYNC>; 2988 2988 }; 2989 2989 ··· 2996 2996 clock-names = "merge","merge_async"; 2997 2997 power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; 2998 2998 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xf000 0x1000>; 2999 - mediatek,merge-mute = <1>; 2999 + mediatek,merge-mute; 3000 3000 resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE3_DL_ASYNC>; 3001 3001 }; 3002 3002 ··· 3009 3009 clock-names = "merge","merge_async"; 3010 3010 power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; 3011 3011 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x0000 0x1000>; 3012 - mediatek,merge-fifo-en = <1>; 3012 + mediatek,merge-fifo-en; 3013 3013 resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE4_DL_ASYNC>; 3014 3014 }; 3015 3015
+1 -1
arch/arm64/configs/defconfig
··· 636 636 CONFIG_POWER_RESET_QCOM_PON=m 637 637 CONFIG_POWER_RESET_XGENE=y 638 638 CONFIG_POWER_RESET_SYSCON=y 639 + CONFIG_POWER_RESET_SYSCON_POWEROFF=y 639 640 CONFIG_SYSCON_REBOOT_MODE=y 640 641 CONFIG_NVMEM_REBOOT_MODE=m 641 642 CONFIG_BATTERY_SBS=m ··· 1176 1175 CONFIG_COMMON_CLK_PWM=y 1177 1176 CONFIG_COMMON_CLK_RS9_PCIE=y 1178 1177 CONFIG_COMMON_CLK_VC5=y 1179 - CONFIG_COMMON_CLK_NPCM8XX=y 1180 1178 CONFIG_COMMON_CLK_BD718XX=m 1181 1179 CONFIG_CLK_RASPBERRYPI=m 1182 1180 CONFIG_CLK_IMX8MM=y
+26 -25
arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
··· 262 262 reg = <0x100000 0x400000>; 263 263 }; 264 264 reserved-data@600000 { 265 - reg = <0x600000 0x1000000>; 265 + reg = <0x600000 0xa00000>; 266 266 }; 267 267 }; 268 268 }; ··· 440 440 }; 441 441 }; 442 442 443 - uart0_pins: uart0-0 { 444 - tx-pins { 445 - pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX, 446 - GPOEN_ENABLE, 447 - GPI_NONE)>; 448 - bias-disable; 449 - drive-strength = <12>; 450 - input-disable; 451 - input-schmitt-disable; 452 - slew-rate = <0>; 453 - }; 454 - 455 - rx-pins { 456 - pinmux = <GPIOMUX(6, GPOUT_LOW, 457 - GPOEN_DISABLE, 458 - GPI_SYS_UART0_RX)>; 459 - bias-disable; /* external pull-up */ 460 - drive-strength = <2>; 461 - input-enable; 462 - input-schmitt-enable; 463 - slew-rate = <0>; 464 - }; 465 - }; 466 - 467 443 tdm_pins: tdm-0 { 468 444 tx-pins { 469 445 pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD, ··· 473 497 input-enable; 474 498 }; 475 499 }; 500 + 501 + uart0_pins: uart0-0 { 502 + tx-pins { 503 + pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX, 504 + GPOEN_ENABLE, 505 + GPI_NONE)>; 506 + bias-disable; 507 + drive-strength = <12>; 508 + input-disable; 509 + input-schmitt-disable; 510 + slew-rate = <0>; 511 + }; 512 + 513 + rx-pins { 514 + pinmux = <GPIOMUX(6, GPOUT_LOW, 515 + GPOEN_DISABLE, 516 + GPI_SYS_UART0_RX)>; 517 + bias-disable; /* external pull-up */ 518 + drive-strength = <2>; 519 + input-enable; 520 + input-schmitt-enable; 521 + slew-rate = <0>; 522 + }; 523 + }; 476 524 }; 477 525 478 526 &tdm { ··· 513 513 514 514 &usb0 { 515 515 dr_mode = "peripheral"; 516 + status = "okay"; 516 517 }; 517 518 518 519 &U74_1 {
+22 -9
drivers/bus/ti-sysc.c
··· 38 38 SOC_2420, 39 39 SOC_2430, 40 40 SOC_3430, 41 + SOC_AM35, 41 42 SOC_3630, 42 43 SOC_4430, 43 44 SOC_4460, ··· 1098 1097 if (ddata->cfg.quirks & (SYSC_QUIRK_SWSUP_SIDLE | 1099 1098 SYSC_QUIRK_SWSUP_SIDLE_ACT)) { 1100 1099 best_mode = SYSC_IDLE_NO; 1100 + 1101 + /* Clear WAKEUP */ 1102 + if (regbits->enwkup_shift >= 0 && 1103 + ddata->cfg.sysc_val & BIT(regbits->enwkup_shift)) 1104 + reg &= ~BIT(regbits->enwkup_shift); 1101 1105 } else { 1102 1106 best_mode = fls(ddata->cfg.sidlemodes) - 1; 1103 1107 if (best_mode > SYSC_IDLE_MASK) { ··· 1228 1222 ret = -EINVAL; 1229 1223 goto save_context; 1230 1224 } 1225 + } 1226 + 1227 + if (ddata->cfg.quirks & SYSC_QUIRK_SWSUP_SIDLE_ACT) { 1228 + /* Set WAKEUP */ 1229 + if (regbits->enwkup_shift >= 0 && 1230 + ddata->cfg.sysc_val & BIT(regbits->enwkup_shift)) 1231 + reg |= BIT(regbits->enwkup_shift); 1231 1232 } 1232 1233 1233 1234 reg &= ~(SYSC_IDLE_MASK << regbits->sidle_shift); ··· 1531 1518 static const struct sysc_revision_quirk sysc_revision_quirks[] = { 1532 1519 /* These drivers need to be fixed to not use pm_runtime_irq_safe() */ 1533 1520 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000046, 0xffffffff, 1534 - SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE), 1521 + SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE), 1535 1522 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff, 1536 - SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE), 1523 + SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE), 1537 1524 /* Uarts on omap4 and later */ 1538 1525 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x50411e03, 0xffff00ff, 1539 - SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE), 1526 + SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE), 1540 1527 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x47422e03, 0xffffffff, 1541 - SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE), 1528 + SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE), 1542 1529 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x47424e03, 0xffffffff, 1543 - SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE), 1530 + SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE), 1544 1531 1545 1532 /* Quirks that need to be set based on the module address */ 1546 1533 SYSC_QUIRK("mcpdm", 0x40132000, 0, 0x10, -ENODEV, 0x50000800, 0xffffffff, ··· 1875 1862 dev_warn(ddata->dev, "%s: timed out %08x !+ %08x\n", 1876 1863 __func__, val, irq_mask); 1877 1864 1878 - if (sysc_soc->soc == SOC_3430) { 1865 + if (sysc_soc->soc == SOC_3430 || sysc_soc->soc == SOC_AM35) { 1879 1866 /* Clear DSS_SDI_CONTROL */ 1880 1867 sysc_write(ddata, 0x44, 0); 1881 1868 ··· 2163 2150 } 2164 2151 2165 2152 if (ddata->cfg.srst_udelay) 2166 - usleep_range(ddata->cfg.srst_udelay, 2167 - ddata->cfg.srst_udelay * 2); 2153 + fsleep(ddata->cfg.srst_udelay); 2168 2154 2169 2155 if (ddata->post_reset_quirk) 2170 2156 ddata->post_reset_quirk(ddata); ··· 3037 3025 static const struct soc_device_attribute sysc_soc_match[] = { 3038 3026 SOC_FLAG("OMAP242*", SOC_2420), 3039 3027 SOC_FLAG("OMAP243*", SOC_2430), 3028 + SOC_FLAG("AM35*", SOC_AM35), 3040 3029 SOC_FLAG("OMAP3[45]*", SOC_3430), 3041 3030 SOC_FLAG("OMAP3[67]*", SOC_3630), 3042 3031 SOC_FLAG("OMAP443*", SOC_4430), ··· 3242 3229 * can be dropped if we stop supporting old beagleboard revisions 3243 3230 * A to B4 at some point. 3244 3231 */ 3245 - if (sysc_soc->soc == SOC_3430) 3232 + if (sysc_soc->soc == SOC_3430 || sysc_soc->soc == SOC_AM35) 3246 3233 error = -ENXIO; 3247 3234 else 3248 3235 error = -EBUSY;
+14 -2
drivers/firmware/arm_ffa/driver.c
··· 397 397 return num_pages; 398 398 } 399 399 400 + static u8 ffa_memory_attributes_get(u32 func_id) 401 + { 402 + /* 403 + * For the memory lend or donate operation, if the receiver is a PE or 404 + * a proxy endpoint, the owner/sender must not specify the attributes 405 + */ 406 + if (func_id == FFA_FN_NATIVE(MEM_LEND) || 407 + func_id == FFA_MEM_LEND) 408 + return 0; 409 + 410 + return FFA_MEM_NORMAL | FFA_MEM_WRITE_BACK | FFA_MEM_INNER_SHAREABLE; 411 + } 412 + 400 413 static int 401 414 ffa_setup_and_transmit(u32 func_id, void *buffer, u32 max_fragsize, 402 415 struct ffa_mem_ops_args *args) ··· 426 413 mem_region->tag = args->tag; 427 414 mem_region->flags = args->flags; 428 415 mem_region->sender_id = drv_info->vm_id; 429 - mem_region->attributes = FFA_MEM_NORMAL | FFA_MEM_WRITE_BACK | 430 - FFA_MEM_INNER_SHAREABLE; 416 + mem_region->attributes = ffa_memory_attributes_get(func_id); 431 417 ep_mem_access = &mem_region->ep_mem_access[0]; 432 418 433 419 for (idx = 0; idx < args->nattrs; idx++, ep_mem_access++) {
+2 -2
drivers/firmware/arm_scmi/perf.c
··· 1080 1080 if (!pinfo) 1081 1081 return -ENOMEM; 1082 1082 1083 + pinfo->version = version; 1084 + 1083 1085 ret = scmi_perf_attributes_get(ph, pinfo); 1084 1086 if (ret) 1085 1087 return ret; ··· 1105 1103 ret = devm_add_action_or_reset(ph->dev, scmi_perf_xa_destroy, pinfo); 1106 1104 if (ret) 1107 1105 return ret; 1108 - 1109 - pinfo->version = version; 1110 1106 1111 1107 return ph->set_priv(ph, pinfo); 1112 1108 }
+1
drivers/firmware/imx/imx-dsp.c
··· 114 114 dsp_chan->idx = i % 2; 115 115 dsp_chan->ch = mbox_request_channel_byname(cl, chan_name); 116 116 if (IS_ERR(dsp_chan->ch)) { 117 + kfree(dsp_chan->name); 117 118 ret = PTR_ERR(dsp_chan->ch); 118 119 if (ret != -EPROBE_DEFER) 119 120 dev_err(dev, "Failed to request mbox chan %s ret %d\n",
+10
drivers/soc/imx/soc-imx8m.c
··· 100 100 { 101 101 void __iomem *ocotp_base; 102 102 struct device_node *np; 103 + struct clk *clk; 103 104 u32 offset = of_machine_is_compatible("fsl,imx8mp") ? 104 105 IMX8MP_OCOTP_UID_OFFSET : 0; 105 106 ··· 110 109 111 110 ocotp_base = of_iomap(np, 0); 112 111 WARN_ON(!ocotp_base); 112 + clk = of_clk_get_by_name(np, NULL); 113 + if (IS_ERR(clk)) { 114 + WARN_ON(IS_ERR(clk)); 115 + return; 116 + } 117 + 118 + clk_prepare_enable(clk); 113 119 114 120 soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH + offset); 115 121 soc_uid <<= 32; 116 122 soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW + offset); 117 123 124 + clk_disable_unprepare(clk); 125 + clk_put(clk); 118 126 iounmap(ocotp_base); 119 127 of_node_put(np); 120 128 }
+1
drivers/soc/loongson/Kconfig
··· 20 20 config LOONGSON2_PM 21 21 bool "Loongson-2 SoC Power Management Controller Driver" 22 22 depends on LOONGARCH && OF 23 + depends on INPUT=y 23 24 help 24 25 The Loongson-2's power management controller was ACPI, supports ACPI 25 26 S2Idle (Suspend To Idle), ACPI S3 (Suspend To RAM), ACPI S4 (Suspend To
+2 -4
drivers/soc/loongson/loongson2_guts.c
··· 70 70 if (matches->svr == (svr & matches->mask)) 71 71 return matches; 72 72 matches++; 73 - }; 73 + } 74 74 75 75 return NULL; 76 76 } ··· 94 94 { 95 95 struct device_node *root, *np = pdev->dev.of_node; 96 96 struct device *dev = &pdev->dev; 97 - struct resource *res; 98 97 const struct loongson2_soc_die_attr *soc_die; 99 98 const char *machine; 100 99 u32 svr; ··· 105 106 106 107 guts->little_endian = of_property_read_bool(np, "little-endian"); 107 108 108 - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 109 - guts->regs = ioremap(res->start, res->end - res->start + 1); 109 + guts->regs = devm_platform_ioremap_resource(pdev, 0); 110 110 if (IS_ERR(guts->regs)) 111 111 return PTR_ERR(guts->regs); 112 112
+6 -1
drivers/soc/loongson/loongson2_pm.c
··· 11 11 #include <linux/input.h> 12 12 #include <linux/suspend.h> 13 13 #include <linux/interrupt.h> 14 + #include <linux/of_platform.h> 14 15 #include <linux/pm_wakeirq.h> 15 16 #include <linux/platform_device.h> 16 17 #include <asm/bootinfo.h> ··· 193 192 if (loongson_sysconf.suspend_addr) 194 193 suspend_set_ops(&loongson2_suspend_ops); 195 194 195 + /* Populate children */ 196 + retval = devm_of_platform_populate(dev); 197 + if (retval) 198 + dev_err(dev, "Error populating children, reboot and poweroff might not work properly\n"); 199 + 196 200 return 0; 197 201 } 198 202 199 203 static const struct of_device_id loongson2_pm_match[] = { 200 204 { .compatible = "loongson,ls2k0500-pmc", }, 201 - { .compatible = "loongson,ls2k1000-pmc", }, 202 205 {}, 203 206 }; 204 207
-2
drivers/tee/optee/optee_private.h
··· 238 238 u32 optee_supp_thrd_req(struct tee_context *ctx, u32 func, size_t num_params, 239 239 struct tee_param *param); 240 240 241 - int optee_supp_read(struct tee_context *ctx, void __user *buf, size_t len); 242 - int optee_supp_write(struct tee_context *ctx, void __user *buf, size_t len); 243 241 void optee_supp_init(struct optee_supp *supp); 244 242 void optee_supp_uninit(struct optee_supp *supp); 245 243 void optee_supp_release(struct optee_supp *supp);
-2
drivers/tee/tee_private.h
··· 47 47 struct tee_shm_pool *pool; 48 48 }; 49 49 50 - int tee_shm_init(void); 51 - 52 50 int tee_shm_get_fd(struct tee_shm *shm); 53 51 54 52 bool tee_device_get(struct tee_device *teedev);