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drm/msm/dpu: get rid of DPU_INTF_STATUS_SUPPORTED

Continue migration to the MDSS-revision based checks and replace
DPU_INTF_STATUS_SUPPORTED feature bit with the core_major_ver >= 5
check.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/655384/
Link: https://lore.kernel.org/r/20250522-dpu-drop-features-v5-14-3b2085a07884@oss.qualcomm.com

authored by

Dmitry Baryshkov and committed by
Dmitry Baryshkov
e432d2e1 19bcbadf

+2 -6
+1 -2
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
··· 105 105 (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_DSC)) 106 106 107 107 #define INTF_SC7180_MASK \ 108 - (BIT(DPU_INTF_INPUT_CTRL) | \ 109 - BIT(DPU_INTF_STATUS_SUPPORTED)) 108 + (BIT(DPU_INTF_INPUT_CTRL)) 110 109 111 110 #define WB_SDM845_MASK (BIT(DPU_WB_LINE_MODE) | \ 112 111 BIT(DPU_WB_UBWC) | \
-2
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
··· 143 143 * INTF sub-blocks 144 144 * @DPU_INTF_INPUT_CTRL Supports the setting of pp block from which 145 145 * pixel data arrives to this INTF 146 - * @DPU_INTF_STATUS_SUPPORTED INTF block has INTF_STATUS register 147 146 * @DPU_INTF_MAX 148 147 */ 149 148 enum { 150 149 DPU_INTF_INPUT_CTRL = 0x1, 151 - DPU_INTF_STATUS_SUPPORTED, 152 150 DPU_INTF_MAX 153 151 }; 154 152
+1 -2
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
··· 308 308 struct dpu_hw_intf_status *s) 309 309 { 310 310 struct dpu_hw_blk_reg_map *c = &intf->hw; 311 - unsigned long cap = intf->cap->features; 312 311 313 - if (cap & BIT(DPU_INTF_STATUS_SUPPORTED)) 312 + if (intf->mdss_ver->core_major_ver >= 5) 314 313 s->is_en = DPU_REG_READ(c, INTF_STATUS) & BIT(0); 315 314 else 316 315 s->is_en = DPU_REG_READ(c, INTF_TIMING_ENGINE_EN);