+3 -6

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

reviewed

··· 1334 1334 #if IS_ENABLED(CONFIG_X86) 1335 1335 struct cpuinfo_x86 *c = &cpu_data(0); 1336 1336 1337 1337 - if (!(amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(12, 0, 0) || 1338 1338 - amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(12, 0, 1))) 1339 1339 - return false; 1340 1340 - 1341 1341 - if (c->x86 == 6 && 1342 1342 - adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN5) { 1337 1337 + if (c->x86_vendor == X86_VENDOR_INTEL) { 1343 1338 switch (c->x86_model) { 1344 1339 case VFM_MODEL(INTEL_ALDERLAKE): 1345 1340 case VFM_MODEL(INTEL_ALDERLAKE_L): 1346 1341 case VFM_MODEL(INTEL_RAPTORLAKE): 1347 1342 case VFM_MODEL(INTEL_RAPTORLAKE_P): 1348 1343 case VFM_MODEL(INTEL_RAPTORLAKE_S): 1344 1344 + case VFM_MODEL(INTEL_TIGERLAKE): 1345 1345 + case VFM_MODEL(INTEL_TIGERLAKE_L): 1349 1346 return true; 1350 1347 default: 1351 1348 return false;

+5 -2

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

reviewed

··· 693 693 !(flags & AMDGPU_PTE_VALID) && 694 694 !(flags & AMDGPU_PTE_PRT_FLAG(params->adev))) { 695 695 696 696 - /* Workaround for fault priority problem on GMC9 */ 697 697 - flags |= AMDGPU_PTE_EXECUTABLE; 696 696 + /* Workaround for fault priority problem on GMC9 and GFX12, 697 697 + * EXECUTABLE for GMC9 fault priority and init_pte_flags 698 698 + * (e.g. AMDGPU_PTE_IS_PTE on GFX12) 699 699 + */ 700 700 + flags |= AMDGPU_PTE_EXECUTABLE | adev->gmc.init_pte_flags; 698 701 } 699 702 700 703 /*

+3

drivers/gpu/drm/amd/amdkfd/kfd_chardev.c

reviewed

··· 776 776 goto out_unlock; 777 777 } 778 778 779 779 + if (args->num_of_nodes > kfd_topology_get_num_devices()) 780 780 + return -EINVAL; 781 781 + 779 782 /* Fill in process-aperture information for all available 780 783 * nodes, but not more than args->num_of_nodes as that is 781 784 * the amount of memory allocated by user

+1

drivers/gpu/drm/amd/amdkfd/kfd_priv.h

reviewed

··· 1191 1191 return NULL; 1192 1192 } 1193 1193 int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_node **kdev); 1194 1194 + uint32_t kfd_topology_get_num_devices(void); 1194 1195 int kfd_numa_node_to_apic_id(int numa_node_id); 1195 1196 uint32_t kfd_gpu_node_num(void); 1196 1197

+11

drivers/gpu/drm/amd/amdkfd/kfd_topology.c

reviewed

··· 2297 2297 return res; 2298 2298 } 2299 2299 2300 2300 + uint32_t kfd_topology_get_num_devices(void) 2301 2301 + { 2302 2302 + uint32_t num_devices; 2303 2303 + 2304 2304 + down_read(&topology_lock); 2305 2305 + num_devices = sys_props.num_devices; 2306 2306 + up_read(&topology_lock); 2307 2307 + 2308 2308 + return num_devices; 2309 2309 + } 2310 2310 + 2300 2311 /* kfd_topology_enum_kfd_devices - Enumerate through all devices in KFD 2301 2312 * topology. If GPU device is found @idx, then valid kfd_dev pointer is 2302 2313 * returned through @kdev

-10

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_ism.c

reviewed

··· 270 270 struct amdgpu_crtc *acrtc = ism_to_amdgpu_crtc(ism); 271 271 struct amdgpu_device *adev = drm_to_adev(acrtc->base.dev); 272 272 struct amdgpu_display_manager *dm = &adev->dm; 273 273 - int r; 274 273 275 274 trace_amdgpu_dm_ism_commit(dm->active_vblank_irq_count, 276 275 vblank_enabled, ··· 322 323 */ 323 324 if (!vblank_enabled && dm->active_vblank_irq_count == 0) { 324 325 dc_post_update_surfaces_to_stream(dm->dc); 325 325 - 326 326 - r = amdgpu_dpm_pause_power_profile(adev, true); 327 327 - if (r) 328 328 - dev_warn(adev->dev, "failed to set default power profile mode\n"); 329 329 - 330 326 dc_allow_idle_optimizations(dm->dc, true); 331 331 - 332 332 - r = amdgpu_dpm_pause_power_profile(adev, false); 333 333 - if (r) 334 334 - dev_warn(adev->dev, "failed to restore the power profile mode\n"); 335 327 } 336 328 } 337 329

+6

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

reviewed

··· 5069 5069 } 5070 5070 } 5071 5071 5072 5072 + if (stream->ctx->dce_version < DCE_VERSION_8_0 && 5073 5073 + stream->timing.display_color_depth >= COLOR_DEPTH_101010) { 5074 5074 + /* DCE 6.x doesn't support 10-bit truncation or dither options. */ 5075 5075 + option = DITHER_OPTION_DISABLE; 5076 5076 + } 5077 5077 + 5072 5078 if (option == DITHER_OPTION_DISABLE) 5073 5079 return; 5074 5080