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clk: en7523: Rework clock handling for different clock numbers

Airoha EN7581 SoC have additional clock compared to EN7523 but current
driver permits to only support up to EN7523 clock numbers.

To handle this, rework the clock handling and permit to declare the
clocks number in match_data and alloca clk_data based on the compatible
match_data.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Link: https://lore.kernel.org/r/20250113231030.6735-2-ansuelsmth@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

authored by

Christian Marangi and committed by
Stephen Boyd e4a9748e 52fd1709

+8 -6
+8 -6
drivers/clk/clk-en7523.c
··· 75 75 }; 76 76 77 77 struct en_clk_soc_data { 78 + u32 num_clocks; 78 79 const struct clk_ops pcie_ops; 79 80 int (*hw_init)(struct platform_device *pdev, 80 81 struct clk_hw_onecell_data *clk_data); ··· 505 504 u32 rate; 506 505 int i; 507 506 508 - clk_data->num = EN7523_NUM_CLOCKS; 509 - 510 507 for (i = 0; i < ARRAY_SIZE(en7523_base_clks); i++) { 511 508 const struct en_clk_desc *desc = &en7523_base_clks[i]; 512 509 u32 reg = desc->div_reg ? desc->div_reg : desc->base_reg; ··· 586 587 587 588 hw = en7523_register_pcie_clk(dev, base); 588 589 clk_data->hws[EN7523_CLK_PCIE] = hw; 589 - 590 - clk_data->num = EN7523_NUM_CLOCKS; 591 590 } 592 591 593 592 static int en7523_reset_update(struct reset_controller_dev *rcdev, ··· 699 702 struct clk_hw_onecell_data *clk_data; 700 703 int r; 701 704 705 + soc_data = device_get_match_data(&pdev->dev); 706 + 702 707 clk_data = devm_kzalloc(&pdev->dev, 703 - struct_size(clk_data, hws, EN7523_NUM_CLOCKS), 708 + struct_size(clk_data, hws, soc_data->num_clocks), 704 709 GFP_KERNEL); 705 710 if (!clk_data) 706 711 return -ENOMEM; 707 712 708 - soc_data = device_get_match_data(&pdev->dev); 713 + clk_data->num = soc_data->num_clocks; 709 714 r = soc_data->hw_init(pdev, clk_data); 710 715 if (r) 711 716 return r; ··· 716 717 } 717 718 718 719 static const struct en_clk_soc_data en7523_data = { 720 + .num_clocks = ARRAY_SIZE(en7523_base_clks) + 1, 719 721 .pcie_ops = { 720 722 .is_enabled = en7523_pci_is_enabled, 721 723 .prepare = en7523_pci_prepare, ··· 726 726 }; 727 727 728 728 static const struct en_clk_soc_data en7581_data = { 729 + /* We increment num_clocks by 1 to account for additional PCIe clock */ 730 + .num_clocks = ARRAY_SIZE(en7581_base_clks) + 1, 729 731 .pcie_ops = { 730 732 .is_enabled = en7581_pci_is_enabled, 731 733 .enable = en7581_pci_enable,