Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/ralf/linux
Pull MIPS fixes from Ralf Baechle:
"MIPS fixes for 4.1 all across the tree"
* 'upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/ralf/linux:
MIPS: strnlen_user.S: Fix a CPU_DADDI_WORKAROUNDS regression
MIPS: BMIPS: Fix bmips_wr_vec()
MIPS: ath79: fix build problem if CONFIG_BLK_DEV_INITRD is not set
MIPS: Fuloong 2E: Replace CONFIG_USB_ISP1760_HCD by CONFIG_USB_ISP1760
MIPS: irq: Use DECLARE_BITMAP
ttyFDC: Fix to use native endian MMIO reads
MIPS: Fix CDMM to use native endian MMIO reads
+30
-15
+3
arch/mips/ath79/prom.c
+3
arch/mips/ath79/prom.c
···
1
1
/*
2
2
* Atheros AR71XX/AR724X/AR913X specific prom routines
3
3
*
4
+
* Copyright (C) 2015 Laurent Fasnacht <l@libres.ch>
4
5
* Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
5
6
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6
7
*
···
26
25
{
27
26
fw_init_cmdline();
28
27
28
+
#ifdef CONFIG_BLK_DEV_INITRD
29
29
/* Read the initrd address from the firmware environment */
30
30
initrd_start = fw_getenvl("initrd_start");
31
31
if (initrd_start) {
32
32
initrd_start = KSEG0ADDR(initrd_start);
33
33
initrd_end = initrd_start + fw_getenvl("initrd_size");
34
34
}
35
+
#endif
35
36
}
36
37
37
38
void __init prom_free_prom_memory(void)
+1
-1
arch/mips/configs/fuloong2e_defconfig
+1
-1
arch/mips/configs/fuloong2e_defconfig
+1
-1
arch/mips/kernel/irq.c
+1
-1
arch/mips/kernel/irq.c
+1
-1
arch/mips/kernel/smp-bmips.c
+1
-1
arch/mips/kernel/smp-bmips.c
···
444
444
static void bmips_wr_vec(unsigned long dst, char *start, char *end)
445
445
{
446
446
memcpy((void *)dst, start, end - start);
447
-
dma_cache_wback((unsigned long)start, end - start);
447
+
dma_cache_wback(dst, end - start);
448
448
local_flush_icache_range(dst, dst + (end - start));
449
449
instruction_hazard();
450
450
}
+13
-2
arch/mips/lib/strnlen_user.S
+13
-2
arch/mips/lib/strnlen_user.S
···
34
34
FEXPORT(__strnlen_\func\()_nocheck_asm)
35
35
move v0, a0
36
36
PTR_ADDU a1, a0 # stop pointer
37
-
1: beq v0, a1, 1f # limit reached?
37
+
1:
38
+
#ifdef CONFIG_CPU_DADDI_WORKAROUNDS
39
+
.set noat
40
+
li AT, 1
41
+
#endif
42
+
beq v0, a1, 1f # limit reached?
38
43
.ifeqs "\func", "kernel"
39
44
EX(lb, t0, (v0), .Lfault\@)
40
45
.else
···
47
42
.endif
48
43
.set noreorder
49
44
bnez t0, 1b
50
-
1: PTR_ADDIU v0, 1
45
+
1:
46
+
#ifndef CONFIG_CPU_DADDI_WORKAROUNDS
47
+
PTR_ADDIU v0, 1
48
+
#else
49
+
PTR_ADDU v0, AT
50
+
.set at
51
+
#endif
51
52
.set reorder
52
53
PTR_SUBU v0, a0
53
54
jr ra
+2
-2
drivers/bus/mips_cdmm.c
+2
-2
drivers/bus/mips_cdmm.c
···
453
453
454
454
/* Look for a specific device type */
455
455
for (; drb < bus->drbs; drb += size + 1) {
456
-
acsr = readl(cdmm + drb * CDMM_DRB_SIZE);
456
+
acsr = __raw_readl(cdmm + drb * CDMM_DRB_SIZE);
457
457
type = (acsr & CDMM_ACSR_DEVTYPE) >> CDMM_ACSR_DEVTYPE_SHIFT;
458
458
if (type == dev_type)
459
459
return cdmm + drb * CDMM_DRB_SIZE;
···
500
500
bus->discovered = true;
501
501
pr_info("cdmm%u discovery (%u blocks)\n", cpu, bus->drbs);
502
502
for (; drb < bus->drbs; drb += size + 1) {
503
-
acsr = readl(cdmm + drb * CDMM_DRB_SIZE);
503
+
acsr = __raw_readl(cdmm + drb * CDMM_DRB_SIZE);
504
504
type = (acsr & CDMM_ACSR_DEVTYPE) >> CDMM_ACSR_DEVTYPE_SHIFT;
505
505
size = (acsr & CDMM_ACSR_DEVSIZE) >> CDMM_ACSR_DEVSIZE_SHIFT;
506
506
rev = (acsr & CDMM_ACSR_DEVREV) >> CDMM_ACSR_DEVREV_SHIFT;
+9
-8
drivers/tty/mips_ejtag_fdc.c
+9
-8
drivers/tty/mips_ejtag_fdc.c
···
174
174
static inline void mips_ejtag_fdc_write(struct mips_ejtag_fdc_tty *priv,
175
175
unsigned int offs, unsigned int data)
176
176
{
177
-
iowrite32(data, priv->reg + offs);
177
+
__raw_writel(data, priv->reg + offs);
178
178
}
179
179
180
180
static inline unsigned int mips_ejtag_fdc_read(struct mips_ejtag_fdc_tty *priv,
181
181
unsigned int offs)
182
182
{
183
-
return ioread32(priv->reg + offs);
183
+
return __raw_readl(priv->reg + offs);
184
184
}
185
185
186
186
/* Encoding of byte stream in FDC words */
···
347
347
s += inc[word.bytes - 1];
348
348
349
349
/* Busy wait until there's space in fifo */
350
-
while (ioread32(regs + REG_FDSTAT) & REG_FDSTAT_TXF)
350
+
while (__raw_readl(regs + REG_FDSTAT) & REG_FDSTAT_TXF)
351
351
;
352
-
iowrite32(word.word, regs + REG_FDTX(c->index));
352
+
__raw_writel(word.word, regs + REG_FDTX(c->index));
353
353
}
354
354
out:
355
355
local_irq_restore(flags);
···
1227
1227
1228
1228
/* Read next word from KGDB channel */
1229
1229
do {
1230
-
stat = ioread32(regs + REG_FDSTAT);
1230
+
stat = __raw_readl(regs + REG_FDSTAT);
1231
1231
1232
1232
/* No data waiting? */
1233
1233
if (stat & REG_FDSTAT_RXE)
···
1236
1236
/* Read next word */
1237
1237
channel = (stat & REG_FDSTAT_RXCHAN) >>
1238
1238
REG_FDSTAT_RXCHAN_SHIFT;
1239
-
data = ioread32(regs + REG_FDRX);
1239
+
data = __raw_readl(regs + REG_FDRX);
1240
1240
} while (channel != CONFIG_MIPS_EJTAG_FDC_KGDB_CHAN);
1241
1241
1242
1242
/* Decode into rbuf */
···
1266
1266
return;
1267
1267
1268
1268
/* Busy wait until there's space in fifo */
1269
-
while (ioread32(regs + REG_FDSTAT) & REG_FDSTAT_TXF)
1269
+
while (__raw_readl(regs + REG_FDSTAT) & REG_FDSTAT_TXF)
1270
1270
;
1271
-
iowrite32(word.word, regs + REG_FDTX(CONFIG_MIPS_EJTAG_FDC_KGDB_CHAN));
1271
+
__raw_writel(word.word,
1272
+
regs + REG_FDTX(CONFIG_MIPS_EJTAG_FDC_KGDB_CHAN));
1272
1273
}
1273
1274
1274
1275
/* flush the whole write buffer to the TX FIFO */