tjh.dev / kernel
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drm/msm/dpu: bind correct pingpong for quad pipe

There are 2 interfaces and 4 pingpong in quad pipe. Map the 2nd
interface to 3rd PP instead of the 2nd PP.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/675402/
Link: https://lore.kernel.org/r/20250918-v6-16-rc2-quad-pipe-upstream-4-v16-2-ff6232e3472f@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>

authored by

Jun Nie and committed by
Dmitry Baryshkov e4f87fdd 74c4efe6

+8 -2
+8 -2
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
··· 1160 1160 struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC]; 1161 1161 struct dpu_hw_blk *hw_dsc[MAX_CHANNELS_PER_ENC]; 1162 1162 struct dpu_hw_blk *hw_cwb[MAX_CHANNELS_PER_ENC]; 1163 - int num_ctl, num_pp, num_dsc; 1163 + int num_ctl, num_pp, num_dsc, num_pp_per_intf; 1164 1164 int num_cwb = 0; 1165 1165 bool is_cwb_encoder; 1166 1166 unsigned int dsc_mask = 0; ··· 1239 1239 dpu_enc->cur_master->hw_cdm = hw_cdm ? to_dpu_hw_cdm(hw_cdm) : NULL; 1240 1240 } 1241 1241 1242 + /* 1243 + * There may be 4 PP and 2 INTF for quad pipe case, so INTF is not 1244 + * mapped to PP 1:1. Let's calculate the stride with pipe/INTF 1245 + */ 1246 + num_pp_per_intf = num_pp / dpu_enc->num_phys_encs; 1247 + 1242 1248 for (i = 0; i < dpu_enc->num_phys_encs; i++) { 1243 1249 struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; 1244 1250 1245 - phys->hw_pp = dpu_enc->hw_pp[i]; 1251 + phys->hw_pp = dpu_enc->hw_pp[num_pp_per_intf * i]; 1246 1252 if (!phys->hw_pp) { 1247 1253 DPU_ERROR_ENC(dpu_enc, 1248 1254 "no pp block assigned at idx: %d\n", i);