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Merge branch 'net-stmmac-socfpga-1000basex-support-and-cleanups'

Maxime Chevallier says:

====================
net: stmmac: socfpga: 1000BaseX support and cleanups

This small series sorts-out 1000BaseX support and does a bit of cleanup
for the Lynx conversion.

Patch 1 makes sure that we set the right phy_mode when working in
1000BaseX mode, so that the internal GMII is configured correctly.

Patch 2 removes a check for phy_device upon calling fix_mac_speed(). As
the SGMII adapter may be chained to a Lynx PCS, checking for a
phy_device to be attached to the netdev before enabling the SGMII
adapter doesn't make sense, as we won't have a downstream PHY when using
1000BaseX.

Patch 3 cleans an unused field from the PCS conversion.

v1: https://lore.kernel.org/20250422094701.49798-1-maxime.chevallier@bootlin.com
v2: https://lore.kernel.org/20250423104646.189648-1-maxime.chevallier@bootlin.com
====================

Link: https://patch.msgid.link/20250424071223.221239-1-maxime.chevallier@bootlin.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

Jakub Kicinski e527e891 f438eee2

+8 -7
+8 -7
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
··· 59 59 void __iomem *sgmii_adapter_base; 60 60 bool f2h_ptp_ref_clk; 61 61 const struct socfpga_dwmac_ops *ops; 62 - struct mdio_device *pcs_mdiodev; 63 62 }; 64 63 65 - static void socfpga_dwmac_fix_mac_speed(void *priv, int speed, unsigned int mode) 64 + static void socfpga_dwmac_fix_mac_speed(void *bsp_priv, int speed, 65 + unsigned int mode) 66 66 { 67 - struct socfpga_dwmac *dwmac = (struct socfpga_dwmac *)priv; 67 + struct socfpga_dwmac *dwmac = (struct socfpga_dwmac *)bsp_priv; 68 + struct stmmac_priv *priv = netdev_priv(dev_get_drvdata(dwmac->dev)); 68 69 void __iomem *splitter_base = dwmac->splitter_base; 69 70 void __iomem *sgmii_adapter_base = dwmac->sgmii_adapter_base; 70 - struct device *dev = dwmac->dev; 71 - struct net_device *ndev = dev_get_drvdata(dev); 72 - struct phy_device *phy_dev = ndev->phydev; 73 71 u32 val; 74 72 75 73 if (sgmii_adapter_base) ··· 94 96 writel(val, splitter_base + EMAC_SPLITTER_CTRL_REG); 95 97 } 96 98 97 - if (phy_dev && sgmii_adapter_base) 99 + if ((priv->plat->phy_interface == PHY_INTERFACE_MODE_SGMII || 100 + priv->plat->phy_interface == PHY_INTERFACE_MODE_1000BASEX) && 101 + sgmii_adapter_base) 98 102 writew(SGMII_ADAPTER_ENABLE, 99 103 sgmii_adapter_base + SGMII_ADAPTER_CTRL_REG); 100 104 } ··· 256 256 case PHY_INTERFACE_MODE_MII: 257 257 case PHY_INTERFACE_MODE_GMII: 258 258 case PHY_INTERFACE_MODE_SGMII: 259 + case PHY_INTERFACE_MODE_1000BASEX: 259 260 *val = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII; 260 261 break; 261 262 case PHY_INTERFACE_MODE_RMII: