Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

+1 -1

Documentation/devicetree/bindings/cache/qcom,llcc.yaml

··· 66 66 compatible: 67 67 contains: 68 68 enum: 69 - - qcom,qdu1000-llcc 70 69 - qcom,sc7180-llcc 71 70 - qcom,sm6350-llcc 72 71 then: ··· 103 104 compatible: 104 105 contains: 105 106 enum: 107 + - qcom,qdu1000-llcc 106 108 - qcom,sc8180x-llcc 107 109 - qcom,sc8280xp-llcc 108 110 - qcom,x1e80100-llcc

+9 -4

MAINTAINERS

··· 2892 2892 ARM/SPREADTRUM SoC SUPPORT 2893 2893 M: Orson Zhai <orsonzhai@gmail.com> 2894 2894 M: Baolin Wang <baolin.wang7@gmail.com> 2895 - M: Chunyan Zhang <zhang.lyra@gmail.com> 2895 + R: Chunyan Zhang <zhang.lyra@gmail.com> 2896 2896 S: Maintained 2897 2897 F: arch/arm64/boot/dts/sprd 2898 2898 N: sprd ··· 8833 8833 8834 8834 FREESCALE QUICC ENGINE LIBRARY 8835 8835 M: Qiang Zhao <qiang.zhao@nxp.com> 8836 + M: Christophe Leroy <christophe.leroy@csgroup.eu> 8836 8837 L: linuxppc-dev@lists.ozlabs.org 8837 8838 S: Maintained 8838 8839 F: drivers/soc/fsl/qe/ ··· 8883 8882 F: drivers/tty/serial/ucc_uart.c 8884 8883 8885 8884 FREESCALE SOC DRIVERS 8885 + M: Christophe Leroy <christophe.leroy@csgroup.eu> 8886 8886 L: linuxppc-dev@lists.ozlabs.org 8887 8887 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 8888 - S: Orphan 8888 + S: Maintained 8889 8889 F: Documentation/devicetree/bindings/misc/fsl,dpaa2-console.yaml 8890 8890 F: Documentation/devicetree/bindings/soc/fsl/ 8891 8891 F: drivers/soc/fsl/ ··· 16449 16447 OMAP1 SUPPORT 16450 16448 M: Aaro Koskinen <aaro.koskinen@iki.fi> 16451 16449 M: Janusz Krzysztofik <jmkrzyszt@gmail.com> 16452 - M: Tony Lindgren <tony@atomide.com> 16450 + R: Tony Lindgren <tony@atomide.com> 16453 16451 L: linux-omap@vger.kernel.org 16454 16452 S: Maintained 16455 16453 Q: http://patchwork.kernel.org/project/linux-omap/list/ ··· 16461 16459 F: include/linux/platform_data/i2c-omap.h 16462 16460 16463 16461 OMAP2+ SUPPORT 16462 + M: Aaro Koskinen <aaro.koskinen@iki.fi> 16463 + M: Andreas Kemnade <andreas@kemnade.info> 16464 + M: Kevin Hilman <khilman@baylibre.com> 16465 + M: Roger Quadros <rogerq@kernel.org> 16464 16466 M: Tony Lindgren <tony@atomide.com> 16465 16467 L: linux-omap@vger.kernel.org 16466 16468 S: Maintained 16467 - W: http://www.muru.com/linux/omap/ 16468 16469 W: http://linux.omap.com/ 16469 16470 Q: http://patchwork.kernel.org/project/linux-omap/list/ 16470 16471 T: git git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git

+1 -1

arch/arm/mach-davinci/pm.c

··· 61 61 62 62 /* Configure sleep count in deep sleep register */ 63 63 val = __raw_readl(pm_config.deepsleep_reg); 64 - val &= ~DEEPSLEEP_SLEEPCOUNT_MASK, 64 + val &= ~DEEPSLEEP_SLEEPCOUNT_MASK; 65 65 val |= pm_config.sleepcount; 66 66 __raw_writel(val, pm_config.deepsleep_reg); 67 67

+1 -1

arch/arm64/boot/dts/allwinner/sun50i-h64-remix-mini-pc.dts

··· 191 191 compatible = "x-powers,axp803"; 192 192 reg = <0x3a3>; 193 193 interrupt-parent = <&r_intc>; 194 - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_LOW>; 194 + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>; 195 195 x-powers,drive-vbus-en; 196 196 197 197 vin1-supply = <&reg_vcc5v>;

+15 -1

arch/arm64/boot/dts/qcom/qdu1000.dtsi

··· 1459 1459 1460 1460 system-cache-controller@19200000 { 1461 1461 compatible = "qcom,qdu1000-llcc"; 1462 - reg = <0 0x19200000 0 0xd80000>, 1462 + reg = <0 0x19200000 0 0x80000>, 1463 + <0 0x19300000 0 0x80000>, 1464 + <0 0x19600000 0 0x80000>, 1465 + <0 0x19700000 0 0x80000>, 1466 + <0 0x19a00000 0 0x80000>, 1467 + <0 0x19b00000 0 0x80000>, 1468 + <0 0x19e00000 0 0x80000>, 1469 + <0 0x19f00000 0 0x80000>, 1463 1470 <0 0x1a200000 0 0x80000>; 1464 1471 reg-names = "llcc0_base", 1472 + "llcc1_base", 1473 + "llcc2_base", 1474 + "llcc3_base", 1475 + "llcc4_base", 1476 + "llcc5_base", 1477 + "llcc6_base", 1478 + "llcc7_base", 1465 1479 "llcc_broadcast_base"; 1466 1480 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1467 1481 };

+1 -1

arch/arm64/boot/dts/qcom/sa8775p.dtsi

··· 3605 3605 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3606 3606 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3607 3607 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3608 - <GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 3608 + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 3609 3609 }; 3610 3610 3611 3611 pcie0: pcie@1c00000 {

+7 -4

arch/arm64/boot/dts/qcom/sc8180x.dtsi

··· 2647 2647 2648 2648 system-cache-controller@9200000 { 2649 2649 compatible = "qcom,sc8180x-llcc"; 2650 - reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>, 2651 - <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>, 2652 - <0 0x09600000 0 0x50000>; 2650 + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>, 2651 + <0 0x09300000 0 0x58000>, <0 0x09380000 0 0x58000>, 2652 + <0 0x09400000 0 0x58000>, <0 0x09480000 0 0x58000>, 2653 + <0 0x09500000 0 0x58000>, <0 0x09580000 0 0x58000>, 2654 + <0 0x09600000 0 0x58000>; 2653 2655 reg-names = "llcc0_base", "llcc1_base", "llcc2_base", 2654 - "llcc3_base", "llcc_broadcast_base"; 2656 + "llcc3_base", "llcc4_base", "llcc5_base", 2657 + "llcc6_base", "llcc7_base", "llcc_broadcast_base"; 2655 2658 interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; 2656 2659 }; 2657 2660

+1 -2

arch/arm64/boot/dts/qcom/sc8280xp-crd.dts

··· 977 977 reset-n-pins { 978 978 pins = "gpio99"; 979 979 function = "gpio"; 980 - output-high; 981 - drive-strength = <16>; 980 + bias-disable; 982 981 }; 983 982 }; 984 983

+8 -7

arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts

··· 655 655 656 656 status = "okay"; 657 657 658 - /* FIXME: verify */ 659 658 touchscreen@10 { 660 - compatible = "hid-over-i2c"; 659 + compatible = "elan,ekth5015m", "elan,ekth6915"; 661 660 reg = <0x10>; 662 661 663 - hid-descr-addr = <0x1>; 664 662 interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>; 665 - vdd-supply = <&vreg_misc_3p3>; 666 - vddl-supply = <&vreg_s10b>; 663 + reset-gpios = <&tlmm 99 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; 664 + no-reset-on-power-off; 665 + 666 + vcc33-supply = <&vreg_misc_3p3>; 667 + vccio-supply = <&vreg_misc_3p3>; 667 668 668 669 pinctrl-names = "default"; 669 670 pinctrl-0 = <&ts0_default>; ··· 1497 1496 reset-n-pins { 1498 1497 pins = "gpio99"; 1499 1498 function = "gpio"; 1500 - output-high; 1501 - drive-strength = <16>; 1499 + drive-strength = <2>; 1500 + bias-disable; 1502 1501 }; 1503 1502 }; 1504 1503

+2

arch/arm64/boot/dts/qcom/sc8280xp.dtsi

··· 4623 4623 restart@c264000 { 4624 4624 compatible = "qcom,pshold"; 4625 4625 reg = <0 0x0c264000 0 0x4>; 4626 + /* TZ seems to block access */ 4627 + status = "reserved"; 4626 4628 }; 4627 4629 4628 4630 tsens1: thermal-sensor@c265000 {

+1

arch/arm64/boot/dts/qcom/sm6115.dtsi

··· 1090 1090 1091 1091 power-domains = <&rpmpd SM6115_VDDCX>; 1092 1092 operating-points-v2 = <&sdhc1_opp_table>; 1093 + iommus = <&apps_smmu 0x00c0 0x0>; 1093 1094 interconnects = <&system_noc MASTER_SDCC_1 RPM_ALWAYS_TAG 1094 1095 &bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>, 1095 1096 <&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG

+11 -2

arch/arm64/boot/dts/qcom/x1e80100-crd.dts

··· 49 49 stdout-path = "serial0:115200n8"; 50 50 }; 51 51 52 + reserved-memory { 53 + linux,cma { 54 + compatible = "shared-dma-pool"; 55 + size = <0x0 0x8000000>; 56 + reusable; 57 + linux,cma-default; 58 + }; 59 + }; 60 + 52 61 sound { 53 62 compatible = "qcom,x1e80100-sndcard"; 54 63 model = "X1E80100-CRD"; ··· 102 93 }; 103 94 104 95 codec { 105 - sound-dai = <&wcd938x 1>, <&swr2 0>, <&lpass_txmacro 0>; 96 + sound-dai = <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>; 106 97 }; 107 98 108 99 platform { ··· 753 744 wcd_tx: codec@0,3 { 754 745 compatible = "sdw20217010d00"; 755 746 reg = <0 3>; 756 - qcom,tx-port-mapping = <1 1 2 3>; 747 + qcom,tx-port-mapping = <2 2 3 4>; 757 748 }; 758 749 }; 759 750

+9

arch/arm64/boot/dts/qcom/x1e80100-qcp.dts

··· 23 23 stdout-path = "serial0:115200n8"; 24 24 }; 25 25 26 + reserved-memory { 27 + linux,cma { 28 + compatible = "shared-dma-pool"; 29 + size = <0x0 0x8000000>; 30 + reusable; 31 + linux,cma-default; 32 + }; 33 + }; 34 + 26 35 vph_pwr: vph-pwr-regulator { 27 36 compatible = "regulator-fixed"; 28 37

+6 -4

arch/arm64/boot/dts/qcom/x1e80100.dtsi

··· 2737 2737 device_type = "pci"; 2738 2738 compatible = "qcom,pcie-x1e80100"; 2739 2739 reg = <0 0x01bf8000 0 0x3000>, 2740 - <0 0x70000000 0 0xf1d>, 2741 - <0 0x70000f20 0 0xa8>, 2740 + <0 0x70000000 0 0xf20>, 2741 + <0 0x70000f40 0 0xa8>, 2742 2742 <0 0x70001000 0 0x1000>, 2743 - <0 0x70100000 0 0x100000>; 2743 + <0 0x70100000 0 0x100000>, 2744 + <0 0x01bfb000 0 0x1000>; 2744 2745 reg-names = "parf", 2745 2746 "dbi", 2746 2747 "elbi", 2747 2748 "atu", 2748 - "config"; 2749 + "config", 2750 + "mhi"; 2749 2751 #address-cells = <3>; 2750 2752 #size-cells = <2>; 2751 2753 ranges = <0x01000000 0 0x00000000 0 0x70200000 0 0x100000>,

+1

arch/arm64/configs/defconfig

··· 1036 1036 CONFIG_HID_MULTITOUCH=m 1037 1037 CONFIG_I2C_HID_ACPI=m 1038 1038 CONFIG_I2C_HID_OF=m 1039 + CONFIG_I2C_HID_OF_ELAN=m 1039 1040 CONFIG_USB=y 1040 1041 CONFIG_USB_OTG=y 1041 1042 CONFIG_USB_XHCI_HCD=y

+29 -5

drivers/char/hpet.c

··· 269 269 if (!devp->hd_ireqfreq) 270 270 return -EIO; 271 271 272 - if (count < sizeof(unsigned long)) 273 - return -EINVAL; 272 + if (in_compat_syscall()) { 273 + if (count < sizeof(compat_ulong_t)) 274 + return -EINVAL; 275 + } else { 276 + if (count < sizeof(unsigned long)) 277 + return -EINVAL; 278 + } 274 279 275 280 add_wait_queue(&devp->hd_waitqueue, &wait); 276 281 ··· 299 294 schedule(); 300 295 } 301 296 302 - retval = put_user(data, (unsigned long __user *)buf); 303 - if (!retval) 304 - retval = sizeof(unsigned long); 297 + if (in_compat_syscall()) { 298 + retval = put_user(data, (compat_ulong_t __user *)buf); 299 + if (!retval) 300 + retval = sizeof(compat_ulong_t); 301 + } else { 302 + retval = put_user(data, (unsigned long __user *)buf); 303 + if (!retval) 304 + retval = sizeof(unsigned long); 305 + } 306 + 305 307 out: 306 308 __set_current_state(TASK_RUNNING); 307 309 remove_wait_queue(&devp->hd_waitqueue, &wait); ··· 663 651 unsigned short hi_timer; 664 652 }; 665 653 654 + /* 32-bit types would lead to different command codes which should be 655 + * translated into 64-bit ones before passed to hpet_ioctl_common 656 + */ 657 + #define COMPAT_HPET_INFO _IOR('h', 0x03, struct compat_hpet_info) 658 + #define COMPAT_HPET_IRQFREQ _IOW('h', 0x6, compat_ulong_t) 659 + 666 660 static long 667 661 hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 668 662 { 669 663 struct hpet_info info; 670 664 int err; 665 + 666 + if (cmd == COMPAT_HPET_INFO) 667 + cmd = HPET_INFO; 668 + 669 + if (cmd == COMPAT_HPET_IRQFREQ) 670 + cmd = HPET_IRQFREQ; 671 671 672 672 mutex_lock(&hpet_mutex); 673 673 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);

+164 -67

drivers/firmware/cirrus/cs_dsp.c

··· 1107 1107 int len; 1108 1108 }; 1109 1109 1110 - static int cs_dsp_coeff_parse_string(int bytes, const u8 **pos, const u8 **str) 1110 + static int cs_dsp_coeff_parse_string(int bytes, const u8 **pos, unsigned int avail, 1111 + const u8 **str) 1111 1112 { 1112 - int length; 1113 + int length, total_field_len; 1114 + 1115 + /* String fields are at least one __le32 */ 1116 + if (sizeof(__le32) > avail) { 1117 + *pos = NULL; 1118 + return 0; 1119 + } 1113 1120 1114 1121 switch (bytes) { 1115 1122 case 1: ··· 1129 1122 return 0; 1130 1123 } 1131 1124 1125 + total_field_len = ((length + bytes) + 3) & ~0x03; 1126 + if ((unsigned int)total_field_len > avail) { 1127 + *pos = NULL; 1128 + return 0; 1129 + } 1130 + 1132 1131 if (str) 1133 1132 *str = *pos + bytes; 1134 1133 1135 - *pos += ((length + bytes) + 3) & ~0x03; 1134 + *pos += total_field_len; 1136 1135 1137 1136 return length; 1138 1137 } ··· 1163 1150 return val; 1164 1151 } 1165 1152 1166 - static inline void cs_dsp_coeff_parse_alg(struct cs_dsp *dsp, const u8 **data, 1167 - struct cs_dsp_coeff_parsed_alg *blk) 1153 + static int cs_dsp_coeff_parse_alg(struct cs_dsp *dsp, 1154 + const struct wmfw_region *region, 1155 + struct cs_dsp_coeff_parsed_alg *blk) 1168 1156 { 1169 1157 const struct wmfw_adsp_alg_data *raw; 1158 + unsigned int data_len = le32_to_cpu(region->len); 1159 + unsigned int pos; 1160 + const u8 *tmp; 1161 + 1162 + raw = (const struct wmfw_adsp_alg_data *)region->data; 1170 1163 1171 1164 switch (dsp->fw_ver) { 1172 1165 case 0: 1173 1166 case 1: 1174 - raw = (const struct wmfw_adsp_alg_data *)*data; 1175 - *data = raw->data; 1167 + if (sizeof(*raw) > data_len) 1168 + return -EOVERFLOW; 1176 1169 1177 1170 blk->id = le32_to_cpu(raw->id); 1178 1171 blk->name = raw->name; 1179 - blk->name_len = strlen(raw->name); 1172 + blk->name_len = strnlen(raw->name, ARRAY_SIZE(raw->name)); 1180 1173 blk->ncoeff = le32_to_cpu(raw->ncoeff); 1174 + 1175 + pos = sizeof(*raw); 1181 1176 break; 1182 1177 default: 1183 - blk->id = cs_dsp_coeff_parse_int(sizeof(raw->id), data); 1184 - blk->name_len = cs_dsp_coeff_parse_string(sizeof(u8), data, 1178 + if (sizeof(raw->id) > data_len) 1179 + return -EOVERFLOW; 1180 + 1181 + tmp = region->data; 1182 + blk->id = cs_dsp_coeff_parse_int(sizeof(raw->id), &tmp); 1183 + pos = tmp - region->data; 1184 + 1185 + tmp = &region->data[pos]; 1186 + blk->name_len = cs_dsp_coeff_parse_string(sizeof(u8), &tmp, data_len - pos, 1185 1187 &blk->name); 1186 - cs_dsp_coeff_parse_string(sizeof(u16), data, NULL); 1187 - blk->ncoeff = cs_dsp_coeff_parse_int(sizeof(raw->ncoeff), data); 1188 + if (!tmp) 1189 + return -EOVERFLOW; 1190 + 1191 + pos = tmp - region->data; 1192 + cs_dsp_coeff_parse_string(sizeof(u16), &tmp, data_len - pos, NULL); 1193 + if (!tmp) 1194 + return -EOVERFLOW; 1195 + 1196 + pos = tmp - region->data; 1197 + if (sizeof(raw->ncoeff) > (data_len - pos)) 1198 + return -EOVERFLOW; 1199 + 1200 + blk->ncoeff = cs_dsp_coeff_parse_int(sizeof(raw->ncoeff), &tmp); 1201 + pos += sizeof(raw->ncoeff); 1188 1202 break; 1189 1203 } 1204 + 1205 + if ((int)blk->ncoeff < 0) 1206 + return -EOVERFLOW; 1190 1207 1191 1208 cs_dsp_dbg(dsp, "Algorithm ID: %#x\n", blk->id); 1192 1209 cs_dsp_dbg(dsp, "Algorithm name: %.*s\n", blk->name_len, blk->name); 1193 1210 cs_dsp_dbg(dsp, "# of coefficient descriptors: %#x\n", blk->ncoeff); 1211 + 1212 + return pos; 1194 1213 } 1195 1214 1196 - static inline void cs_dsp_coeff_parse_coeff(struct cs_dsp *dsp, const u8 **data, 1197 - struct cs_dsp_coeff_parsed_coeff *blk) 1215 + static int cs_dsp_coeff_parse_coeff(struct cs_dsp *dsp, 1216 + const struct wmfw_region *region, 1217 + unsigned int pos, 1218 + struct cs_dsp_coeff_parsed_coeff *blk) 1198 1219 { 1199 1220 const struct wmfw_adsp_coeff_data *raw; 1221 + unsigned int data_len = le32_to_cpu(region->len); 1222 + unsigned int blk_len, blk_end_pos; 1200 1223 const u8 *tmp; 1201 - int length; 1224 + 1225 + raw = (const struct wmfw_adsp_coeff_data *)&region->data[pos]; 1226 + if (sizeof(raw->hdr) > (data_len - pos)) 1227 + return -EOVERFLOW; 1228 + 1229 + blk_len = le32_to_cpu(raw->hdr.size); 1230 + if (blk_len > S32_MAX) 1231 + return -EOVERFLOW; 1232 + 1233 + if (blk_len > (data_len - pos - sizeof(raw->hdr))) 1234 + return -EOVERFLOW; 1235 + 1236 + blk_end_pos = pos + sizeof(raw->hdr) + blk_len; 1237 + 1238 + blk->offset = le16_to_cpu(raw->hdr.offset); 1239 + blk->mem_type = le16_to_cpu(raw->hdr.type); 1202 1240 1203 1241 switch (dsp->fw_ver) { 1204 1242 case 0: 1205 1243 case 1: 1206 - raw = (const struct wmfw_adsp_coeff_data *)*data; 1207 - *data = *data + sizeof(raw->hdr) + le32_to_cpu(raw->hdr.size); 1244 + if (sizeof(*raw) > (data_len - pos)) 1245 + return -EOVERFLOW; 1208 1246 1209 - blk->offset = le16_to_cpu(raw->hdr.offset); 1210 - blk->mem_type = le16_to_cpu(raw->hdr.type); 1211 1247 blk->name = raw->name; 1212 - blk->name_len = strlen(raw->name); 1248 + blk->name_len = strnlen(raw->name, ARRAY_SIZE(raw->name)); 1213 1249 blk->ctl_type = le16_to_cpu(raw->ctl_type); 1214 1250 blk->flags = le16_to_cpu(raw->flags); 1215 1251 blk->len = le32_to_cpu(raw->len); 1216 1252 break; 1217 1253 default: 1218 - tmp = *data; 1219 - blk->offset = cs_dsp_coeff_parse_int(sizeof(raw->hdr.offset), &tmp); 1220 - blk->mem_type = cs_dsp_coeff_parse_int(sizeof(raw->hdr.type), &tmp); 1221 - length = cs_dsp_coeff_parse_int(sizeof(raw->hdr.size), &tmp); 1222 - blk->name_len = cs_dsp_coeff_parse_string(sizeof(u8), &tmp, 1254 + pos += sizeof(raw->hdr); 1255 + tmp = &region->data[pos]; 1256 + blk->name_len = cs_dsp_coeff_parse_string(sizeof(u8), &tmp, data_len - pos, 1223 1257 &blk->name); 1224 - cs_dsp_coeff_parse_string(sizeof(u8), &tmp, NULL); 1225 - cs_dsp_coeff_parse_string(sizeof(u16), &tmp, NULL); 1226 - blk->ctl_type = cs_dsp_coeff_parse_int(sizeof(raw->ctl_type), &tmp); 1227 - blk->flags = cs_dsp_coeff_parse_int(sizeof(raw->flags), &tmp); 1228 - blk->len = cs_dsp_coeff_parse_int(sizeof(raw->len), &tmp); 1258 + if (!tmp) 1259 + return -EOVERFLOW; 1229 1260 1230 - *data = *data + sizeof(raw->hdr) + length; 1261 + pos = tmp - region->data; 1262 + cs_dsp_coeff_parse_string(sizeof(u8), &tmp, data_len - pos, NULL); 1263 + if (!tmp) 1264 + return -EOVERFLOW; 1265 + 1266 + pos = tmp - region->data; 1267 + cs_dsp_coeff_parse_string(sizeof(u16), &tmp, data_len - pos, NULL); 1268 + if (!tmp) 1269 + return -EOVERFLOW; 1270 + 1271 + pos = tmp - region->data; 1272 + if (sizeof(raw->ctl_type) + sizeof(raw->flags) + sizeof(raw->len) > 1273 + (data_len - pos)) 1274 + return -EOVERFLOW; 1275 + 1276 + blk->ctl_type = cs_dsp_coeff_parse_int(sizeof(raw->ctl_type), &tmp); 1277 + pos += sizeof(raw->ctl_type); 1278 + blk->flags = cs_dsp_coeff_parse_int(sizeof(raw->flags), &tmp); 1279 + pos += sizeof(raw->flags); 1280 + blk->len = cs_dsp_coeff_parse_int(sizeof(raw->len), &tmp); 1231 1281 break; 1232 1282 } 1233 1283 ··· 1300 1224 cs_dsp_dbg(dsp, "\tCoefficient flags: %#x\n", blk->flags); 1301 1225 cs_dsp_dbg(dsp, "\tALSA control type: %#x\n", blk->ctl_type); 1302 1226 cs_dsp_dbg(dsp, "\tALSA control len: %#x\n", blk->len); 1227 + 1228 + return blk_end_pos; 1303 1229 } 1304 1230 1305 1231 static int cs_dsp_check_coeff_flags(struct cs_dsp *dsp, ··· 1325 1247 struct cs_dsp_alg_region alg_region = {}; 1326 1248 struct cs_dsp_coeff_parsed_alg alg_blk; 1327 1249 struct cs_dsp_coeff_parsed_coeff coeff_blk; 1328 - const u8 *data = region->data; 1329 - int i, ret; 1250 + int i, pos, ret; 1330 1251 1331 - cs_dsp_coeff_parse_alg(dsp, &data, &alg_blk); 1252 + pos = cs_dsp_coeff_parse_alg(dsp, region, &alg_blk); 1253 + if (pos < 0) 1254 + return pos; 1255 + 1332 1256 for (i = 0; i < alg_blk.ncoeff; i++) { 1333 - cs_dsp_coeff_parse_coeff(dsp, &data, &coeff_blk); 1257 + pos = cs_dsp_coeff_parse_coeff(dsp, region, pos, &coeff_blk); 1258 + if (pos < 0) 1259 + return pos; 1334 1260 1335 1261 switch (coeff_blk.ctl_type) { 1336 1262 case WMFW_CTL_TYPE_BYTES: ··· 1403 1321 const struct wmfw_adsp1_sizes *adsp1_sizes; 1404 1322 1405 1323 adsp1_sizes = (void *)&firmware->data[pos]; 1324 + if (sizeof(*adsp1_sizes) > firmware->size - pos) { 1325 + cs_dsp_err(dsp, "%s: file truncated\n", file); 1326 + return 0; 1327 + } 1406 1328 1407 1329 cs_dsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n", file, 1408 1330 le32_to_cpu(adsp1_sizes->dm), le32_to_cpu(adsp1_sizes->pm), ··· 1423 1337 const struct wmfw_adsp2_sizes *adsp2_sizes; 1424 1338 1425 1339 adsp2_sizes = (void *)&firmware->data[pos]; 1340 + if (sizeof(*adsp2_sizes) > firmware->size - pos) { 1341 + cs_dsp_err(dsp, "%s: file truncated\n", file); 1342 + return 0; 1343 + } 1426 1344 1427 1345 cs_dsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n", file, 1428 1346 le32_to_cpu(adsp2_sizes->xm), le32_to_cpu(adsp2_sizes->ym), ··· 1466 1376 struct regmap *regmap = dsp->regmap; 1467 1377 unsigned int pos = 0; 1468 1378 const struct wmfw_header *header; 1469 - const struct wmfw_adsp1_sizes *adsp1_sizes; 1470 1379 const struct wmfw_footer *footer; 1471 1380 const struct wmfw_region *region; 1472 1381 const struct cs_dsp_region *mem; ··· 1481 1392 1482 1393 ret = -EINVAL; 1483 1394 1484 - pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer); 1485 - if (pos >= firmware->size) { 1486 - cs_dsp_err(dsp, "%s: file too short, %zu bytes\n", 1487 - file, firmware->size); 1395 + if (sizeof(*header) >= firmware->size) { 1396 + ret = -EOVERFLOW; 1488 1397 goto out_fw; 1489 1398 } 1490 1399 ··· 1510 1423 1511 1424 pos = sizeof(*header); 1512 1425 pos = dsp->ops->parse_sizes(dsp, file, pos, firmware); 1426 + if ((pos == 0) || (sizeof(*footer) > firmware->size - pos)) { 1427 + ret = -EOVERFLOW; 1428 + goto out_fw; 1429 + } 1513 1430 1514 1431 footer = (void *)&firmware->data[pos]; 1515 1432 pos += sizeof(*footer); 1516 1433 1517 1434 if (le32_to_cpu(header->len) != pos) { 1518 - cs_dsp_err(dsp, "%s: unexpected header length %d\n", 1519 - file, le32_to_cpu(header->len)); 1435 + ret = -EOVERFLOW; 1520 1436 goto out_fw; 1521 1437 } 1522 1438 1523 1439 cs_dsp_dbg(dsp, "%s: timestamp %llu\n", file, 1524 1440 le64_to_cpu(footer->timestamp)); 1525 1441 1526 - while (pos < firmware->size && 1527 - sizeof(*region) < firmware->size - pos) { 1442 + while (pos < firmware->size) { 1443 + /* Is there enough data for a complete block header? */ 1444 + if (sizeof(*region) > firmware->size - pos) { 1445 + ret = -EOVERFLOW; 1446 + goto out_fw; 1447 + } 1448 + 1528 1449 region = (void *)&(firmware->data[pos]); 1450 + 1451 + if (le32_to_cpu(region->len) > firmware->size - pos - sizeof(*region)) { 1452 + ret = -EOVERFLOW; 1453 + goto out_fw; 1454 + } 1455 + 1529 1456 region_name = "Unknown"; 1530 1457 reg = 0; 1531 1458 text = NULL; ··· 1596 1495 regions, le32_to_cpu(region->len), offset, 1597 1496 region_name); 1598 1497 1599 - if (le32_to_cpu(region->len) > 1600 - firmware->size - pos - sizeof(*region)) { 1601 - cs_dsp_err(dsp, 1602 - "%s.%d: %s region len %d bytes exceeds file length %zu\n", 1603 - file, regions, region_name, 1604 - le32_to_cpu(region->len), firmware->size); 1605 - ret = -EINVAL; 1606 - goto out_fw; 1607 - } 1608 - 1609 1498 if (text) { 1610 1499 memcpy(text, region->data, le32_to_cpu(region->len)); 1611 1500 cs_dsp_info(dsp, "%s: %s\n", file, text); ··· 1645 1554 regmap_async_complete(regmap); 1646 1555 cs_dsp_buf_free(&buf_list); 1647 1556 kfree(text); 1557 + 1558 + if (ret == -EOVERFLOW) 1559 + cs_dsp_err(dsp, "%s: file content overflows file data\n", file); 1648 1560 1649 1561 return ret; 1650 1562 } ··· 2216 2122 pos = le32_to_cpu(hdr->len); 2217 2123 2218 2124 blocks = 0; 2219 - while (pos < firmware->size && 2220 - sizeof(*blk) < firmware->size - pos) { 2125 + while (pos < firmware->size) { 2126 + /* Is there enough data for a complete block header? */ 2127 + if (sizeof(*blk) > firmware->size - pos) { 2128 + ret = -EOVERFLOW; 2129 + goto out_fw; 2130 + } 2131 + 2221 2132 blk = (void *)(&firmware->data[pos]); 2133 + 2134 + if (le32_to_cpu(blk->len) > firmware->size - pos - sizeof(*blk)) { 2135 + ret = -EOVERFLOW; 2136 + goto out_fw; 2137 + } 2222 2138 2223 2139 type = le16_to_cpu(blk->type); 2224 2140 offset = le16_to_cpu(blk->offset); ··· 2326 2222 } 2327 2223 2328 2224 if (reg) { 2329 - if (le32_to_cpu(blk->len) > 2330 - firmware->size - pos - sizeof(*blk)) { 2331 - cs_dsp_err(dsp, 2332 - "%s.%d: %s region len %d bytes exceeds file length %zu\n", 2333 - file, blocks, region_name, 2334 - le32_to_cpu(blk->len), 2335 - firmware->size); 2336 - ret = -EINVAL; 2337 - goto out_fw; 2338 - } 2339 - 2340 2225 buf = cs_dsp_buf_alloc(blk->data, 2341 2226 le32_to_cpu(blk->len), 2342 2227 &buf_list); ··· 2365 2272 regmap_async_complete(regmap); 2366 2273 cs_dsp_buf_free(&buf_list); 2367 2274 kfree(text); 2275 + 2276 + if (ret == -EOVERFLOW) 2277 + cs_dsp_err(dsp, "%s: file content overflows file data\n", file); 2278 + 2368 2279 return ret; 2369 2280 } 2370 2281

+1 -1

drivers/iio/industrialio-trigger.c

··· 315 315 * this is the case if the IIO device and the trigger device share the 316 316 * same parent device. 317 317 */ 318 - if (iio_validate_own_trigger(pf->indio_dev, trig)) 318 + if (!iio_validate_own_trigger(pf->indio_dev, trig)) 319 319 trig->attached_own_device = true; 320 320 321 321 return ret;

+2 -2

drivers/iio/light/apds9306.c

··· 583 583 return ret; 584 584 585 585 intg_old = iio_gts_find_int_time_by_sel(&data->gts, intg_time_idx); 586 - if (ret < 0) 587 - return ret; 586 + if (intg_old < 0) 587 + return intg_old; 588 588 589 589 if (intg_old == val2) 590 590 return 0;

+1 -1

drivers/md/dm-vdo/dm-vdo-target.c

··· 945 945 * The value is used by dm-thin to determine whether to pass down discards. The block layer 946 946 * splits large discards on this boundary when this is set. 947 947 */ 948 - limits->max_discard_sectors = 948 + limits->max_hw_discard_sectors = 949 949 (vdo->device_config->max_discard_blocks * VDO_SECTORS_PER_BLOCK); 950 950 951 951 /*

+32 -9

drivers/misc/fastrpc.c

··· 1238 1238 struct fastrpc_phy_page pages[1]; 1239 1239 char *name; 1240 1240 int err; 1241 + bool scm_done = false; 1241 1242 struct { 1242 1243 int pgid; 1243 1244 u32 namelen; ··· 1290 1289 fl->cctx->remote_heap->phys, fl->cctx->remote_heap->size, err); 1291 1290 goto err_map; 1292 1291 } 1292 + scm_done = true; 1293 1293 } 1294 1294 } 1295 1295 ··· 1322 1320 goto err_invoke; 1323 1321 1324 1322 kfree(args); 1323 + kfree(name); 1325 1324 1326 1325 return 0; 1327 1326 err_invoke: 1328 - if (fl->cctx->vmcount) { 1327 + if (fl->cctx->vmcount && scm_done) { 1329 1328 u64 src_perms = 0; 1330 1329 struct qcom_scm_vmperm dst_perms; 1331 1330 u32 i; ··· 1696 1693 { 1697 1694 struct fastrpc_invoke_args args[2] = { 0 }; 1698 1695 1699 - /* Capability filled in userspace */ 1696 + /* 1697 + * Capability filled in userspace. This carries the information 1698 + * about the remoteproc support which is fetched from the remoteproc 1699 + * sysfs node by userspace. 1700 + */ 1700 1701 dsp_attr_buf[0] = 0; 1702 + dsp_attr_buf_len -= 1; 1701 1703 1702 1704 args[0].ptr = (u64)(uintptr_t)&dsp_attr_buf_len; 1703 1705 args[0].length = sizeof(dsp_attr_buf_len); 1704 1706 args[0].fd = -1; 1705 1707 args[1].ptr = (u64)(uintptr_t)&dsp_attr_buf[1]; 1706 - args[1].length = dsp_attr_buf_len; 1708 + args[1].length = dsp_attr_buf_len * sizeof(u32); 1707 1709 args[1].fd = -1; 1708 - fl->pd = USER_PD; 1709 1710 1710 1711 return fastrpc_internal_invoke(fl, true, FASTRPC_DSP_UTILITIES_HANDLE, 1711 1712 FASTRPC_SCALARS(0, 1, 1), args); ··· 1737 1730 if (!dsp_attributes) 1738 1731 return -ENOMEM; 1739 1732 1740 - err = fastrpc_get_info_from_dsp(fl, dsp_attributes, FASTRPC_MAX_DSP_ATTRIBUTES_LEN); 1733 + err = fastrpc_get_info_from_dsp(fl, dsp_attributes, FASTRPC_MAX_DSP_ATTRIBUTES); 1741 1734 if (err == DSP_UNSUPPORTED_API) { 1742 1735 dev_info(&cctx->rpdev->dev, 1743 1736 "Warning: DSP capabilities not supported on domain: %d\n", domain); ··· 1790 1783 if (err) 1791 1784 return err; 1792 1785 1793 - if (copy_to_user(argp, &cap.capability, sizeof(cap.capability))) 1786 + if (copy_to_user(argp, &cap, sizeof(cap))) 1794 1787 return -EFAULT; 1795 1788 1796 1789 return 0; ··· 2087 2080 return err; 2088 2081 } 2089 2082 2083 + static int is_attach_rejected(struct fastrpc_user *fl) 2084 + { 2085 + /* Check if the device node is non-secure */ 2086 + if (!fl->is_secure_dev) { 2087 + dev_dbg(&fl->cctx->rpdev->dev, "untrusted app trying to attach to privileged DSP PD\n"); 2088 + return -EACCES; 2089 + } 2090 + return 0; 2091 + } 2092 + 2090 2093 static long fastrpc_device_ioctl(struct file *file, unsigned int cmd, 2091 2094 unsigned long arg) 2092 2095 { ··· 2109 2092 err = fastrpc_invoke(fl, argp); 2110 2093 break; 2111 2094 case FASTRPC_IOCTL_INIT_ATTACH: 2112 - err = fastrpc_init_attach(fl, ROOT_PD); 2095 + err = is_attach_rejected(fl); 2096 + if (!err) 2097 + err = fastrpc_init_attach(fl, ROOT_PD); 2113 2098 break; 2114 2099 case FASTRPC_IOCTL_INIT_ATTACH_SNS: 2115 - err = fastrpc_init_attach(fl, SENSORS_PD); 2100 + err = is_attach_rejected(fl); 2101 + if (!err) 2102 + err = fastrpc_init_attach(fl, SENSORS_PD); 2116 2103 break; 2117 2104 case FASTRPC_IOCTL_INIT_CREATE_STATIC: 2118 - err = fastrpc_init_create_static_process(fl, argp); 2105 + err = is_attach_rejected(fl); 2106 + if (!err) 2107 + err = fastrpc_init_create_static_process(fl, argp); 2119 2108 break; 2120 2109 case FASTRPC_IOCTL_INIT_CREATE: 2121 2110 err = fastrpc_init_create_process(fl, argp);

-4

drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_otpe2p.c

··· 153 153 154 154 buf[byte] = readl(rb + MMAP_EEPROM_OFFSET(EEPROM_DATA_REG)); 155 155 } 156 - ret = byte; 157 156 error: 158 157 release_sys_lock(priv); 159 158 return ret; ··· 196 197 goto error; 197 198 } 198 199 } 199 - ret = byte; 200 200 error: 201 201 release_sys_lock(priv); 202 202 return ret; ··· 256 258 257 259 buf[byte] = readl(rb + MMAP_OTP_OFFSET(OTP_RD_DATA_OFFSET)); 258 260 } 259 - ret = byte; 260 261 error: 261 262 release_sys_lock(priv); 262 263 return ret; ··· 312 315 goto error; 313 316 } 314 317 } 315 - ret = byte; 316 318 error: 317 319 release_sys_lock(priv); 318 320 return ret;

+2 -2

drivers/misc/mei/platform-vsc.c

··· 28 28 29 29 #define MEI_VSC_MAX_MSG_SIZE 512 30 30 31 - #define MEI_VSC_POLL_DELAY_US (50 * USEC_PER_MSEC) 32 - #define MEI_VSC_POLL_TIMEOUT_US (200 * USEC_PER_MSEC) 31 + #define MEI_VSC_POLL_DELAY_US (100 * USEC_PER_MSEC) 32 + #define MEI_VSC_POLL_TIMEOUT_US (400 * USEC_PER_MSEC) 33 33 34 34 #define mei_dev_to_vsc_hw(dev) ((struct mei_vsc_hw *)((dev)->hw)) 35 35

+1 -1

drivers/misc/mei/vsc-fw-loader.c

··· 204 204 205 205 /** 206 206 * struct vsc_fw_loader - represent vsc firmware loader 207 - * @dev: device used to request fimware 207 + * @dev: device used to request firmware 208 208 * @tp: transport layer used with the firmware loader 209 209 * @csi: CSI image 210 210 * @ace: ACE image

+16 -2

drivers/misc/mei/vsc-tp.c

··· 331 331 return ret; 332 332 } 333 333 334 - ret = vsc_tp_dev_xfer(tp, tp->tx_buf, tp->rx_buf, len); 334 + ret = vsc_tp_dev_xfer(tp, tp->tx_buf, ibuf ? tp->rx_buf : NULL, len); 335 335 if (ret) 336 336 return ret; 337 337 338 338 if (ibuf) 339 - cpu_to_be32_array(ibuf, tp->rx_buf, words); 339 + be32_to_cpu_array(ibuf, tp->rx_buf, words); 340 340 341 341 return ret; 342 342 } ··· 568 568 free_irq(spi->irq, tp); 569 569 } 570 570 571 + static void vsc_tp_shutdown(struct spi_device *spi) 572 + { 573 + struct vsc_tp *tp = spi_get_drvdata(spi); 574 + 575 + platform_device_unregister(tp->pdev); 576 + 577 + mutex_destroy(&tp->mutex); 578 + 579 + vsc_tp_reset(tp); 580 + 581 + free_irq(spi->irq, tp); 582 + } 583 + 571 584 static const struct acpi_device_id vsc_tp_acpi_ids[] = { 572 585 { "INTC1009" }, /* Raptor Lake */ 573 586 { "INTC1058" }, /* Tiger Lake */ ··· 593 580 static struct spi_driver vsc_tp_driver = { 594 581 .probe = vsc_tp_probe, 595 582 .remove = vsc_tp_remove, 583 + .shutdown = vsc_tp_shutdown, 596 584 .driver = { 597 585 .name = "vsc-tp", 598 586 .acpi_match_table = vsc_tp_acpi_ids,

+3

drivers/mmc/host/davinci_mmc.c

··· 224 224 } 225 225 p = sgm->addr; 226 226 227 + if (n > sgm->length) 228 + n = sgm->length; 229 + 227 230 /* NOTE: we never transfer more than rw_threshold bytes 228 231 * to/from the fifo here; there's no I/O overlap. 229 232 * This also assumes that access width( i.e. ACCWD) is 4 bytes

+15

drivers/mmc/host/sdhci.c

··· 4727 4727 if (host->quirks & SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC) { 4728 4728 host->max_adma = 65532; /* 32-bit alignment */ 4729 4729 mmc->max_seg_size = 65535; 4730 + /* 4731 + * sdhci_adma_table_pre() expects to define 1 DMA 4732 + * descriptor per segment, so the maximum segment size 4733 + * is set accordingly. SDHCI allows up to 64KiB per DMA 4734 + * descriptor (16-bit field), but some controllers do 4735 + * not support "zero means 65536" reducing the maximum 4736 + * for them to 65535. That is a problem if PAGE_SIZE is 4737 + * 64KiB because the block layer does not support 4738 + * max_seg_size < PAGE_SIZE, however 4739 + * sdhci_adma_table_pre() has a workaround to handle 4740 + * that case, and split the descriptor. Refer also 4741 + * comment in sdhci_adma_table_pre(). 4742 + */ 4743 + if (mmc->max_seg_size < PAGE_SIZE) 4744 + mmc->max_seg_size = PAGE_SIZE; 4730 4745 } else { 4731 4746 mmc->max_seg_size = 65536; 4732 4747 }

-4

drivers/net/ethernet/intel/i40e/i40e_adminq.h

··· 109 109 -EFBIG, /* I40E_AQ_RC_EFBIG */ 110 110 }; 111 111 112 - /* aq_rc is invalid if AQ timed out */ 113 - if (aq_ret == -EIO) 114 - return -EAGAIN; 115 - 116 112 if (!((u32)aq_rc < (sizeof(aq_to_posix) / sizeof((aq_to_posix)[0])))) 117 113 return -ERANGE; 118 114

+1 -1

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

··· 1753 1753 u16 nix_pf_func; 1754 1754 u16 sso_pf_func; 1755 1755 u16 eng_grpmsk; 1756 - int blkaddr; 1756 + u8 blkaddr; 1757 1757 u8 ctx_ilen_valid : 1; 1758 1758 u8 ctx_ilen : 7; 1759 1759 };

+6 -2

drivers/net/ethernet/marvell/octeontx2/af/npc.h

··· 63 63 NPC_LT_LB_CUSTOM1 = 0xF, 64 64 }; 65 65 66 + /* Don't modify ltypes up to IP6_EXT, otherwise length and checksum of IP 67 + * headers may not be checked correctly. IPv4 ltypes and IPv6 ltypes must 68 + * differ only at bit 0 so mask 0xE can be used to detect extended headers. 69 + */ 66 70 enum npc_kpu_lc_ltype { 67 - NPC_LT_LC_IP = 1, 71 + NPC_LT_LC_PTP = 1, 72 + NPC_LT_LC_IP, 68 73 NPC_LT_LC_IP_OPT, 69 74 NPC_LT_LC_IP6, 70 75 NPC_LT_LC_IP6_EXT, ··· 77 72 NPC_LT_LC_RARP, 78 73 NPC_LT_LC_MPLS, 79 74 NPC_LT_LC_NSH, 80 - NPC_LT_LC_PTP, 81 75 NPC_LT_LC_FCOE, 82 76 NPC_LT_LC_NGIO, 83 77 NPC_LT_LC_CUSTOM0 = 0xE,

+16 -7

drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c

··· 696 696 struct cpt_rd_wr_reg_msg *req, 697 697 struct cpt_rd_wr_reg_msg *rsp) 698 698 { 699 - int blkaddr; 699 + u64 offset = req->reg_offset; 700 + int blkaddr, lf; 700 701 701 702 blkaddr = validate_and_get_cpt_blkaddr(req->blkaddr); 702 703 if (blkaddr < 0) ··· 708 707 !is_cpt_vf(rvu, req->hdr.pcifunc)) 709 708 return CPT_AF_ERR_ACCESS_DENIED; 710 709 711 - rsp->reg_offset = req->reg_offset; 712 - rsp->ret_val = req->ret_val; 713 - rsp->is_write = req->is_write; 714 - 715 710 if (!is_valid_offset(rvu, req)) 716 711 return CPT_AF_ERR_ACCESS_DENIED; 717 712 713 + /* Translate local LF used by VFs to global CPT LF */ 714 + lf = rvu_get_lf(rvu, &rvu->hw->block[blkaddr], req->hdr.pcifunc, 715 + (offset & 0xFFF) >> 3); 716 + 717 + /* Translate local LF's offset to global CPT LF's offset */ 718 + offset &= 0xFF000; 719 + offset += lf << 3; 720 + 721 + rsp->reg_offset = offset; 722 + rsp->ret_val = req->ret_val; 723 + rsp->is_write = req->is_write; 724 + 718 725 if (req->is_write) 719 - rvu_write64(rvu, blkaddr, req->reg_offset, req->val); 726 + rvu_write64(rvu, blkaddr, offset, req->val); 720 727 else 721 - rsp->val = rvu_read64(rvu, blkaddr, req->reg_offset); 728 + rsp->val = rvu_read64(rvu, blkaddr, offset); 722 729 723 730 return 0; 724 731 }

+8 -4

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

··· 3862 3862 return -ERANGE; 3863 3863 } 3864 3864 3865 + /* Mask to match ipv6(NPC_LT_LC_IP6) and ipv6 ext(NPC_LT_LC_IP6_EXT) */ 3866 + #define NPC_LT_LC_IP6_MATCH_MSK ((~(NPC_LT_LC_IP6 ^ NPC_LT_LC_IP6_EXT)) & 0xf) 3867 + /* Mask to match both ipv4(NPC_LT_LC_IP) and ipv4 ext(NPC_LT_LC_IP_OPT) */ 3868 + #define NPC_LT_LC_IP_MATCH_MSK ((~(NPC_LT_LC_IP ^ NPC_LT_LC_IP_OPT)) & 0xf) 3869 + 3865 3870 static int set_flowkey_fields(struct nix_rx_flowkey_alg *alg, u32 flow_cfg) 3866 3871 { 3867 3872 int idx, nr_field, key_off, field_marker, keyoff_marker; ··· 3936 3931 field->hdr_offset = 9; /* offset */ 3937 3932 field->bytesm1 = 0; /* 1 byte */ 3938 3933 field->ltype_match = NPC_LT_LC_IP; 3939 - field->ltype_mask = 0xF; 3934 + field->ltype_mask = NPC_LT_LC_IP_MATCH_MSK; 3940 3935 break; 3941 3936 case NIX_FLOW_KEY_TYPE_IPV4: 3942 3937 case NIX_FLOW_KEY_TYPE_INNR_IPV4: ··· 3963 3958 field->bytesm1 = 3; /* DIP, 4 bytes */ 3964 3959 } 3965 3960 } 3966 - 3967 - field->ltype_mask = 0xF; /* Match only IPv4 */ 3961 + field->ltype_mask = NPC_LT_LC_IP_MATCH_MSK; 3968 3962 keyoff_marker = false; 3969 3963 break; 3970 3964 case NIX_FLOW_KEY_TYPE_IPV6: ··· 3992 3988 field->bytesm1 = 15; /* DIP,16 bytes */ 3993 3989 } 3994 3990 } 3995 - field->ltype_mask = 0xF; /* Match only IPv6 */ 3991 + field->ltype_mask = NPC_LT_LC_IP6_MATCH_MSK; 3996 3992 break; 3997 3993 case NIX_FLOW_KEY_TYPE_TCP: 3998 3994 case NIX_FLOW_KEY_TYPE_UDP:

+3 -4

drivers/nvmem/core.c

··· 396 396 if (!config->base_dev) 397 397 return -EINVAL; 398 398 399 - if (config->type == NVMEM_TYPE_FRAM) 400 - bin_attr_nvmem_eeprom_compat.attr.name = "fram"; 401 - 402 399 nvmem->eeprom = bin_attr_nvmem_eeprom_compat; 400 + if (config->type == NVMEM_TYPE_FRAM) 401 + nvmem->eeprom.attr.name = "fram"; 403 402 nvmem->eeprom.attr.mode = nvmem_bin_attr_get_umode(nvmem); 404 403 nvmem->eeprom.size = nvmem->size; 405 404 #ifdef CONFIG_DEBUG_LOCK_ALLOC ··· 462 463 "%s@%x,%x", entry->name, 463 464 entry->offset, 464 465 entry->bit_offset); 465 - attrs[i].attr.mode = 0444; 466 + attrs[i].attr.mode = 0444 & nvmem_bin_attr_get_umode(nvmem); 466 467 attrs[i].size = entry->bytes; 467 468 attrs[i].read = &nvmem_cell_attr_read; 468 469 attrs[i].private = entry;

+10 -4

drivers/nvmem/meson-efuse.c

··· 18 18 void *val, size_t bytes) 19 19 { 20 20 struct meson_sm_firmware *fw = context; 21 + int ret; 21 22 22 - return meson_sm_call_read(fw, (u8 *)val, bytes, SM_EFUSE_READ, offset, 23 - bytes, 0, 0, 0); 23 + ret = meson_sm_call_read(fw, (u8 *)val, bytes, SM_EFUSE_READ, offset, 24 + bytes, 0, 0, 0); 25 + 26 + return ret < 0 ? ret : 0; 24 27 } 25 28 26 29 static int meson_efuse_write(void *context, unsigned int offset, 27 30 void *val, size_t bytes) 28 31 { 29 32 struct meson_sm_firmware *fw = context; 33 + int ret; 30 34 31 - return meson_sm_call_write(fw, (u8 *)val, bytes, SM_EFUSE_WRITE, offset, 32 - bytes, 0, 0, 0); 35 + ret = meson_sm_call_write(fw, (u8 *)val, bytes, SM_EFUSE_WRITE, offset, 36 + bytes, 0, 0, 0); 37 + 38 + return ret < 0 ? ret : 0; 33 39 } 34 40 35 41 static const struct of_device_id meson_efuse_match[] = {

+4 -1

drivers/nvmem/rmem.c

··· 46 46 47 47 memunmap(addr); 48 48 49 - return count; 49 + if (count < 0) 50 + return count; 51 + 52 + return count == bytes ? 0 : -EIO; 50 53 } 51 54 52 55 static int rmem_probe(struct platform_device *pdev)

+7

drivers/pmdomain/qcom/rpmhpd.c

··· 40 40 * @addr: Resource address as looped up using resource name from 41 41 * cmd-db 42 42 * @state_synced: Indicator that sync_state has been invoked for the rpmhpd resource 43 + * @skip_retention_level: Indicate that retention level should not be used for the power domain 43 44 */ 44 45 struct rpmhpd { 45 46 struct device *dev; ··· 57 56 const char *res_name; 58 57 u32 addr; 59 58 bool state_synced; 59 + bool skip_retention_level; 60 60 }; 61 61 62 62 struct rpmhpd_desc { ··· 175 173 .pd = { .name = "mxc", }, 176 174 .peer = &mxc_ao, 177 175 .res_name = "mxc.lvl", 176 + .skip_retention_level = true, 178 177 }; 179 178 180 179 static struct rpmhpd mxc_ao = { ··· 183 180 .active_only = true, 184 181 .peer = &mxc, 185 182 .res_name = "mxc.lvl", 183 + .skip_retention_level = true, 186 184 }; 187 185 188 186 static struct rpmhpd nsp = { ··· 823 819 return -EINVAL; 824 820 825 821 for (i = 0; i < rpmhpd->level_count; i++) { 822 + if (rpmhpd->skip_retention_level && buf[i] == RPMH_REGULATOR_LEVEL_RETENTION) 823 + continue; 824 + 826 825 rpmhpd->level[i] = buf[i]; 827 826 828 827 /* Remember the first corner with non-zero level */

+4

drivers/soc/qcom/pmic_glink.c

··· 348 348 mutex_unlock(&__pmic_glink_lock); 349 349 } 350 350 351 + static const unsigned long pmic_glink_sc8280xp_client_mask = BIT(PMIC_GLINK_CLIENT_BATT) | 352 + BIT(PMIC_GLINK_CLIENT_ALTMODE); 353 + 351 354 static const unsigned long pmic_glink_sm8450_client_mask = BIT(PMIC_GLINK_CLIENT_BATT) | 352 355 BIT(PMIC_GLINK_CLIENT_ALTMODE) | 353 356 BIT(PMIC_GLINK_CLIENT_UCSI); 354 357 355 358 static const struct of_device_id pmic_glink_of_match[] = { 359 + { .compatible = "qcom,sc8280xp-pmic-glink", .data = &pmic_glink_sc8280xp_client_mask }, 356 360 { .compatible = "qcom,pmic-glink", .data = &pmic_glink_sm8450_client_mask }, 357 361 {} 358 362 };

+18 -8

drivers/spi/spi-axi-spi-engine.c

··· 164 164 } 165 165 166 166 static void spi_engine_gen_sleep(struct spi_engine_program *p, bool dry, 167 - int delay_ns, u32 sclk_hz) 167 + int delay_ns, int inst_ns, u32 sclk_hz) 168 168 { 169 169 unsigned int t; 170 170 171 - /* negative delay indicates error, e.g. from spi_delay_to_ns() */ 172 - if (delay_ns <= 0) 171 + /* 172 + * Negative delay indicates error, e.g. from spi_delay_to_ns(). And if 173 + * delay is less that the instruction execution time, there is no need 174 + * for an extra sleep instruction since the instruction execution time 175 + * will already cover the required delay. 176 + */ 177 + if (delay_ns < 0 || delay_ns <= inst_ns) 173 178 return; 174 179 175 - /* rounding down since executing the instruction adds a couple of ticks delay */ 176 - t = DIV_ROUND_DOWN_ULL((u64)delay_ns * sclk_hz, NSEC_PER_SEC); 180 + t = DIV_ROUND_UP_ULL((u64)(delay_ns - inst_ns) * sclk_hz, NSEC_PER_SEC); 177 181 while (t) { 178 182 unsigned int n = min(t, 256U); 179 183 ··· 224 220 struct spi_device *spi = msg->spi; 225 221 struct spi_controller *host = spi->controller; 226 222 struct spi_transfer *xfer; 227 - int clk_div, new_clk_div; 223 + int clk_div, new_clk_div, inst_ns; 228 224 bool keep_cs = false; 229 225 u8 bits_per_word = 0; 226 + 227 + /* 228 + * Take into account instruction execution time for more accurate sleep 229 + * times, especially when the delay is small. 230 + */ 231 + inst_ns = DIV_ROUND_UP(NSEC_PER_SEC, host->max_speed_hz); 230 232 231 233 clk_div = 1; 232 234 ··· 262 252 263 253 spi_engine_gen_xfer(p, dry, xfer); 264 254 spi_engine_gen_sleep(p, dry, spi_delay_to_ns(&xfer->delay, xfer), 265 - xfer->effective_speed_hz); 255 + inst_ns, xfer->effective_speed_hz); 266 256 267 257 if (xfer->cs_change) { 268 258 if (list_is_last(&xfer->transfer_list, &msg->transfers)) { ··· 272 262 spi_engine_gen_cs(p, dry, spi, false); 273 263 274 264 spi_engine_gen_sleep(p, dry, spi_delay_to_ns( 275 - &xfer->cs_change_delay, xfer), 265 + &xfer->cs_change_delay, xfer), inst_ns, 276 266 xfer->effective_speed_hz); 277 267 278 268 if (!list_next_entry(xfer, transfer_list)->cs_off)

+6

drivers/spi/spi-davinci.c

··· 984 984 return ret; 985 985 986 986 free_dma: 987 + /* This bit needs to be cleared to disable dpsi->clk */ 988 + clear_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK); 989 + 987 990 if (dspi->dma_rx) { 988 991 dma_release_channel(dspi->dma_rx); 989 992 dma_release_channel(dspi->dma_tx); ··· 1015 1012 dspi = spi_controller_get_devdata(host); 1016 1013 1017 1014 spi_bitbang_stop(&dspi->bitbang); 1015 + 1016 + /* This bit needs to be cleared to disable dpsi->clk */ 1017 + clear_io_bits(dspi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK); 1018 1018 1019 1019 if (dspi->dma_rx) { 1020 1020 dma_release_channel(dspi->dma_rx);

+1 -1

drivers/spi/spi-imx.c

··· 1050 1050 .rx_available = mx31_rx_available, 1051 1051 .reset = mx31_reset, 1052 1052 .fifo_size = 8, 1053 - .has_dmamode = true, 1053 + .has_dmamode = false, 1054 1054 .dynamic_burst = false, 1055 1055 .has_targetmode = false, 1056 1056 .devtype = IMX35_CSPI,

+2

drivers/spi/spi-mux.c

··· 158 158 /* supported modes are the same as our parent's */ 159 159 ctlr->mode_bits = spi->controller->mode_bits; 160 160 ctlr->flags = spi->controller->flags; 161 + ctlr->bits_per_word_mask = spi->controller->bits_per_word_mask; 161 162 ctlr->transfer_one_message = spi_mux_transfer_one_message; 162 163 ctlr->setup = spi_mux_setup; 163 164 ctlr->num_chipselect = mux_control_states(priv->mux); 164 165 ctlr->bus_num = -1; 165 166 ctlr->dev.of_node = spi->dev.of_node; 166 167 ctlr->must_async = true; 168 + ctlr->defer_optimize_message = true; 167 169 168 170 ret = devm_spi_register_controller(&spi->dev, ctlr); 169 171 if (ret)

+1 -14

drivers/spi/spi-omap2-mcspi.c

··· 1277 1277 1278 1278 /* 1279 1279 * Check if this transfer contains only one word; 1280 - * OR contains 1 to 4 words, with bits_per_word == 8 and no delay between each word 1281 - * OR contains 1 to 2 words, with bits_per_word == 16 and no delay between each word 1282 - * 1283 - * If one of the two last case is true, this also change the bits_per_word of this 1284 - * transfer to make it a bit faster. 1285 - * It's not an issue to change the bits_per_word here even if the multi-mode is not 1286 - * applicable for this message, the signal on the wire will be the same. 1287 1280 */ 1288 1281 if (bits_per_word < 8 && tr->len == 1) { 1289 1282 /* multi-mode is applicable, only one word (1..7 bits) */ 1290 - } else if (tr->word_delay.value == 0 && bits_per_word == 8 && tr->len <= 4) { 1291 - /* multi-mode is applicable, only one "bigger" word (8,16,24,32 bits) */ 1292 - tr->bits_per_word = tr->len * bits_per_word; 1293 - } else if (tr->word_delay.value == 0 && bits_per_word == 16 && tr->len <= 2) { 1294 - /* multi-mode is applicable, only one "bigger" word (16,32 bits) */ 1295 - tr->bits_per_word = tr->len * bits_per_word / 2; 1296 1283 } else if (bits_per_word >= 8 && tr->len == bits_per_word / 8) { 1297 - /* multi-mode is applicable, only one word (9..15,17..32 bits) */ 1284 + /* multi-mode is applicable, only one word (8..32 bits) */ 1298 1285 } else { 1299 1286 /* multi-mode is not applicable: more than one word in the transfer */ 1300 1287 mcspi->use_multi_mode = false;

+17 -3

drivers/spi/spi.c

··· 2151 2151 */ 2152 2152 static void spi_maybe_unoptimize_message(struct spi_message *msg) 2153 2153 { 2154 - if (!msg->pre_optimized && msg->optimized) 2154 + if (!msg->pre_optimized && msg->optimized && 2155 + !msg->spi->controller->defer_optimize_message) 2155 2156 __spi_unoptimize_message(msg); 2156 2157 } 2157 2158 ··· 4295 4294 static int spi_maybe_optimize_message(struct spi_device *spi, 4296 4295 struct spi_message *msg) 4297 4296 { 4297 + if (spi->controller->defer_optimize_message) { 4298 + msg->spi = spi; 4299 + return 0; 4300 + } 4301 + 4298 4302 if (msg->pre_optimized) 4299 4303 return 0; 4300 4304 ··· 4330 4324 { 4331 4325 int ret; 4332 4326 4327 + /* 4328 + * Pre-optimization is not supported and optimization is deferred e.g. 4329 + * when using spi-mux. 4330 + */ 4331 + if (spi->controller->defer_optimize_message) 4332 + return 0; 4333 + 4333 4334 ret = __spi_optimize_message(spi, msg); 4334 4335 if (ret) 4335 4336 return ret; ··· 4363 4350 */ 4364 4351 void spi_unoptimize_message(struct spi_message *msg) 4365 4352 { 4353 + if (msg->spi->controller->defer_optimize_message) 4354 + return; 4355 + 4366 4356 __spi_unoptimize_message(msg); 4367 4357 msg->pre_optimized = false; 4368 4358 } ··· 4447 4431 ret = __spi_async(spi, message); 4448 4432 4449 4433 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags); 4450 - 4451 - spi_maybe_unoptimize_message(message); 4452 4434 4453 4435 return ret; 4454 4436 }

+2 -1

drivers/tty/serial/8250/8250_omap.c

··· 672 672 * https://www.ti.com/lit/pdf/sprz536 673 673 */ 674 674 if (priv->habit & UART_RX_TIMEOUT_QUIRK && 675 - (iir & UART_IIR_RX_TIMEOUT) == UART_IIR_RX_TIMEOUT) { 675 + (iir & UART_IIR_RX_TIMEOUT) == UART_IIR_RX_TIMEOUT && 676 + serial_port_in(port, UART_OMAP_RX_LVL) == 0) { 676 677 unsigned char efr2, timeout_h, timeout_l; 677 678 678 679 efr2 = serial_in(up, UART_OMAP_EFR2);

+57 -2

drivers/tty/serial/imx.c

··· 120 120 #define UCR4_OREN (1<<1) /* Receiver overrun interrupt enable */ 121 121 #define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */ 122 122 #define UFCR_RXTL_SHF 0 /* Receiver trigger level shift */ 123 + #define UFCR_RXTL_MASK 0x3F /* Receiver trigger 6 bits wide */ 123 124 #define UFCR_DCEDTE (1<<6) /* DCE/DTE mode select */ 124 125 #define UFCR_RFDIV (7<<7) /* Reference freq divider mask */ 125 126 #define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7) ··· 1552 1551 struct imx_port *sport = (struct imx_port *)port; 1553 1552 unsigned long flags; 1554 1553 u32 ucr1, ucr2, ucr4, uts; 1554 + int loops; 1555 1555 1556 1556 if (sport->dma_is_enabled) { 1557 1557 dmaengine_terminate_sync(sport->dma_chan_tx); ··· 1614 1612 ucr4 = imx_uart_readl(sport, UCR4); 1615 1613 ucr4 &= ~UCR4_TCEN; 1616 1614 imx_uart_writel(sport, ucr4, UCR4); 1615 + 1616 + /* 1617 + * We have to ensure the tx state machine ends up in OFF. This 1618 + * is especially important for rs485 where we must not leave 1619 + * the RTS signal high, blocking the bus indefinitely. 1620 + * 1621 + * All interrupts are now disabled, so imx_uart_stop_tx() will 1622 + * no longer be called from imx_uart_transmit_buffer(). It may 1623 + * still be called via the hrtimers, and if those are in play, 1624 + * we have to honour the delays. 1625 + */ 1626 + if (sport->tx_state == WAIT_AFTER_RTS || sport->tx_state == SEND) 1627 + imx_uart_stop_tx(port); 1628 + 1629 + /* 1630 + * In many cases (rs232 mode, or if tx_state was 1631 + * WAIT_AFTER_RTS, or if tx_state was SEND and there is no 1632 + * delay_rts_after_send), this will have moved directly to 1633 + * OFF. In rs485 mode, tx_state might already have been 1634 + * WAIT_AFTER_SEND and the hrtimer thus already started, or 1635 + * the above imx_uart_stop_tx() call could have started it. In 1636 + * those cases, we have to wait for the hrtimer to fire and 1637 + * complete the transition to OFF. 1638 + */ 1639 + loops = port->rs485.flags & SER_RS485_ENABLED ? 1640 + port->rs485.delay_rts_after_send : 0; 1641 + while (sport->tx_state != OFF && loops--) { 1642 + uart_port_unlock_irqrestore(&sport->port, flags); 1643 + msleep(1); 1644 + uart_port_lock_irqsave(&sport->port, &flags); 1645 + } 1646 + 1647 + if (sport->tx_state != OFF) { 1648 + dev_warn(sport->port.dev, "unexpected tx_state %d\n", 1649 + sport->tx_state); 1650 + /* 1651 + * This machine may be busted, but ensure the RTS 1652 + * signal is inactive in order not to block other 1653 + * devices. 1654 + */ 1655 + if (port->rs485.flags & SER_RS485_ENABLED) { 1656 + ucr2 = imx_uart_readl(sport, UCR2); 1657 + if (port->rs485.flags & SER_RS485_RTS_AFTER_SEND) 1658 + imx_uart_rts_active(sport, &ucr2); 1659 + else 1660 + imx_uart_rts_inactive(sport, &ucr2); 1661 + imx_uart_writel(sport, ucr2, UCR2); 1662 + } 1663 + sport->tx_state = OFF; 1664 + } 1617 1665 1618 1666 uart_port_unlock_irqrestore(&sport->port, flags); 1619 1667 ··· 1985 1933 struct serial_rs485 *rs485conf) 1986 1934 { 1987 1935 struct imx_port *sport = (struct imx_port *)port; 1988 - u32 ucr2; 1936 + u32 ucr2, ufcr; 1989 1937 1990 1938 if (rs485conf->flags & SER_RS485_ENABLED) { 1991 1939 /* Enable receiver if low-active RTS signal is requested */ ··· 2005 1953 /* Make sure Rx is enabled in case Tx is active with Rx disabled */ 2006 1954 if (!(rs485conf->flags & SER_RS485_ENABLED) || 2007 1955 rs485conf->flags & SER_RS485_RX_DURING_TX) { 2008 - imx_uart_setup_ufcr(sport, TXTL_DEFAULT, RXTL_DEFAULT); 1956 + /* If the receiver trigger is 0, set it to a default value */ 1957 + ufcr = imx_uart_readl(sport, UFCR); 1958 + if ((ufcr & UFCR_RXTL_MASK) == 0) 1959 + imx_uart_setup_ufcr(sport, TXTL_DEFAULT, RXTL_DEFAULT); 2009 1960 imx_uart_start_rx(port); 2010 1961 } 2011 1962

+7 -6

drivers/tty/serial/ma35d1_serial.c

··· 688 688 struct uart_ma35d1_port *up; 689 689 int ret = 0; 690 690 691 - if (pdev->dev.of_node) { 692 - ret = of_alias_get_id(pdev->dev.of_node, "serial"); 693 - if (ret < 0) { 694 - dev_err(&pdev->dev, "failed to get alias/pdev id, errno %d\n", ret); 695 - return ret; 696 - } 691 + if (!pdev->dev.of_node) 692 + return -ENODEV; 693 + 694 + ret = of_alias_get_id(pdev->dev.of_node, "serial"); 695 + if (ret < 0) { 696 + dev_err(&pdev->dev, "failed to get alias/pdev id, errno %d\n", ret); 697 + return ret; 697 698 } 698 699 up = &ma35d1serial_ports[ret]; 699 700 up->port.line = ret;

+38 -13

drivers/tty/serial/qcom_geni_serial.c

··· 649 649 650 650 static void qcom_geni_serial_start_tx_fifo(struct uart_port *uport) 651 651 { 652 + unsigned char c; 652 653 u32 irq_en; 653 654 654 - if (qcom_geni_serial_main_active(uport) || 655 - !qcom_geni_serial_tx_empty(uport)) 656 - return; 655 + /* 656 + * Start a new transfer in case the previous command was cancelled and 657 + * left data in the FIFO which may prevent the watermark interrupt 658 + * from triggering. Note that the stale data is discarded. 659 + */ 660 + if (!qcom_geni_serial_main_active(uport) && 661 + !qcom_geni_serial_tx_empty(uport)) { 662 + if (uart_fifo_out(uport, &c, 1) == 1) { 663 + writel(M_CMD_DONE_EN, uport->membase + SE_GENI_M_IRQ_CLEAR); 664 + qcom_geni_serial_setup_tx(uport, 1); 665 + writel(c, uport->membase + SE_GENI_TX_FIFOn); 666 + } 667 + } 657 668 658 669 irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); 659 670 irq_en |= M_TX_FIFO_WATERMARK_EN | M_CMD_DONE_EN; 660 - 661 671 writel(DEF_TX_WM, uport->membase + SE_GENI_TX_WATERMARK_REG); 662 672 writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN); 663 673 } ··· 675 665 static void qcom_geni_serial_stop_tx_fifo(struct uart_port *uport) 676 666 { 677 667 u32 irq_en; 678 - struct qcom_geni_serial_port *port = to_dev_port(uport); 679 668 680 669 irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN); 681 670 irq_en &= ~(M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN); 682 671 writel(0, uport->membase + SE_GENI_TX_WATERMARK_REG); 683 672 writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN); 684 - /* Possible stop tx is called multiple times. */ 673 + } 674 + 675 + static void qcom_geni_serial_cancel_tx_cmd(struct uart_port *uport) 676 + { 677 + struct qcom_geni_serial_port *port = to_dev_port(uport); 678 + 685 679 if (!qcom_geni_serial_main_active(uport)) 686 680 return; 687 681 ··· 698 684 writel(M_CMD_ABORT_EN, uport->membase + SE_GENI_M_IRQ_CLEAR); 699 685 } 700 686 writel(M_CMD_CANCEL_EN, uport->membase + SE_GENI_M_IRQ_CLEAR); 687 + 688 + port->tx_remaining = 0; 701 689 } 702 690 703 691 static void qcom_geni_serial_handle_rx_fifo(struct uart_port *uport, bool drop) ··· 878 862 memset(buf, 0, sizeof(buf)); 879 863 tx_bytes = min(remaining, BYTES_PER_FIFO_WORD); 880 864 881 - tx_bytes = uart_fifo_out(uport, buf, tx_bytes); 865 + uart_fifo_out(uport, buf, tx_bytes); 882 866 883 867 iowrite32_rep(uport->membase + SE_GENI_TX_FIFOn, buf, 1); 884 868 ··· 906 890 else 907 891 pending = kfifo_len(&tport->xmit_fifo); 908 892 909 - /* All data has been transmitted and acknowledged as received */ 910 - if (!pending && !status && done) { 893 + /* All data has been transmitted or command has been cancelled */ 894 + if (!pending && done) { 911 895 qcom_geni_serial_stop_tx_fifo(uport); 912 896 goto out_write_wakeup; 913 897 } 914 898 915 - avail = port->tx_fifo_depth - (status & TX_FIFO_WC); 899 + if (active) 900 + avail = port->tx_fifo_depth - (status & TX_FIFO_WC); 901 + else 902 + avail = port->tx_fifo_depth; 903 + 916 904 avail *= BYTES_PER_FIFO_WORD; 917 905 918 906 chunk = min(avail, pending); ··· 1089 1069 { 1090 1070 disable_irq(uport->irq); 1091 1071 1092 - if (uart_console(uport)) 1093 - return; 1094 - 1095 1072 qcom_geni_serial_stop_tx(uport); 1096 1073 qcom_geni_serial_stop_rx(uport); 1074 + 1075 + qcom_geni_serial_cancel_tx_cmd(uport); 1076 + } 1077 + 1078 + static void qcom_geni_serial_flush_buffer(struct uart_port *uport) 1079 + { 1080 + qcom_geni_serial_cancel_tx_cmd(uport); 1097 1081 } 1098 1082 1099 1083 static int qcom_geni_serial_port_setup(struct uart_port *uport) ··· 1556 1532 .request_port = qcom_geni_serial_request_port, 1557 1533 .config_port = qcom_geni_serial_config_port, 1558 1534 .shutdown = qcom_geni_serial_shutdown, 1535 + .flush_buffer = qcom_geni_serial_flush_buffer, 1559 1536 .type = qcom_geni_serial_get_type, 1560 1537 .set_mctrl = qcom_geni_serial_set_mctrl, 1561 1538 .get_mctrl = qcom_geni_serial_get_mctrl,

+15 -3

drivers/usb/core/config.c

··· 291 291 if (ifp->desc.bNumEndpoints >= num_ep) 292 292 goto skip_to_next_endpoint_or_interface_descriptor; 293 293 294 + /* Save a copy of the descriptor and use it instead of the original */ 295 + endpoint = &ifp->endpoint[ifp->desc.bNumEndpoints]; 296 + memcpy(&endpoint->desc, d, n); 297 + d = &endpoint->desc; 298 + 299 + /* Clear the reserved bits in bEndpointAddress */ 300 + i = d->bEndpointAddress & 301 + (USB_ENDPOINT_DIR_MASK | USB_ENDPOINT_NUMBER_MASK); 302 + if (i != d->bEndpointAddress) { 303 + dev_notice(ddev, "config %d interface %d altsetting %d has an endpoint descriptor with address 0x%X, changing to 0x%X\n", 304 + cfgno, inum, asnum, d->bEndpointAddress, i); 305 + endpoint->desc.bEndpointAddress = i; 306 + } 307 + 294 308 /* Check for duplicate endpoint addresses */ 295 309 if (config_endpoint_is_duplicate(config, inum, asnum, d)) { 296 310 dev_notice(ddev, "config %d interface %d altsetting %d has a duplicate endpoint with address 0x%X, skipping\n", ··· 322 308 } 323 309 } 324 310 325 - endpoint = &ifp->endpoint[ifp->desc.bNumEndpoints]; 311 + /* Accept this endpoint */ 326 312 ++ifp->desc.bNumEndpoints; 327 - 328 - memcpy(&endpoint->desc, d, n); 329 313 INIT_LIST_HEAD(&endpoint->urb_list); 330 314 331 315 /*

+5 -2

drivers/usb/core/of.c

··· 84 84 if (of_graph_is_present(np)) 85 85 return true; 86 86 87 - for_each_child_of_node(np, child) 88 - if (of_property_present(child, "reg")) 87 + for_each_child_of_node(np, child) { 88 + if (of_property_present(child, "reg")) { 89 + of_node_put(child); 89 90 return true; 91 + } 92 + } 90 93 91 94 return false; 92 95 }

+3

drivers/usb/core/quirks.c

··· 506 506 { USB_DEVICE(0x1b1c, 0x1b38), .driver_info = USB_QUIRK_DELAY_INIT | 507 507 USB_QUIRK_DELAY_CTRL_MSG }, 508 508 509 + /* START BP-850k Printer */ 510 + { USB_DEVICE(0x1bc3, 0x0003), .driver_info = USB_QUIRK_NO_SET_INTF }, 511 + 509 512 /* MIDI keyboard WORLDE MINI */ 510 513 { USB_DEVICE(0x1c75, 0x0204), .driver_info = 511 514 USB_QUIRK_CONFIG_INTF_STRINGS },

+8

drivers/usb/dwc3/dwc3-pci.c

··· 54 54 #define PCI_DEVICE_ID_INTEL_MTL 0x7e7e 55 55 #define PCI_DEVICE_ID_INTEL_ARLH_PCH 0x777e 56 56 #define PCI_DEVICE_ID_INTEL_TGL 0x9a15 57 + #define PCI_DEVICE_ID_INTEL_PTLH 0xe332 58 + #define PCI_DEVICE_ID_INTEL_PTLH_PCH 0xe37e 59 + #define PCI_DEVICE_ID_INTEL_PTLU 0xe432 60 + #define PCI_DEVICE_ID_INTEL_PTLU_PCH 0xe47e 57 61 #define PCI_DEVICE_ID_AMD_MR 0x163a 58 62 59 63 #define PCI_INTEL_BXT_DSM_GUID "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511" ··· 434 430 { PCI_DEVICE_DATA(INTEL, MTLS, &dwc3_pci_intel_swnode) }, 435 431 { PCI_DEVICE_DATA(INTEL, ARLH_PCH, &dwc3_pci_intel_swnode) }, 436 432 { PCI_DEVICE_DATA(INTEL, TGL, &dwc3_pci_intel_swnode) }, 433 + { PCI_DEVICE_DATA(INTEL, PTLH, &dwc3_pci_intel_swnode) }, 434 + { PCI_DEVICE_DATA(INTEL, PTLH_PCH, &dwc3_pci_intel_swnode) }, 435 + { PCI_DEVICE_DATA(INTEL, PTLU, &dwc3_pci_intel_swnode) }, 436 + { PCI_DEVICE_DATA(INTEL, PTLU_PCH, &dwc3_pci_intel_swnode) }, 437 437 438 438 { PCI_DEVICE_DATA(AMD, NL_USB, &dwc3_pci_amd_swnode) }, 439 439 { PCI_DEVICE_DATA(AMD, MR, &dwc3_pci_amd_mr_swnode) },

+3

drivers/usb/gadget/configfs.c

··· 115 115 int ret; 116 116 char *str; 117 117 char *copy = *s_copy; 118 + 118 119 ret = strlen(s); 119 120 if (ret > USB_MAX_STRING_LEN) 120 121 return -EOVERFLOW; 122 + if (ret < 1) 123 + return -EINVAL; 121 124 122 125 if (copy) { 123 126 str = copy;

+13 -3

drivers/usb/host/xhci.c

··· 1125 1125 xhci_dbg(xhci, "Start the secondary HCD\n"); 1126 1126 retval = xhci_run(xhci->shared_hcd); 1127 1127 } 1128 - 1128 + if (retval) 1129 + return retval; 1130 + /* 1131 + * Resume roothubs unconditionally as PORTSC change bits are not 1132 + * immediately visible after xHC reset 1133 + */ 1129 1134 hcd->state = HC_STATE_SUSPENDED; 1130 - if (xhci->shared_hcd) 1135 + 1136 + if (xhci->shared_hcd) { 1131 1137 xhci->shared_hcd->state = HC_STATE_SUSPENDED; 1138 + usb_hcd_resume_root_hub(xhci->shared_hcd); 1139 + } 1140 + usb_hcd_resume_root_hub(hcd); 1141 + 1132 1142 goto done; 1133 1143 } 1134 1144 ··· 1162 1152 1163 1153 xhci_dbc_resume(xhci); 1164 1154 1165 - done: 1166 1155 if (retval == 0) { 1167 1156 /* 1168 1157 * Resume roothubs only if there are pending events. ··· 1187 1178 usb_hcd_resume_root_hub(hcd); 1188 1179 } 1189 1180 } 1181 + done: 1190 1182 /* 1191 1183 * If system is subject to the Quirk, Compliance Mode Timer needs to 1192 1184 * be re-initialized Always after a system resume. Ports are subject

+45

drivers/usb/serial/mos7840.c

··· 1737 1737 kfree(mos7840_port); 1738 1738 } 1739 1739 1740 + static int mos7840_suspend(struct usb_serial *serial, pm_message_t message) 1741 + { 1742 + struct moschip_port *mos7840_port; 1743 + struct usb_serial_port *port; 1744 + int i; 1745 + 1746 + for (i = 0; i < serial->num_ports; ++i) { 1747 + port = serial->port[i]; 1748 + if (!tty_port_initialized(&port->port)) 1749 + continue; 1750 + 1751 + mos7840_port = usb_get_serial_port_data(port); 1752 + 1753 + usb_kill_urb(mos7840_port->read_urb); 1754 + mos7840_port->read_urb_busy = false; 1755 + } 1756 + 1757 + return 0; 1758 + } 1759 + 1760 + static int mos7840_resume(struct usb_serial *serial) 1761 + { 1762 + struct moschip_port *mos7840_port; 1763 + struct usb_serial_port *port; 1764 + int res; 1765 + int i; 1766 + 1767 + for (i = 0; i < serial->num_ports; ++i) { 1768 + port = serial->port[i]; 1769 + if (!tty_port_initialized(&port->port)) 1770 + continue; 1771 + 1772 + mos7840_port = usb_get_serial_port_data(port); 1773 + 1774 + mos7840_port->read_urb_busy = true; 1775 + res = usb_submit_urb(mos7840_port->read_urb, GFP_NOIO); 1776 + if (res) 1777 + mos7840_port->read_urb_busy = false; 1778 + } 1779 + 1780 + return 0; 1781 + } 1782 + 1740 1783 static struct usb_serial_driver moschip7840_4port_device = { 1741 1784 .driver = { 1742 1785 .owner = THIS_MODULE, ··· 1807 1764 .port_probe = mos7840_port_probe, 1808 1765 .port_remove = mos7840_port_remove, 1809 1766 .read_bulk_callback = mos7840_bulk_in_callback, 1767 + .suspend = mos7840_suspend, 1768 + .resume = mos7840_resume, 1810 1769 }; 1811 1770 1812 1771 static struct usb_serial_driver * const serial_drivers[] = {

+38

drivers/usb/serial/option.c

··· 1425 1425 .driver_info = NCTRL(0) | RSVD(1) }, 1426 1426 { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1901, 0xff), /* Telit LN940 (MBIM) */ 1427 1427 .driver_info = NCTRL(0) }, 1428 + { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x3000, 0xff), /* Telit FN912 */ 1429 + .driver_info = RSVD(0) | NCTRL(3) }, 1430 + { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x3001, 0xff), /* Telit FN912 */ 1431 + .driver_info = RSVD(0) | NCTRL(2) | RSVD(3) | RSVD(4) }, 1428 1432 { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x7010, 0xff), /* Telit LE910-S1 (RNDIS) */ 1429 1433 .driver_info = NCTRL(2) }, 1430 1434 { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x7011, 0xff), /* Telit LE910-S1 (ECM) */ ··· 1437 1433 .driver_info = NCTRL(2) }, 1438 1434 { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x701b, 0xff), /* Telit LE910R1 (ECM) */ 1439 1435 .driver_info = NCTRL(2) }, 1436 + { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x9000, 0xff), /* Telit generic core-dump device */ 1437 + .driver_info = NCTRL(0) }, 1440 1438 { USB_DEVICE(TELIT_VENDOR_ID, 0x9010), /* Telit SBL FN980 flashing device */ 1441 1439 .driver_info = NCTRL(0) | ZLP }, 1442 1440 { USB_DEVICE(TELIT_VENDOR_ID, 0x9200), /* Telit LE910S1 flashing device */ ··· 2230 2224 { USB_DEVICE_AND_INTERFACE_INFO(MEDIATEK_VENDOR_ID, MEDIATEK_PRODUCT_7106_2COM, 0x02, 0x02, 0x01) }, 2231 2225 { USB_DEVICE_AND_INTERFACE_INFO(MEDIATEK_VENDOR_ID, MEDIATEK_PRODUCT_DC_4COM2, 0xff, 0x02, 0x01) }, 2232 2226 { USB_DEVICE_AND_INTERFACE_INFO(MEDIATEK_VENDOR_ID, MEDIATEK_PRODUCT_DC_4COM2, 0xff, 0x00, 0x00) }, 2227 + { USB_DEVICE_AND_INTERFACE_INFO(MEDIATEK_VENDOR_ID, 0x7126, 0xff, 0x00, 0x00), 2228 + .driver_info = NCTRL(2) }, 2229 + { USB_DEVICE_AND_INTERFACE_INFO(MEDIATEK_VENDOR_ID, 0x7127, 0xff, 0x00, 0x00), 2230 + .driver_info = NCTRL(2) | NCTRL(3) | NCTRL(4) }, 2233 2231 { USB_DEVICE(CELLIENT_VENDOR_ID, CELLIENT_PRODUCT_MEN200) }, 2234 2232 { USB_DEVICE(CELLIENT_VENDOR_ID, CELLIENT_PRODUCT_MPL200), 2235 2233 .driver_info = RSVD(1) | RSVD(4) }, ··· 2294 2284 .driver_info = RSVD(3) }, 2295 2285 { USB_DEVICE_INTERFACE_CLASS(0x0489, 0xe0f0, 0xff), /* Foxconn T99W373 MBIM */ 2296 2286 .driver_info = RSVD(3) }, 2287 + { USB_DEVICE_INTERFACE_CLASS(0x0489, 0xe145, 0xff), /* Foxconn T99W651 RNDIS */ 2288 + .driver_info = RSVD(5) | RSVD(6) }, 2297 2289 { USB_DEVICE(0x1508, 0x1001), /* Fibocom NL668 (IOT version) */ 2298 2290 .driver_info = RSVD(4) | RSVD(5) | RSVD(6) }, 2299 2291 { USB_DEVICE(0x1782, 0x4d10) }, /* Fibocom L610 (AT mode) */ ··· 2333 2321 .driver_info = RSVD(4) }, 2334 2322 { USB_DEVICE_INTERFACE_CLASS(0x33f8, 0x0115, 0xff), /* Rolling RW135-GL (laptop MBIM) */ 2335 2323 .driver_info = RSVD(5) }, 2324 + { USB_DEVICE_INTERFACE_CLASS(0x33f8, 0x0802, 0xff), /* Rolling RW350-GL (laptop MBIM) */ 2325 + .driver_info = RSVD(5) }, 2326 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0100, 0xff, 0xff, 0x30) }, /* NetPrisma LCUK54-WWD for Global */ 2327 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0100, 0xff, 0x00, 0x40) }, 2328 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0100, 0xff, 0xff, 0x40) }, 2329 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0101, 0xff, 0xff, 0x30) }, /* NetPrisma LCUK54-WRD for Global SKU */ 2330 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0101, 0xff, 0x00, 0x40) }, 2331 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0101, 0xff, 0xff, 0x40) }, 2332 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0106, 0xff, 0xff, 0x30) }, /* NetPrisma LCUK54-WRD for China SKU */ 2333 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0106, 0xff, 0x00, 0x40) }, 2334 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0106, 0xff, 0xff, 0x40) }, 2335 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0111, 0xff, 0xff, 0x30) }, /* NetPrisma LCUK54-WWD for SA */ 2336 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0111, 0xff, 0x00, 0x40) }, 2337 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0111, 0xff, 0xff, 0x40) }, 2338 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0112, 0xff, 0xff, 0x30) }, /* NetPrisma LCUK54-WWD for EU */ 2339 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0112, 0xff, 0x00, 0x40) }, 2340 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0112, 0xff, 0xff, 0x40) }, 2341 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0113, 0xff, 0xff, 0x30) }, /* NetPrisma LCUK54-WWD for NA */ 2342 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0113, 0xff, 0x00, 0x40) }, 2343 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0113, 0xff, 0xff, 0x40) }, 2344 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0115, 0xff, 0xff, 0x30) }, /* NetPrisma LCUK54-WWD for China EDU */ 2345 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0115, 0xff, 0x00, 0x40) }, 2346 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0115, 0xff, 0xff, 0x40) }, 2347 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0116, 0xff, 0xff, 0x30) }, /* NetPrisma LCUK54-WWD for Golbal EDU */ 2348 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0116, 0xff, 0x00, 0x40) }, 2349 + { USB_DEVICE_AND_INTERFACE_INFO(0x3731, 0x0116, 0xff, 0xff, 0x40) }, 2336 2350 { USB_DEVICE_AND_INTERFACE_INFO(OPPO_VENDOR_ID, OPPO_PRODUCT_R11, 0xff, 0xff, 0x30) }, 2337 2351 { USB_DEVICE_AND_INTERFACE_INFO(SIERRA_VENDOR_ID, SIERRA_PRODUCT_EM9191, 0xff, 0xff, 0x30) }, 2338 2352 { USB_DEVICE_AND_INTERFACE_INFO(SIERRA_VENDOR_ID, SIERRA_PRODUCT_EM9191, 0xff, 0xff, 0x40) },

+22 -8

fs/bcachefs/btree_gc.c

··· 641 641 target_depth = 0; 642 642 643 643 /* root */ 644 - mutex_lock(&c->btree_root_lock); 645 - struct btree *b = bch2_btree_id_root(c, btree)->b; 646 - if (!btree_node_fake(b)) { 644 + do { 645 + retry_root: 646 + bch2_trans_begin(trans); 647 + 648 + struct btree_iter iter; 649 + bch2_trans_node_iter_init(trans, &iter, btree, POS_MIN, 650 + 0, bch2_btree_id_root(c, btree)->b->c.level, 0); 651 + struct btree *b = bch2_btree_iter_peek_node(&iter); 652 + ret = PTR_ERR_OR_ZERO(b); 653 + if (ret) 654 + goto err_root; 655 + 656 + if (b != btree_node_root(c, b)) { 657 + bch2_trans_iter_exit(trans, &iter); 658 + goto retry_root; 659 + } 660 + 647 661 gc_pos_set(c, gc_pos_btree(btree, b->c.level + 1, SPOS_MAX)); 648 - ret = lockrestart_do(trans, 649 - bch2_gc_mark_key(trans, b->c.btree_id, b->c.level + 1, 650 - NULL, NULL, bkey_i_to_s_c(&b->key), initial)); 662 + struct bkey_s_c k = bkey_i_to_s_c(&b->key); 663 + ret = bch2_gc_mark_key(trans, btree, b->c.level + 1, NULL, NULL, k, initial); 651 664 level = b->c.level; 652 - } 653 - mutex_unlock(&c->btree_root_lock); 665 + err_root: 666 + bch2_trans_iter_exit(trans, &iter); 667 + } while (bch2_err_matches(ret, BCH_ERR_transaction_restart)); 654 668 655 669 if (ret) 656 670 return ret;

+4 -3

fs/bcachefs/btree_iter.c

··· 996 996 997 997 bch2_trans_unlock(trans); 998 998 cond_resched(); 999 - trans->locked = true; 999 + trans_set_locked(trans); 1000 1000 1001 1001 if (unlikely(trans->memory_allocation_failure)) { 1002 1002 struct closure cl; ··· 3089 3089 bch2_trans_srcu_unlock(trans); 3090 3090 3091 3091 trans->last_begin_ip = _RET_IP_; 3092 - trans->locked = true; 3092 + 3093 + trans_set_locked(trans); 3093 3094 3094 3095 if (trans->restarted) { 3095 3096 bch2_btree_path_traverse_all(trans); ··· 3160 3159 trans->last_begin_time = local_clock(); 3161 3160 trans->fn_idx = fn_idx; 3162 3161 trans->locking_wait.task = current; 3163 - trans->locked = true; 3164 3162 trans->journal_replay_not_finished = 3165 3163 unlikely(!test_bit(JOURNAL_replay_done, &c->journal.flags)) && 3166 3164 atomic_inc_not_zero(&c->journal_keys.ref); ··· 3193 3193 trans->srcu_idx = srcu_read_lock(&c->btree_trans_barrier); 3194 3194 trans->srcu_lock_time = jiffies; 3195 3195 trans->srcu_held = true; 3196 + trans_set_locked(trans); 3196 3197 3197 3198 closure_init_stack_release(&trans->ref); 3198 3199 return trans;

+4 -6

fs/bcachefs/btree_locking.c

··· 231 231 prt_newline(&buf); 232 232 } 233 233 234 - bch2_print_string_as_lines(KERN_ERR, buf.buf); 234 + bch2_print_string_as_lines_nonblocking(KERN_ERR, buf.buf); 235 235 printbuf_exit(&buf); 236 236 BUG(); 237 237 } ··· 792 792 return bch2_trans_relock_fail(trans, path, &f, trace); 793 793 } 794 794 795 - trans->locked = true; 795 + trans_set_locked(trans); 796 796 out: 797 797 bch2_trans_verify_locks(trans); 798 798 return 0; ··· 812 812 { 813 813 __bch2_trans_unlock(trans); 814 814 815 - trans->locked = false; 816 - trans->last_unlock_ip = _RET_IP_; 815 + trans_set_unlocked(trans); 817 816 } 818 817 819 818 void bch2_trans_unlock(struct btree_trans *trans) 820 819 { 821 820 __bch2_trans_unlock(trans); 822 821 823 - trans->locked = false; 824 - trans->last_unlock_ip = _RET_IP_; 822 + trans_set_unlocked(trans); 825 823 } 826 824 827 825 void bch2_trans_unlock_long(struct btree_trans *trans)

+22

fs/bcachefs/btree_locking.h

··· 193 193 194 194 /* lock: */ 195 195 196 + static inline void trans_set_locked(struct btree_trans *trans) 197 + { 198 + if (!trans->locked) { 199 + trans->locked = true; 200 + trans->last_unlock_ip = 0; 201 + 202 + trans->pf_memalloc_nofs = (current->flags & PF_MEMALLOC_NOFS) != 0; 203 + current->flags |= PF_MEMALLOC_NOFS; 204 + } 205 + } 206 + 207 + static inline void trans_set_unlocked(struct btree_trans *trans) 208 + { 209 + if (trans->locked) { 210 + trans->locked = false; 211 + trans->last_unlock_ip = _RET_IP_; 212 + 213 + if (!trans->pf_memalloc_nofs) 214 + current->flags &= ~PF_MEMALLOC_NOFS; 215 + } 216 + } 217 + 196 218 static inline int __btree_node_lock_nopath(struct btree_trans *trans, 197 219 struct btree_bkey_cached_common *b, 198 220 enum six_lock_type type,

+1

fs/bcachefs/btree_types.h

··· 484 484 bool lock_may_not_fail:1; 485 485 bool srcu_held:1; 486 486 bool locked:1; 487 + bool pf_memalloc_nofs:1; 487 488 bool write_locked:1; 488 489 bool used_mempool:1; 489 490 bool in_traverse_all:1;

+1 -1

fs/bcachefs/buckets.c

··· 805 805 "bucket %u:%zu gen %u (mem gen %u) data type %s: stale dirty ptr (gen %u)\n" 806 806 "while marking %s", 807 807 ptr->dev, bucket_nr, b_gen, 808 - *bucket_gen(ca, bucket_nr), 808 + bucket_gen_get(ca, bucket_nr), 809 809 bch2_data_type_str(bucket_data_type ?: ptr_data_type), 810 810 ptr->gen, 811 811 (printbuf_reset(&buf),

+8

fs/bcachefs/buckets.h

··· 116 116 return gens->b + b; 117 117 } 118 118 119 + static inline u8 bucket_gen_get(struct bch_dev *ca, size_t b) 120 + { 121 + rcu_read_lock(); 122 + u8 gen = *bucket_gen(ca, b); 123 + rcu_read_unlock(); 124 + return gen; 125 + } 126 + 119 127 static inline size_t PTR_BUCKET_NR(const struct bch_dev *ca, 120 128 const struct bch_extent_ptr *ptr) 121 129 {

+1 -2

fs/bcachefs/fs.c

··· 2073 2073 { 2074 2074 int ret = -ENOMEM; 2075 2075 2076 - bch2_inode_cache = KMEM_CACHE(bch_inode_info, SLAB_RECLAIM_ACCOUNT | 2077 - SLAB_ACCOUNT); 2076 + bch2_inode_cache = KMEM_CACHE(bch_inode_info, SLAB_RECLAIM_ACCOUNT); 2078 2077 if (!bch2_inode_cache) 2079 2078 goto err; 2080 2079

+1 -1

fs/bcachefs/io_misc.c

··· 125 125 bch2_bkey_buf_exit(&old, c); 126 126 127 127 if (closure_nr_remaining(&cl) != 1) { 128 - bch2_trans_unlock(trans); 128 + bch2_trans_unlock_long(trans); 129 129 closure_sync(&cl); 130 130 } 131 131

+22 -3

fs/bcachefs/util.c

··· 252 252 bch2_prt_u64_base2_nbits(out, v, fls64(v) ?: 1); 253 253 } 254 254 255 - void bch2_print_string_as_lines(const char *prefix, const char *lines) 255 + static void __bch2_print_string_as_lines(const char *prefix, const char *lines, 256 + bool nonblocking) 256 257 { 258 + bool locked = false; 257 259 const char *p; 258 260 259 261 if (!lines) { ··· 263 261 return; 264 262 } 265 263 266 - console_lock(); 264 + if (!nonblocking) { 265 + console_lock(); 266 + locked = true; 267 + } else { 268 + locked = console_trylock(); 269 + } 270 + 267 271 while (1) { 268 272 p = strchrnul(lines, '\n'); 269 273 printk("%s%.*s\n", prefix, (int) (p - lines), lines); ··· 277 269 break; 278 270 lines = p + 1; 279 271 } 280 - console_unlock(); 272 + if (locked) 273 + console_unlock(); 274 + } 275 + 276 + void bch2_print_string_as_lines(const char *prefix, const char *lines) 277 + { 278 + return __bch2_print_string_as_lines(prefix, lines, false); 279 + } 280 + 281 + void bch2_print_string_as_lines_nonblocking(const char *prefix, const char *lines) 282 + { 283 + return __bch2_print_string_as_lines(prefix, lines, true); 281 284 } 282 285 283 286 int bch2_save_backtrace(bch_stacktrace *stack, struct task_struct *task, unsigned skipnr,

+1

fs/bcachefs/util.h

··· 315 315 void bch2_prt_u64_base2(struct printbuf *, u64); 316 316 317 317 void bch2_print_string_as_lines(const char *prefix, const char *lines); 318 + void bch2_print_string_as_lines_nonblocking(const char *prefix, const char *lines); 318 319 319 320 typedef DARRAY(unsigned long) bch_stacktrace; 320 321 int bch2_save_backtrace(bch_stacktrace *stack, struct task_struct *, unsigned, gfp_t);

+2

fs/btrfs/disk-io.c

··· 2856 2856 if (ret) 2857 2857 return ret; 2858 2858 2859 + spin_lock_init(&fs_info->extent_map_shrinker_lock); 2860 + 2859 2861 ret = percpu_counter_init(&fs_info->dirty_metadata_bytes, 0, GFP_KERNEL); 2860 2862 if (ret) 2861 2863 return ret;

+94 -29

fs/btrfs/extent_map.c

··· 1028 1028 return ret; 1029 1029 } 1030 1030 1031 - static long btrfs_scan_inode(struct btrfs_inode *inode, long *scanned, long nr_to_scan) 1031 + struct btrfs_em_shrink_ctx { 1032 + long nr_to_scan; 1033 + long scanned; 1034 + u64 last_ino; 1035 + u64 last_root; 1036 + }; 1037 + 1038 + static long btrfs_scan_inode(struct btrfs_inode *inode, struct btrfs_em_shrink_ctx *ctx) 1032 1039 { 1033 1040 const u64 cur_fs_gen = btrfs_get_fs_generation(inode->root->fs_info); 1034 1041 struct extent_map_tree *tree = &inode->extent_tree; ··· 1064 1057 if (!down_read_trylock(&inode->i_mmap_lock)) 1065 1058 return 0; 1066 1059 1067 - write_lock(&tree->lock); 1060 + /* 1061 + * We want to be fast because we can be called from any path trying to 1062 + * allocate memory, so if the lock is busy we don't want to spend time 1063 + * waiting for it - either some task is about to do IO for the inode or 1064 + * we may have another task shrinking extent maps, here in this code, so 1065 + * skip this inode. 1066 + */ 1067 + if (!write_trylock(&tree->lock)) { 1068 + up_read(&inode->i_mmap_lock); 1069 + return 0; 1070 + } 1071 + 1068 1072 node = rb_first_cached(&tree->map); 1069 1073 while (node) { 1070 1074 struct extent_map *em; 1071 1075 1072 1076 em = rb_entry(node, struct extent_map, rb_node); 1073 1077 node = rb_next(node); 1074 - (*scanned)++; 1078 + ctx->scanned++; 1075 1079 1076 1080 if (em->flags & EXTENT_FLAG_PINNED) 1077 1081 goto next; ··· 1103 1085 free_extent_map(em); 1104 1086 nr_dropped++; 1105 1087 next: 1106 - if (*scanned >= nr_to_scan) 1088 + if (ctx->scanned >= ctx->nr_to_scan) 1107 1089 break; 1108 1090 1109 1091 /* 1110 - * Restart if we had to reschedule, and any extent maps that were 1111 - * pinned before may have become unpinned after we released the 1112 - * lock and took it again. 1092 + * Stop if we need to reschedule or there's contention on the 1093 + * lock. This is to avoid slowing other tasks trying to take the 1094 + * lock and because the shrinker might be called during a memory 1095 + * allocation path and we want to avoid taking a very long time 1096 + * and slowing down all sorts of tasks. 1113 1097 */ 1114 - if (cond_resched_rwlock_write(&tree->lock)) 1115 - node = rb_first_cached(&tree->map); 1098 + if (need_resched() || rwlock_needbreak(&tree->lock)) 1099 + break; 1116 1100 } 1117 1101 write_unlock(&tree->lock); 1118 1102 up_read(&inode->i_mmap_lock); ··· 1122 1102 return nr_dropped; 1123 1103 } 1124 1104 1125 - static long btrfs_scan_root(struct btrfs_root *root, long *scanned, long nr_to_scan) 1105 + static long btrfs_scan_root(struct btrfs_root *root, struct btrfs_em_shrink_ctx *ctx) 1126 1106 { 1127 - struct btrfs_fs_info *fs_info = root->fs_info; 1128 1107 struct btrfs_inode *inode; 1129 1108 long nr_dropped = 0; 1130 - u64 min_ino = fs_info->extent_map_shrinker_last_ino + 1; 1109 + u64 min_ino = ctx->last_ino + 1; 1131 1110 1132 1111 inode = btrfs_find_first_inode(root, min_ino); 1133 1112 while (inode) { 1134 - nr_dropped += btrfs_scan_inode(inode, scanned, nr_to_scan); 1113 + nr_dropped += btrfs_scan_inode(inode, ctx); 1135 1114 1136 1115 min_ino = btrfs_ino(inode) + 1; 1137 - fs_info->extent_map_shrinker_last_ino = btrfs_ino(inode); 1138 - iput(&inode->vfs_inode); 1116 + ctx->last_ino = btrfs_ino(inode); 1117 + btrfs_add_delayed_iput(inode); 1139 1118 1140 - if (*scanned >= nr_to_scan) 1119 + if (ctx->scanned >= ctx->nr_to_scan) 1141 1120 break; 1142 1121 1143 - cond_resched(); 1122 + /* 1123 + * We may be called from memory allocation paths, so we don't 1124 + * want to take too much time and slowdown tasks. 1125 + */ 1126 + if (need_resched()) 1127 + break; 1128 + 1144 1129 inode = btrfs_find_first_inode(root, min_ino); 1145 1130 } 1146 1131 ··· 1157 1132 * inode if there is one or we will find out this was the last 1158 1133 * one and move to the next root. 1159 1134 */ 1160 - fs_info->extent_map_shrinker_last_root = btrfs_root_id(root); 1135 + ctx->last_root = btrfs_root_id(root); 1161 1136 } else { 1162 1137 /* 1163 1138 * No more inodes in this root, set extent_map_shrinker_last_ino to 0 so 1164 1139 * that when processing the next root we start from its first inode. 1165 1140 */ 1166 - fs_info->extent_map_shrinker_last_ino = 0; 1167 - fs_info->extent_map_shrinker_last_root = btrfs_root_id(root) + 1; 1141 + ctx->last_ino = 0; 1142 + ctx->last_root = btrfs_root_id(root) + 1; 1168 1143 } 1169 1144 1170 1145 return nr_dropped; ··· 1172 1147 1173 1148 long btrfs_free_extent_maps(struct btrfs_fs_info *fs_info, long nr_to_scan) 1174 1149 { 1175 - const u64 start_root_id = fs_info->extent_map_shrinker_last_root; 1176 - u64 next_root_id = start_root_id; 1150 + struct btrfs_em_shrink_ctx ctx; 1151 + u64 start_root_id; 1152 + u64 next_root_id; 1177 1153 bool cycled = false; 1178 1154 long nr_dropped = 0; 1179 - long scanned = 0; 1155 + 1156 + ctx.scanned = 0; 1157 + ctx.nr_to_scan = nr_to_scan; 1158 + 1159 + /* 1160 + * In case we have multiple tasks running this shrinker, make the next 1161 + * one start from the next inode in case it starts before we finish. 1162 + */ 1163 + spin_lock(&fs_info->extent_map_shrinker_lock); 1164 + ctx.last_ino = fs_info->extent_map_shrinker_last_ino; 1165 + fs_info->extent_map_shrinker_last_ino++; 1166 + ctx.last_root = fs_info->extent_map_shrinker_last_root; 1167 + spin_unlock(&fs_info->extent_map_shrinker_lock); 1168 + 1169 + start_root_id = ctx.last_root; 1170 + next_root_id = ctx.last_root; 1180 1171 1181 1172 if (trace_btrfs_extent_map_shrinker_scan_enter_enabled()) { 1182 1173 s64 nr = percpu_counter_sum_positive(&fs_info->evictable_extent_maps); 1183 1174 1184 - trace_btrfs_extent_map_shrinker_scan_enter(fs_info, nr_to_scan, nr); 1175 + trace_btrfs_extent_map_shrinker_scan_enter(fs_info, nr_to_scan, 1176 + nr, ctx.last_root, 1177 + ctx.last_ino); 1185 1178 } 1186 1179 1187 - while (scanned < nr_to_scan) { 1180 + /* 1181 + * We may be called from memory allocation paths, so we don't want to 1182 + * take too much time and slowdown tasks, so stop if we need reschedule. 1183 + */ 1184 + while (ctx.scanned < ctx.nr_to_scan && !need_resched()) { 1188 1185 struct btrfs_root *root; 1189 1186 unsigned long count; 1190 1187 ··· 1218 1171 spin_unlock(&fs_info->fs_roots_radix_lock); 1219 1172 if (start_root_id > 0 && !cycled) { 1220 1173 next_root_id = 0; 1221 - fs_info->extent_map_shrinker_last_root = 0; 1222 - fs_info->extent_map_shrinker_last_ino = 0; 1174 + ctx.last_root = 0; 1175 + ctx.last_ino = 0; 1223 1176 cycled = true; 1224 1177 continue; 1225 1178 } ··· 1233 1186 continue; 1234 1187 1235 1188 if (is_fstree(btrfs_root_id(root))) 1236 - nr_dropped += btrfs_scan_root(root, &scanned, nr_to_scan); 1189 + nr_dropped += btrfs_scan_root(root, &ctx); 1237 1190 1238 1191 btrfs_put_root(root); 1239 1192 } 1240 1193 1194 + /* 1195 + * In case of multiple tasks running this extent map shrinking code this 1196 + * isn't perfect but it's simple and silences things like KCSAN. It's 1197 + * not possible to know which task made more progress because we can 1198 + * cycle back to the first root and first inode if it's not the first 1199 + * time the shrinker ran, see the above logic. Also a task that started 1200 + * later may finish ealier than another task and made less progress. So 1201 + * make this simple and update to the progress of the last task that 1202 + * finished, with the occasional possiblity of having two consecutive 1203 + * runs of the shrinker process the same inodes. 1204 + */ 1205 + spin_lock(&fs_info->extent_map_shrinker_lock); 1206 + fs_info->extent_map_shrinker_last_ino = ctx.last_ino; 1207 + fs_info->extent_map_shrinker_last_root = ctx.last_root; 1208 + spin_unlock(&fs_info->extent_map_shrinker_lock); 1209 + 1241 1210 if (trace_btrfs_extent_map_shrinker_scan_exit_enabled()) { 1242 1211 s64 nr = percpu_counter_sum_positive(&fs_info->evictable_extent_maps); 1243 1212 1244 - trace_btrfs_extent_map_shrinker_scan_exit(fs_info, nr_dropped, nr); 1213 + trace_btrfs_extent_map_shrinker_scan_exit(fs_info, nr_dropped, 1214 + nr, ctx.last_root, 1215 + ctx.last_ino); 1245 1216 } 1246 1217 1247 1218 return nr_dropped;

+1

fs/btrfs/fs.h

··· 630 630 s32 delalloc_batch; 631 631 632 632 struct percpu_counter evictable_extent_maps; 633 + spinlock_t extent_map_shrinker_lock; 633 634 u64 extent_map_shrinker_last_root; 634 635 u64 extent_map_shrinker_last_ino; 635 636

+4

include/linux/spi/spi.h

··· 533 533 * @queue_empty: signal green light for opportunistically skipping the queue 534 534 * for spi_sync transfers. 535 535 * @must_async: disable all fast paths in the core 536 + * @defer_optimize_message: set to true if controller cannot pre-optimize messages 537 + * and needs to defer the optimization step until the message is actually 538 + * being transferred 536 539 * 537 540 * Each SPI controller can communicate with one or more @spi_device 538 541 * children. These make a small bus, sharing MOSI, MISO and SCK signals ··· 779 776 /* Flag for enabling opportunistic skipping of the queue in spi_sync */ 780 777 bool queue_empty; 781 778 bool must_async; 779 + bool defer_optimize_message; 782 780 }; 783 781 784 782 static inline void *spi_controller_get_devdata(struct spi_controller *ctlr)

+10 -8

include/trace/events/btrfs.h

··· 2556 2556 2557 2557 TRACE_EVENT(btrfs_extent_map_shrinker_scan_enter, 2558 2558 2559 - TP_PROTO(const struct btrfs_fs_info *fs_info, long nr_to_scan, long nr), 2559 + TP_PROTO(const struct btrfs_fs_info *fs_info, long nr_to_scan, long nr, 2560 + u64 last_root_id, u64 last_ino), 2560 2561 2561 - TP_ARGS(fs_info, nr_to_scan, nr), 2562 + TP_ARGS(fs_info, nr_to_scan, nr, last_root_id, last_ino), 2562 2563 2563 2564 TP_STRUCT__entry_btrfs( 2564 2565 __field( long, nr_to_scan ) ··· 2571 2570 TP_fast_assign_btrfs(fs_info, 2572 2571 __entry->nr_to_scan = nr_to_scan; 2573 2572 __entry->nr = nr; 2574 - __entry->last_root_id = fs_info->extent_map_shrinker_last_root; 2575 - __entry->last_ino = fs_info->extent_map_shrinker_last_ino; 2573 + __entry->last_root_id = last_root_id; 2574 + __entry->last_ino = last_ino; 2576 2575 ), 2577 2576 2578 2577 TP_printk_btrfs("nr_to_scan=%ld nr=%ld last_root=%llu(%s) last_ino=%llu", ··· 2582 2581 2583 2582 TRACE_EVENT(btrfs_extent_map_shrinker_scan_exit, 2584 2583 2585 - TP_PROTO(const struct btrfs_fs_info *fs_info, long nr_dropped, long nr), 2584 + TP_PROTO(const struct btrfs_fs_info *fs_info, long nr_dropped, long nr, 2585 + u64 last_root_id, u64 last_ino), 2586 2586 2587 - TP_ARGS(fs_info, nr_dropped, nr), 2587 + TP_ARGS(fs_info, nr_dropped, nr, last_root_id, last_ino), 2588 2588 2589 2589 TP_STRUCT__entry_btrfs( 2590 2590 __field( long, nr_dropped ) ··· 2597 2595 TP_fast_assign_btrfs(fs_info, 2598 2596 __entry->nr_dropped = nr_dropped; 2599 2597 __entry->nr = nr; 2600 - __entry->last_root_id = fs_info->extent_map_shrinker_last_root; 2601 - __entry->last_ino = fs_info->extent_map_shrinker_last_ino; 2598 + __entry->last_root_id = last_root_id; 2599 + __entry->last_ino = last_ino; 2602 2600 ), 2603 2601 2604 2602 TP_printk_btrfs("nr_dropped=%ld nr=%ld last_root=%llu(%s) last_ino=%llu",

+3

include/uapi/misc/fastrpc.h

··· 8 8 #define FASTRPC_IOCTL_ALLOC_DMA_BUFF _IOWR('R', 1, struct fastrpc_alloc_dma_buf) 9 9 #define FASTRPC_IOCTL_FREE_DMA_BUFF _IOWR('R', 2, __u32) 10 10 #define FASTRPC_IOCTL_INVOKE _IOWR('R', 3, struct fastrpc_invoke) 11 + /* This ioctl is only supported with secure device nodes */ 11 12 #define FASTRPC_IOCTL_INIT_ATTACH _IO('R', 4) 12 13 #define FASTRPC_IOCTL_INIT_CREATE _IOWR('R', 5, struct fastrpc_init_create) 13 14 #define FASTRPC_IOCTL_MMAP _IOWR('R', 6, struct fastrpc_req_mmap) 14 15 #define FASTRPC_IOCTL_MUNMAP _IOWR('R', 7, struct fastrpc_req_munmap) 16 + /* This ioctl is only supported with secure device nodes */ 15 17 #define FASTRPC_IOCTL_INIT_ATTACH_SNS _IO('R', 8) 18 + /* This ioctl is only supported with secure device nodes */ 16 19 #define FASTRPC_IOCTL_INIT_CREATE_STATIC _IOWR('R', 9, struct fastrpc_init_create_static) 17 20 #define FASTRPC_IOCTL_MEM_MAP _IOWR('R', 10, struct fastrpc_mem_map) 18 21 #define FASTRPC_IOCTL_MEM_UNMAP _IOWR('R', 11, struct fastrpc_mem_unmap)

+5 -2

net/ceph/crush/mapper.c

··· 429 429 /** 430 430 * crush_choose_firstn - choose numrep distinct items of given type 431 431 * @map: the crush_map 432 + * @work: working space initialized by crush_init_workspace() 432 433 * @bucket: the bucket we are choose an item from 434 + * @weight: weight vector (for map leaves) 435 + * @weight_max: size of weight vector 433 436 * @x: crush input value 434 437 * @numrep: the number of items to choose 435 438 * @type: the type of item to choose ··· 448 445 * @vary_r: pass r to recursive calls 449 446 * @out2: second output vector for leaf items (if @recurse_to_leaf) 450 447 * @parent_r: r value passed from the parent 448 + * @choose_args: weights and ids for each known bucket 451 449 */ 452 450 static int crush_choose_firstn(const struct crush_map *map, 453 451 struct crush_work *work, ··· 640 636 } 641 637 642 638 643 - /** 639 + /* 644 640 * crush_choose_indep: alternative breadth-first positionally stable mapping 645 - * 646 641 */ 647 642 static void crush_choose_indep(const struct crush_map *map, 648 643 struct crush_work *work,

+12 -2

net/ceph/mon_client.c

··· 1085 1085 struct ceph_mon_client *monc = 1086 1086 container_of(work, struct ceph_mon_client, delayed_work.work); 1087 1087 1088 - dout("monc delayed_work\n"); 1089 1088 mutex_lock(&monc->mutex); 1089 + dout("%s mon%d\n", __func__, monc->cur_mon); 1090 + if (monc->cur_mon < 0) { 1091 + goto out; 1092 + } 1093 + 1090 1094 if (monc->hunting) { 1091 1095 dout("%s continuing hunt\n", __func__); 1092 1096 reopen_session(monc); 1093 1097 } else { 1094 1098 int is_auth = ceph_auth_is_authenticated(monc->auth); 1099 + 1100 + dout("%s is_authed %d\n", __func__, is_auth); 1095 1101 if (ceph_con_keepalive_expired(&monc->con, 1096 1102 CEPH_MONC_PING_TIMEOUT)) { 1097 1103 dout("monc keepalive timeout\n"); ··· 1122 1116 } 1123 1117 } 1124 1118 __schedule_delayed(monc); 1119 + 1120 + out: 1125 1121 mutex_unlock(&monc->mutex); 1126 1122 } 1127 1123 ··· 1240 1232 void ceph_monc_stop(struct ceph_mon_client *monc) 1241 1233 { 1242 1234 dout("stop\n"); 1243 - cancel_delayed_work_sync(&monc->delayed_work); 1244 1235 1245 1236 mutex_lock(&monc->mutex); 1246 1237 __close_session(monc); 1238 + monc->hunting = false; 1247 1239 monc->cur_mon = -1; 1248 1240 mutex_unlock(&monc->mutex); 1241 + 1242 + cancel_delayed_work_sync(&monc->delayed_work); 1249 1243 1250 1244 /* 1251 1245 * flush msgr queue before we destroy ourselves to ensure that:

+2 -1

net/ethtool/ioctl.c

··· 1362 1362 if (rxfh.input_xfrm && rxfh.input_xfrm != RXH_XFRM_SYM_XOR && 1363 1363 rxfh.input_xfrm != RXH_XFRM_NO_CHANGE) 1364 1364 return -EINVAL; 1365 - if ((rxfh.input_xfrm & RXH_XFRM_SYM_XOR) && 1365 + if (rxfh.input_xfrm != RXH_XFRM_NO_CHANGE && 1366 + (rxfh.input_xfrm & RXH_XFRM_SYM_XOR) && 1366 1367 !ops->cap_rss_sym_xor_supported) 1367 1368 return -EOPNOTSUPP; 1368 1369 create = rxfh.rss_context == ETH_RXFH_CONTEXT_ALLOC;

+2 -2

sound/pci/hda/cs35l41_hda_property.c

··· 128 128 { "17AA38B5", 2, EXTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, 0, 0 }, 0, 1, -1, 0, 0, 0 }, 129 129 { "17AA38B6", 2, EXTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, 0, 0 }, 0, 1, -1, 0, 0, 0 }, 130 130 { "17AA38B7", 2, EXTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, 0, 0 }, 0, 1, -1, 0, 0, 0 }, 131 - { "17AA38C7", 4, INTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, CS35L41_LEFT, CS35L41_RIGHT }, 0, 2, -1, 1000, 4500, 24 }, 132 - { "17AA38C8", 4, INTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, CS35L41_LEFT, CS35L41_RIGHT }, 0, 2, -1, 1000, 4500, 24 }, 131 + { "17AA38C7", 4, INTERNAL, { CS35L41_RIGHT, CS35L41_LEFT, CS35L41_RIGHT, CS35L41_LEFT }, 0, 2, -1, 1000, 4500, 24 }, 132 + { "17AA38C8", 4, INTERNAL, { CS35L41_RIGHT, CS35L41_LEFT, CS35L41_RIGHT, CS35L41_LEFT }, 0, 2, -1, 1000, 4500, 24 }, 133 133 { "17AA38F9", 2, EXTERNAL, { CS35L41_RIGHT, CS35L41_LEFT, 0, 0 }, 0, 2, -1, 0, 0, 0 }, 134 134 { "17AA38FA", 2, EXTERNAL, { CS35L41_RIGHT, CS35L41_LEFT, 0, 0 }, 0, 2, -1, 0, 0, 0 }, 135 135 {}

+4

sound/pci/hda/patch_realtek.c

··· 10053 10053 SND_PCI_QUIRK(0x103c, 0x83b9, "HP Spectre x360", ALC269_FIXUP_HP_MUTE_LED_MIC3), 10054 10054 SND_PCI_QUIRK(0x103c, 0x841c, "HP Pavilion 15-CK0xx", ALC269_FIXUP_HP_MUTE_LED_MIC3), 10055 10055 SND_PCI_QUIRK(0x103c, 0x8497, "HP Envy x360", ALC269_FIXUP_HP_MUTE_LED_MIC3), 10056 + SND_PCI_QUIRK(0x103c, 0x84a6, "HP 250 G7 Notebook PC", ALC269_FIXUP_HP_LINE1_MIC1_LED), 10056 10057 SND_PCI_QUIRK(0x103c, 0x84ae, "HP 15-db0403ng", ALC236_FIXUP_HP_MUTE_LED_COEFBIT2), 10057 10058 SND_PCI_QUIRK(0x103c, 0x84da, "HP OMEN dc0019-ur", ALC295_FIXUP_HP_OMEN), 10058 10059 SND_PCI_QUIRK(0x103c, 0x84e7, "HP Pavilion 15", ALC269_FIXUP_HP_MUTE_LED_MIC3), ··· 10384 10383 SND_PCI_QUIRK(0x10cf, 0x1845, "Lifebook U904", ALC269_FIXUP_LIFEBOOK_EXTMIC), 10385 10384 SND_PCI_QUIRK(0x10ec, 0x10f2, "Intel Reference board", ALC700_FIXUP_INTEL_REFERENCE), 10386 10385 SND_PCI_QUIRK(0x10ec, 0x118c, "Medion EE4254 MD62100", ALC256_FIXUP_MEDION_HEADSET_NO_PRESENCE), 10386 + SND_PCI_QUIRK(0x10ec, 0x11bc, "VAIO VJFE-IL", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), 10387 10387 SND_PCI_QUIRK(0x10ec, 0x1230, "Intel Reference board", ALC295_FIXUP_CHROME_BOOK), 10388 10388 SND_PCI_QUIRK(0x10ec, 0x124c, "Intel Reference board", ALC295_FIXUP_CHROME_BOOK), 10389 10389 SND_PCI_QUIRK(0x10ec, 0x1252, "Intel Reference board", ALC295_FIXUP_CHROME_BOOK), ··· 10482 10480 SND_PCI_QUIRK(0x1558, 0xa600, "Clevo NL50NU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE), 10483 10481 SND_PCI_QUIRK(0x1558, 0xa650, "Clevo NP[567]0SN[CD]", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE), 10484 10482 SND_PCI_QUIRK(0x1558, 0xa671, "Clevo NP70SN[CDE]", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE), 10483 + SND_PCI_QUIRK(0x1558, 0xa763, "Clevo V54x_6x_TU", ALC256_FIXUP_SYSTEM76_MIC_NO_PRESENCE), 10485 10484 SND_PCI_QUIRK(0x1558, 0xb018, "Clevo NP50D[BE]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE), 10486 10485 SND_PCI_QUIRK(0x1558, 0xb019, "Clevo NH77D[BE]Q", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE), 10487 10486 SND_PCI_QUIRK(0x1558, 0xb022, "Clevo NH77D[DC][QW]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE), ··· 10658 10655 SND_PCI_QUIRK(0x1d72, 0x1901, "RedmiBook 14", ALC256_FIXUP_ASUS_HEADSET_MIC), 10659 10656 SND_PCI_QUIRK(0x1d72, 0x1945, "Redmi G", ALC256_FIXUP_ASUS_HEADSET_MIC), 10660 10657 SND_PCI_QUIRK(0x1d72, 0x1947, "RedmiBook Air", ALC255_FIXUP_XIAOMI_HEADSET_MIC), 10658 + SND_PCI_QUIRK(0x2782, 0x0214, "VAIO VJFE-CL", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), 10661 10659 SND_PCI_QUIRK(0x2782, 0x0232, "CHUWI CoreBook XPro", ALC269VB_FIXUP_CHUWI_COREBOOK_XPRO), 10662 10660 SND_PCI_QUIRK(0x2782, 0x1707, "Vaio VJFE-ADL", ALC298_FIXUP_SPK_VOLUME), 10663 10661 SND_PCI_QUIRK(0x8086, 0x2074, "Intel NUC 8", ALC233_FIXUP_INTEL_NUC8_DMIC),

+2

sound/soc/codecs/rt711-sdw.c

··· 38 38 case 0x8300 ... 0x83ff: 39 39 case 0x9c00 ... 0x9cff: 40 40 case 0xb900 ... 0xb9ff: 41 + case 0x752008: 41 42 case 0x752009: 43 + case 0x75200b: 42 44 case 0x752011: 43 45 case 0x75201a: 44 46 case 0x752045:

+6 -6

sound/soc/sof/intel/hda-dai.c

··· 617 617 sdai = swidget->private; 618 618 ops = sdai->platform_private; 619 619 620 - ret = hda_link_dma_cleanup(hext_stream->link_substream, 621 - hext_stream, 622 - cpu_dai); 623 - if (ret < 0) 624 - return ret; 625 - 626 620 /* for consistency with TRIGGER_SUSPEND */ 627 621 if (ops->post_trigger) { 628 622 ret = ops->post_trigger(sdev, cpu_dai, ··· 625 631 if (ret < 0) 626 632 return ret; 627 633 } 634 + 635 + ret = hda_link_dma_cleanup(hext_stream->link_substream, 636 + hext_stream, 637 + cpu_dai); 638 + if (ret < 0) 639 + return ret; 628 640 } 629 641 } 630 642

+6

sound/soc/sof/intel/hda-pcm.c

··· 258 258 snd_pcm_hw_constraint_integer(substream->runtime, 259 259 SNDRV_PCM_HW_PARAM_PERIODS); 260 260 261 + /* Limit the maximum number of periods to not exceed the BDL entries count */ 262 + if (runtime->hw.periods_max > HDA_DSP_MAX_BDL_ENTRIES) 263 + snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIODS, 264 + runtime->hw.periods_min, 265 + HDA_DSP_MAX_BDL_ENTRIES); 266 + 261 267 /* Only S16 and S32 supported by HDA hardware when used without DSP */ 262 268 if (sdev->dspless_mode_selected) 263 269 snd_pcm_hw_constraint_mask64(substream->runtime, SNDRV_PCM_HW_PARAM_FORMAT,

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