tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'mips_fixes_4.15_2' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips

Pull MIPS fixes from James Hogan:
"Some final MIPS fixes for 4.15, including important build fixes and a
MAINTAINERS update:

- Add myself as MIPS co-maintainer.

- Fix various all*config build failures (particularly as a result of
switching the default MIPS platform to the "generic" platform).

- Fix GCC7 build failures (duplicate const and questionable calls to
missing __multi3 intrinsic on mips64r6).

- Fix warnings when CPU Idle is enabled (4.14).

- Fix AR7 serial output (since 3.17).

- Fix ralink platform_get_irq error checking (since 3.12)"

* tag 'mips_fixes_4.15_2' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips:
MAINTAINERS: Add James as MIPS co-maintainer
MIPS: Fix undefined reference to physical_memsize
MIPS: Implement __multi3 for GCC7 MIPS64r6 builds
MIPS: mm: Fix duplicate "const" on insn_table_MM
MIPS: CM: Drop WARN_ON(vp != 0)
MIPS: ralink: Fix platform_get_irq's error checking
MIPS: Fix CPS SMP NS16550 UART defaults
MIPS: BCM47XX Avoid compile error with MIPS allnoconfig
MIPS: RB532: Avoid undefined mac_pton without GENERIC_NET_UTILS
MIPS: RB532: Avoid undefined early_serial_setup() without SERIAL_8250_CONSOLE
MIPS: ath25: Avoid undefined early_serial_setup() without SERIAL_8250_CONSOLE
MIPS: AR7: ensure the port type's FCR value is used

Linus Torvalds e6252e7f 8dd903d2

+108 -12
+1
MAINTAINERS
··· 9085 9085 9086 9086 MIPS 9087 9087 M: Ralf Baechle <ralf@linux-mips.org> 9088 + M: James Hogan <jhogan@kernel.org> 9088 9089 L: linux-mips@linux-mips.org 9089 9090 W: http://www.linux-mips.org/ 9090 9091 T: git git://git.linux-mips.org/pub/scm/ralf/linux.git
+11 -1
arch/mips/Kconfig
··· 259 259 select LEDS_GPIO_REGISTER 260 260 select BCM47XX_NVRAM 261 261 select BCM47XX_SPROM 262 + select BCM47XX_SSB if !BCM47XX_BCMA 262 263 help 263 264 Support for BCM47XX based boards 264 265 ··· 390 389 select SYS_SUPPORTS_32BIT_KERNEL 391 390 select SYS_SUPPORTS_MIPS16 392 391 select SYS_SUPPORTS_MULTITHREADING 392 + select SYS_SUPPORTS_VPE_LOADER 393 393 select SYS_HAS_EARLY_PRINTK 394 394 select GPIOLIB 395 395 select SWAP_IO_SPACE ··· 518 516 select SYS_SUPPORTS_MIPS16 519 517 select SYS_SUPPORTS_MULTITHREADING 520 518 select SYS_SUPPORTS_SMARTMIPS 519 + select SYS_SUPPORTS_VPE_LOADER 521 520 select SYS_SUPPORTS_ZBOOT 522 521 select SYS_SUPPORTS_RELOCATABLE 523 522 select USE_OF ··· 2284 2281 The only reason this is a build-time option is to save ~14K from the 2285 2282 final kernel image. 2286 2283 2284 + config SYS_SUPPORTS_VPE_LOADER 2285 + bool 2286 + depends on SYS_SUPPORTS_MULTITHREADING 2287 + help 2288 + Indicates that the platform supports the VPE loader, and provides 2289 + physical_memsize. 2290 + 2287 2291 config MIPS_VPE_LOADER 2288 2292 bool "VPE loader support." 2289 - depends on SYS_SUPPORTS_MULTITHREADING && MODULES 2293 + depends on SYS_SUPPORTS_VPE_LOADER && MODULES 2290 2294 select CPU_MIPSR2_IRQ_VI 2291 2295 select CPU_MIPSR2_IRQ_EI 2292 2296 select MIPS_MT
+10 -4
arch/mips/Kconfig.debug
··· 124 124 125 125 If unsure, say N. 126 126 127 - menuconfig MIPS_CPS_NS16550 127 + menuconfig MIPS_CPS_NS16550_BOOL 128 128 bool "CPS SMP NS16550 UART output" 129 129 depends on MIPS_CPS 130 130 help 131 131 Output debug information via an ns16550 compatible UART if exceptions 132 132 occur early in the boot process of a secondary core. 133 133 134 - if MIPS_CPS_NS16550 134 + if MIPS_CPS_NS16550_BOOL 135 + 136 + config MIPS_CPS_NS16550 137 + def_bool MIPS_CPS_NS16550_BASE != 0 135 138 136 139 config MIPS_CPS_NS16550_BASE 137 140 hex "UART Base Address" 138 141 default 0x1b0003f8 if MIPS_MALTA 142 + default 0 139 143 help 140 144 The base address of the ns16550 compatible UART on which to output 141 145 debug information from the early stages of core startup. 142 146 147 + This is only used if non-zero. 148 + 143 149 config MIPS_CPS_NS16550_SHIFT 144 150 int "UART Register Shift" 145 - default 0 if MIPS_MALTA 151 + default 0 146 152 help 147 153 The number of bits to shift ns16550 register indices by in order to 148 154 form their addresses. That is, log base 2 of the span between 149 155 adjacent ns16550 registers in the system. 150 156 151 - endif # MIPS_CPS_NS16550 157 + endif # MIPS_CPS_NS16550_BOOL 152 158 153 159 endmenu
+1 -1
arch/mips/ar7/platform.c
··· 575 575 uart_port.type = PORT_AR7; 576 576 uart_port.uartclk = clk_get_rate(bus_clk) / 2; 577 577 uart_port.iotype = UPIO_MEM32; 578 - uart_port.flags = UPF_FIXED_TYPE; 578 + uart_port.flags = UPF_FIXED_TYPE | UPF_BOOT_AUTOCONF; 579 579 uart_port.regshift = 2; 580 580 581 581 uart_port.line = 0;
+2
arch/mips/ath25/devices.c
··· 73 73 74 74 void __init ath25_serial_setup(u32 mapbase, int irq, unsigned int uartclk) 75 75 { 76 + #ifdef CONFIG_SERIAL_8250_CONSOLE 76 77 struct uart_port s; 77 78 78 79 memset(&s, 0, sizeof(s)); ··· 86 85 s.uartclk = uartclk; 87 86 88 87 early_serial_setup(&s); 88 + #endif /* CONFIG_SERIAL_8250_CONSOLE */ 89 89 } 90 90 91 91 int __init ath25_add_wmac(int nr, u32 base, int irq)
-1
arch/mips/kernel/mips-cm.c
··· 292 292 *this_cpu_ptr(&cm_core_lock_flags)); 293 293 } else { 294 294 WARN_ON(cluster != 0); 295 - WARN_ON(vp != 0); 296 295 WARN_ON(block != CM_GCR_Cx_OTHER_BLOCK_LOCAL); 297 296 298 297 /*
+2 -1
arch/mips/lib/Makefile
··· 16 16 obj-$(CONFIG_CPU_TX39XX) += r3k_dump_tlb.o 17 17 18 18 # libgcc-style stuff needed in the kernel 19 - obj-y += ashldi3.o ashrdi3.o bswapsi.o bswapdi.o cmpdi2.o lshrdi3.o ucmpdi2.o 19 + obj-y += ashldi3.o ashrdi3.o bswapsi.o bswapdi.o cmpdi2.o lshrdi3.o multi3.o \ 20 + ucmpdi2.o
+17
arch/mips/lib/libgcc.h
··· 10 10 struct DWstruct { 11 11 int high, low; 12 12 }; 13 + 14 + struct TWstruct { 15 + long long high, low; 16 + }; 13 17 #elif defined(__LITTLE_ENDIAN) 14 18 struct DWstruct { 15 19 int low, high; 20 + }; 21 + 22 + struct TWstruct { 23 + long long low, high; 16 24 }; 17 25 #else 18 26 #error I feel sick. ··· 30 22 struct DWstruct s; 31 23 long long ll; 32 24 } DWunion; 25 + 26 + #if defined(CONFIG_64BIT) && defined(CONFIG_CPU_MIPSR6) 27 + typedef int ti_type __attribute__((mode(TI))); 28 + 29 + typedef union { 30 + struct TWstruct s; 31 + ti_type ti; 32 + } TWunion; 33 + #endif 33 34 34 35 #endif /* __ASM_LIBGCC_H */
+54
arch/mips/lib/multi3.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + #include <linux/export.h> 3 + 4 + #include "libgcc.h" 5 + 6 + /* 7 + * GCC 7 suboptimally generates __multi3 calls for mips64r6, so for that 8 + * specific case only we'll implement it here. 9 + * 10 + * See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82981 11 + */ 12 + #if defined(CONFIG_64BIT) && defined(CONFIG_CPU_MIPSR6) && (__GNUC__ == 7) 13 + 14 + /* multiply 64-bit values, low 64-bits returned */ 15 + static inline long long notrace dmulu(long long a, long long b) 16 + { 17 + long long res; 18 + 19 + asm ("dmulu %0,%1,%2" : "=r" (res) : "r" (a), "r" (b)); 20 + return res; 21 + } 22 + 23 + /* multiply 64-bit unsigned values, high 64-bits of 128-bit result returned */ 24 + static inline long long notrace dmuhu(long long a, long long b) 25 + { 26 + long long res; 27 + 28 + asm ("dmuhu %0,%1,%2" : "=r" (res) : "r" (a), "r" (b)); 29 + return res; 30 + } 31 + 32 + /* multiply 128-bit values, low 128-bits returned */ 33 + ti_type notrace __multi3(ti_type a, ti_type b) 34 + { 35 + TWunion res, aa, bb; 36 + 37 + aa.ti = a; 38 + bb.ti = b; 39 + 40 + /* 41 + * a * b = (a.lo * b.lo) 42 + * + 2^64 * (a.hi * b.lo + a.lo * b.hi) 43 + * [+ 2^128 * (a.hi * b.hi)] 44 + */ 45 + res.s.low = dmulu(aa.s.low, bb.s.low); 46 + res.s.high = dmuhu(aa.s.low, bb.s.low); 47 + res.s.high += dmulu(aa.s.high, bb.s.low); 48 + res.s.high += dmulu(aa.s.low, bb.s.high); 49 + 50 + return res.ti; 51 + } 52 + EXPORT_SYMBOL(__multi3); 53 + 54 + #endif /* 64BIT && CPU_MIPSR6 && GCC7 */
+1 -1
arch/mips/mm/uasm-micromips.c
··· 40 40 41 41 #include "uasm.c" 42 42 43 - static const struct insn const insn_table_MM[insn_invalid] = { 43 + static const struct insn insn_table_MM[insn_invalid] = { 44 44 [insn_addu] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_addu32_op), RT | RS | RD}, 45 45 [insn_addiu] = {M(mm_addiu32_op, 0, 0, 0, 0, 0), RT | RS | SIMM}, 46 46 [insn_and] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_and_op), RT | RS | RD},
+2 -2
arch/mips/ralink/timer.c
··· 109 109 } 110 110 111 111 rt->irq = platform_get_irq(pdev, 0); 112 - if (!rt->irq) { 112 + if (rt->irq < 0) { 113 113 dev_err(&pdev->dev, "failed to load irq\n"); 114 - return -ENOENT; 114 + return rt->irq; 115 115 } 116 116 117 117 rt->membase = devm_ioremap_resource(&pdev->dev, res);
+3 -1
arch/mips/rb532/Makefile
··· 2 2 # Makefile for the RB532 board specific parts of the kernel 3 3 # 4 4 5 - obj-y += irq.o time.o setup.o serial.o prom.o gpio.o devices.o 5 + obj-$(CONFIG_SERIAL_8250_CONSOLE) += serial.o 6 + 7 + obj-y += irq.o time.o setup.o prom.o gpio.o devices.o
+4
arch/mips/rb532/devices.c
··· 310 310 return platform_add_devices(rb532_devs, ARRAY_SIZE(rb532_devs)); 311 311 } 312 312 313 + #ifdef CONFIG_NET 314 + 313 315 static int __init setup_kmac(char *s) 314 316 { 315 317 printk(KERN_INFO "korina mac = %s\n", s); ··· 323 321 } 324 322 325 323 __setup("kmac=", setup_kmac); 324 + 325 + #endif /* CONFIG_NET */ 326 326 327 327 arch_initcall(plat_setup_devices);