Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86: fix resume (S2R) broken by Intel microcode module, on A110L
x86 gart: don't complain if no AMD GART found
AMD IOMMU: panic if completion wait loop fails
AMD IOMMU: set cmd buffer pointers to zero manually
x86: re-enable MCE on secondary CPUS after suspend/resume
AMD IOMMU: allocate rlookup_table with __GFP_ZERO
+30
-14
+3
-2
arch/x86/kernel/amd_iommu.c
+3
-2
arch/x86/kernel/amd_iommu.c
···
235
235
status &= ~MMIO_STATUS_COM_WAIT_INT_MASK;
236
236
writel(status, iommu->mmio_base + MMIO_STATUS_OFFSET);
237
237
238
-
if (unlikely((i == EXIT_LOOP_COUNT) && printk_ratelimit()))
239
-
printk(KERN_WARNING "AMD IOMMU: Completion wait loop failed\n");
238
+
if (unlikely(i == EXIT_LOOP_COUNT))
239
+
panic("AMD IOMMU: Completion wait loop failed\n");
240
+
240
241
out:
241
242
spin_unlock_irqrestore(&iommu->lock, flags);
242
243
+6
-1
arch/x86/kernel/amd_iommu_init.c
+6
-1
arch/x86/kernel/amd_iommu_init.c
···
427
427
memcpy_toio(iommu->mmio_base + MMIO_CMD_BUF_OFFSET,
428
428
&entry, sizeof(entry));
429
429
430
+
/* set head and tail to zero manually */
431
+
writel(0x00, iommu->mmio_base + MMIO_CMD_HEAD_OFFSET);
432
+
writel(0x00, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
433
+
430
434
iommu_feature_enable(iommu, CONTROL_CMDBUF_EN);
431
435
432
436
return cmd_buf;
···
1078
1074
goto free;
1079
1075
1080
1076
/* IOMMU rlookup table - find the IOMMU for a specific device */
1081
-
amd_iommu_rlookup_table = (void *)__get_free_pages(GFP_KERNEL,
1077
+
amd_iommu_rlookup_table = (void *)__get_free_pages(
1078
+
GFP_KERNEL | __GFP_ZERO,
1082
1079
get_order(rlookup_table_size));
1083
1080
if (amd_iommu_rlookup_table == NULL)
1084
1081
goto free;
-3
arch/x86/kernel/cpu/mcheck/mce_64.c
-3
arch/x86/kernel/cpu/mcheck/mce_64.c
···
510
510
*/
511
511
void __cpuinit mcheck_init(struct cpuinfo_x86 *c)
512
512
{
513
-
static cpumask_t mce_cpus = CPU_MASK_NONE;
514
-
515
513
mce_cpu_quirks(c);
516
514
517
515
if (mce_dont_init ||
518
-
cpu_test_and_set(smp_processor_id(), mce_cpus) ||
519
516
!mce_available(c))
520
517
return;
521
518
+14
-5
arch/x86/kernel/microcode_core.c
+14
-5
arch/x86/kernel/microcode_core.c
···
272
272
.name = "microcode",
273
273
};
274
274
275
-
static void microcode_fini_cpu(int cpu)
275
+
static void __microcode_fini_cpu(int cpu)
276
276
{
277
277
struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
278
278
279
-
mutex_lock(µcode_mutex);
280
279
microcode_ops->microcode_fini_cpu(cpu);
281
280
uci->valid = 0;
281
+
}
282
+
283
+
static void microcode_fini_cpu(int cpu)
284
+
{
285
+
mutex_lock(µcode_mutex);
286
+
__microcode_fini_cpu(cpu);
282
287
mutex_unlock(µcode_mutex);
283
288
}
284
289
···
311
306
* to this cpu (a bit of paranoia):
312
307
*/
313
308
if (microcode_ops->collect_cpu_info(cpu, &nsig)) {
314
-
microcode_fini_cpu(cpu);
309
+
__microcode_fini_cpu(cpu);
310
+
printk(KERN_ERR "failed to collect_cpu_info for resuming cpu #%d\n",
311
+
cpu);
315
312
return -1;
316
313
}
317
314
318
-
if (memcmp(&nsig, &uci->cpu_sig, sizeof(nsig))) {
319
-
microcode_fini_cpu(cpu);
315
+
if ((nsig.sig != uci->cpu_sig.sig) || (nsig.pf != uci->cpu_sig.pf)) {
316
+
__microcode_fini_cpu(cpu);
317
+
printk(KERN_ERR "cached ucode doesn't match the resuming cpu #%d\n",
318
+
cpu);
320
319
/* Should we look for a new ucode here? */
321
320
return 1;
322
321
}
+6
arch/x86/kernel/microcode_intel.c
+6
arch/x86/kernel/microcode_intel.c
···
155
155
static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
156
156
{
157
157
struct cpuinfo_x86 *c = &cpu_data(cpu_num);
158
+
unsigned long flags;
158
159
unsigned int val[2];
159
160
160
161
memset(csig, 0, sizeof(*csig));
···
175
174
csig->pf = 1 << ((val[1] >> 18) & 7);
176
175
}
177
176
177
+
/* serialize access to the physical write to MSR 0x79 */
178
+
spin_lock_irqsave(µcode_update_lock, flags);
179
+
178
180
wrmsr(MSR_IA32_UCODE_REV, 0, 0);
179
181
/* see notes above for revision 1.07. Apparent chip bug */
180
182
sync_core();
181
183
/* get the current revision from MSR 0x8B */
182
184
rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev);
185
+
spin_unlock_irqrestore(µcode_update_lock, flags);
186
+
183
187
pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
184
188
csig->sig, csig->pf, csig->rev);
185
189
+1
-3
arch/x86/kernel/pci-gart_64.c
+1
-3
arch/x86/kernel/pci-gart_64.c
···
745
745
unsigned long scratch;
746
746
long i;
747
747
748
-
if (cache_k8_northbridges() < 0 || num_k8_northbridges == 0) {
749
-
printk(KERN_INFO "PCI-GART: No AMD GART found.\n");
748
+
if (cache_k8_northbridges() < 0 || num_k8_northbridges == 0)
750
749
return;
751
-
}
752
750
753
751
#ifndef CONFIG_AGP_AMD64
754
752
no_agp = 1;