-6

MAINTAINERS

reviewed

··· 261 261 S: Maintained 262 262 F: drivers/gpio/gpio-pcie-idio-24.c 263 263 264 264 - ACENIC DRIVER 265 265 - M: Jes Sorensen <jes@trained-monkey.org> 266 266 - L: linux-acenic@sunsite.dk 267 267 - S: Maintained 268 268 - F: drivers/net/ethernet/alteon/acenic* 269 269 - 270 264 ACER ASPIRE ONE TEMPERATURE AND FAN DRIVER 271 265 M: Peter Kaestle <peter@piie.net> 272 266 L: platform-driver-x86@vger.kernel.org

-1

arch/loongarch/configs/loongson32_defconfig

reviewed

··· 571 571 # CONFIG_NET_VENDOR_ADAPTEC is not set 572 572 # CONFIG_NET_VENDOR_AGERE is not set 573 573 # CONFIG_NET_VENDOR_ALACRITECH is not set 574 574 - # CONFIG_NET_VENDOR_ALTEON is not set 575 574 # CONFIG_NET_VENDOR_AMAZON is not set 576 575 # CONFIG_NET_VENDOR_AMD is not set 577 576 # CONFIG_NET_VENDOR_AQUANTIA is not set

-1

arch/loongarch/configs/loongson64_defconfig

reviewed

··· 587 587 # CONFIG_NET_VENDOR_ADAPTEC is not set 588 588 # CONFIG_NET_VENDOR_AGERE is not set 589 589 # CONFIG_NET_VENDOR_ALACRITECH is not set 590 590 - # CONFIG_NET_VENDOR_ALTEON is not set 591 590 # CONFIG_NET_VENDOR_AMAZON is not set 592 591 # CONFIG_NET_VENDOR_AMD is not set 593 592 # CONFIG_NET_VENDOR_AQUANTIA is not set

-1

arch/mips/configs/cavium_octeon_defconfig

reviewed

··· 60 60 CONFIG_NETDEVICES=y 61 61 # CONFIG_NET_VENDOR_3COM is not set 62 62 # CONFIG_NET_VENDOR_ADAPTEC is not set 63 63 - # CONFIG_NET_VENDOR_ALTEON is not set 64 63 # CONFIG_NET_VENDOR_AMD is not set 65 64 # CONFIG_NET_VENDOR_ATHEROS is not set 66 65 # CONFIG_NET_VENDOR_BROADCOM is not set

-1

arch/mips/configs/loongson2k_defconfig

reviewed

··· 137 137 CONFIG_TUN=m 138 138 # CONFIG_NET_VENDOR_3COM is not set 139 139 # CONFIG_NET_VENDOR_ADAPTEC is not set 140 140 - # CONFIG_NET_VENDOR_ALTEON is not set 141 140 # CONFIG_NET_VENDOR_AMD is not set 142 141 # CONFIG_NET_VENDOR_ARC is not set 143 142 # CONFIG_NET_VENDOR_ATHEROS is not set

-1

arch/mips/configs/loongson3_defconfig

reviewed

··· 184 184 CONFIG_VIRTIO_NET=m 185 185 # CONFIG_NET_VENDOR_3COM is not set 186 186 # CONFIG_NET_VENDOR_ADAPTEC is not set 187 187 - # CONFIG_NET_VENDOR_ALTEON is not set 188 187 # CONFIG_NET_VENDOR_AMD is not set 189 188 # CONFIG_NET_VENDOR_ARC is not set 190 189 # CONFIG_NET_VENDOR_ATHEROS is not set

-1

arch/mips/configs/malta_qemu_32r6_defconfig

reviewed

··· 85 85 CONFIG_NETDEVICES=y 86 86 # CONFIG_NET_VENDOR_3COM is not set 87 87 # CONFIG_NET_VENDOR_ADAPTEC is not set 88 88 - # CONFIG_NET_VENDOR_ALTEON is not set 89 88 CONFIG_PCNET32=y 90 89 # CONFIG_NET_VENDOR_ATHEROS is not set 91 90 # CONFIG_NET_VENDOR_BROADCOM is not set

-1

arch/mips/configs/maltaaprp_defconfig

reviewed

··· 87 87 CONFIG_NETDEVICES=y 88 88 # CONFIG_NET_VENDOR_3COM is not set 89 89 # CONFIG_NET_VENDOR_ADAPTEC is not set 90 90 - # CONFIG_NET_VENDOR_ALTEON is not set 91 90 CONFIG_PCNET32=y 92 91 # CONFIG_NET_VENDOR_ATHEROS is not set 93 92 # CONFIG_NET_VENDOR_BROADCOM is not set

-1

arch/mips/configs/maltasmvp_defconfig

reviewed

··· 86 86 CONFIG_NETDEVICES=y 87 87 # CONFIG_NET_VENDOR_3COM is not set 88 88 # CONFIG_NET_VENDOR_ADAPTEC is not set 89 89 - # CONFIG_NET_VENDOR_ALTEON is not set 90 89 CONFIG_PCNET32=y 91 90 # CONFIG_NET_VENDOR_ATHEROS is not set 92 91 # CONFIG_NET_VENDOR_BROADCOM is not set

-1

arch/mips/configs/maltasmvp_eva_defconfig

reviewed

··· 89 89 CONFIG_NETDEVICES=y 90 90 # CONFIG_NET_VENDOR_3COM is not set 91 91 # CONFIG_NET_VENDOR_ADAPTEC is not set 92 92 - # CONFIG_NET_VENDOR_ALTEON is not set 93 92 CONFIG_PCNET32=y 94 93 # CONFIG_NET_VENDOR_ATHEROS is not set 95 94 # CONFIG_NET_VENDOR_BROADCOM is not set

-1

arch/mips/configs/maltaup_defconfig

reviewed

··· 86 86 CONFIG_NETDEVICES=y 87 87 # CONFIG_NET_VENDOR_3COM is not set 88 88 # CONFIG_NET_VENDOR_ADAPTEC is not set 89 89 - # CONFIG_NET_VENDOR_ALTEON is not set 90 89 CONFIG_PCNET32=y 91 90 # CONFIG_NET_VENDOR_ATHEROS is not set 92 91 # CONFIG_NET_VENDOR_BROADCOM is not set

-1

arch/mips/configs/mtx1_defconfig

reviewed

··· 257 257 CONFIG_VORTEX=m 258 258 CONFIG_TYPHOON=m 259 259 CONFIG_ADAPTEC_STARFIRE=m 260 260 - CONFIG_ACENIC=m 261 260 CONFIG_AMD8111_ETH=m 262 261 CONFIG_PCNET32=m 263 262 CONFIG_PCMCIA_NMCLAN=m

-1

arch/parisc/configs/generic-32bit_defconfig

reviewed

··· 78 78 CONFIG_TUN=m 79 79 # CONFIG_NET_VENDOR_3COM is not set 80 80 # CONFIG_NET_VENDOR_ADAPTEC is not set 81 81 - # CONFIG_NET_VENDOR_ALTEON is not set 82 81 # CONFIG_NET_VENDOR_AMD is not set 83 82 # CONFIG_NET_VENDOR_ATHEROS is not set 84 83 # CONFIG_NET_VENDOR_BROADCOM is not set

-1

arch/parisc/configs/generic-64bit_defconfig

reviewed

··· 97 97 CONFIG_TUN=y 98 98 # CONFIG_NET_VENDOR_3COM is not set 99 99 # CONFIG_NET_VENDOR_ADAPTEC is not set 100 100 - # CONFIG_NET_VENDOR_ALTEON is not set 101 100 # CONFIG_NET_VENDOR_AMD is not set 102 101 # CONFIG_NET_VENDOR_ATHEROS is not set 103 102 # CONFIG_NET_VENDOR_BROADCOM is not set

-1

arch/powerpc/configs/44x/akebono_defconfig

reviewed

··· 47 47 # CONFIG_ATA_SFF is not set 48 48 # CONFIG_NET_VENDOR_3COM is not set 49 49 # CONFIG_NET_VENDOR_ADAPTEC is not set 50 50 - # CONFIG_NET_VENDOR_ALTEON is not set 51 50 # CONFIG_NET_VENDOR_AMD is not set 52 51 # CONFIG_NET_VENDOR_ARC is not set 53 52 # CONFIG_NET_VENDOR_ATHEROS is not set

-2

arch/powerpc/configs/g5_defconfig

reviewed

··· 92 92 CONFIG_BONDING=m 93 93 CONFIG_DUMMY=m 94 94 CONFIG_TUN=m 95 95 - CONFIG_ACENIC=m 96 96 - CONFIG_ACENIC_OMIT_TIGON_I=y 97 95 CONFIG_TIGON3=y 98 96 CONFIG_E1000=y 99 97 CONFIG_SUNGEM=y

-2

arch/powerpc/configs/powernv_defconfig

reviewed

··· 158 158 CONFIG_TUN=m 159 159 CONFIG_VETH=m 160 160 CONFIG_VORTEX=m 161 161 - CONFIG_ACENIC=m 162 162 - CONFIG_ACENIC_OMIT_TIGON_I=y 163 161 CONFIG_PCNET32=m 164 162 CONFIG_TIGON3=y 165 163 CONFIG_BNX2X=m

-2

arch/powerpc/configs/ppc64_defconfig

reviewed

··· 204 204 CONFIG_TUN=m 205 205 CONFIG_VIRTIO_NET=m 206 206 CONFIG_VORTEX=m 207 207 - CONFIG_ACENIC=m 208 208 - CONFIG_ACENIC_OMIT_TIGON_I=y 209 207 CONFIG_PCNET32=m 210 208 CONFIG_TIGON3=y 211 209 CONFIG_BNX2X=m

-2

arch/powerpc/configs/ppc64e_defconfig

reviewed

··· 96 96 CONFIG_NETCONSOLE=y 97 97 CONFIG_TUN=m 98 98 CONFIG_VORTEX=y 99 99 - CONFIG_ACENIC=y 100 100 - CONFIG_ACENIC_OMIT_TIGON_I=y 101 99 CONFIG_PCNET32=y 102 100 CONFIG_TIGON3=y 103 101 CONFIG_E100=y

-1

arch/powerpc/configs/ppc6xx_defconfig

reviewed

··· 410 410 CONFIG_VORTEX=m 411 411 CONFIG_TYPHOON=m 412 412 CONFIG_ADAPTEC_STARFIRE=m 413 413 - CONFIG_ACENIC=m 414 413 CONFIG_AMD8111_ETH=m 415 414 CONFIG_PCNET32=m 416 415 CONFIG_PCMCIA_NMCLAN=m

-2

arch/powerpc/configs/skiroot_defconfig

reviewed

··· 125 125 # CONFIG_NET_VENDOR_ADAPTEC is not set 126 126 # CONFIG_NET_VENDOR_AGERE is not set 127 127 # CONFIG_NET_VENDOR_ALACRITECH is not set 128 128 - CONFIG_ACENIC=m 129 129 - CONFIG_ACENIC_OMIT_TIGON_I=y 130 128 # CONFIG_NET_VENDOR_AMAZON is not set 131 129 # CONFIG_NET_VENDOR_AMD is not set 132 130 # CONFIG_NET_VENDOR_AQUANTIA is not set

-1

arch/s390/configs/debug_defconfig

reviewed

··· 524 524 # CONFIG_NET_VENDOR_ADAPTEC is not set 525 525 # CONFIG_NET_VENDOR_AGERE is not set 526 526 # CONFIG_NET_VENDOR_ALACRITECH is not set 527 527 - # CONFIG_NET_VENDOR_ALTEON is not set 528 527 # CONFIG_NET_VENDOR_AMAZON is not set 529 528 # CONFIG_NET_VENDOR_AMD is not set 530 529 # CONFIG_NET_VENDOR_AQUANTIA is not set

-1

arch/s390/configs/defconfig

reviewed

··· 514 514 # CONFIG_NET_VENDOR_ADAPTEC is not set 515 515 # CONFIG_NET_VENDOR_AGERE is not set 516 516 # CONFIG_NET_VENDOR_ALACRITECH is not set 517 517 - # CONFIG_NET_VENDOR_ALTEON is not set 518 517 # CONFIG_NET_VENDOR_AMAZON is not set 519 518 # CONFIG_NET_VENDOR_AMD is not set 520 519 # CONFIG_NET_VENDOR_AQUANTIA is not set

-1

drivers/net/ethernet/Kconfig

reviewed

··· 23 23 source "drivers/net/ethernet/airoha/Kconfig" 24 24 source "drivers/net/ethernet/alacritech/Kconfig" 25 25 source "drivers/net/ethernet/allwinner/Kconfig" 26 26 - source "drivers/net/ethernet/alteon/Kconfig" 27 26 source "drivers/net/ethernet/altera/Kconfig" 28 27 source "drivers/net/ethernet/amazon/Kconfig" 29 28 source "drivers/net/ethernet/amd/Kconfig"

-1

drivers/net/ethernet/Makefile

reviewed

··· 13 13 obj-$(CONFIG_NET_VENDOR_AIROHA) += airoha/ 14 14 obj-$(CONFIG_NET_VENDOR_ALACRITECH) += alacritech/ 15 15 obj-$(CONFIG_NET_VENDOR_ALLWINNER) += allwinner/ 16 16 - obj-$(CONFIG_NET_VENDOR_ALTEON) += alteon/ 17 16 obj-$(CONFIG_ALTERA_TSE) += altera/ 18 17 obj-$(CONFIG_NET_VENDOR_AMAZON) += amazon/ 19 18 obj-$(CONFIG_NET_VENDOR_AMD) += amd/

-47

drivers/net/ethernet/alteon/Kconfig

reviewed

··· 1 1 - # SPDX-License-Identifier: GPL-2.0-only 2 2 - # 3 3 - # Alteon network device configuration 4 4 - # 5 5 - 6 6 - config NET_VENDOR_ALTEON 7 7 - bool "Alteon devices" 8 8 - default y 9 9 - depends on PCI 10 10 - help 11 11 - If you have a network (Ethernet) card belonging to this class, say Y. 12 12 - 13 13 - Note that the answer to this question doesn't directly affect the 14 14 - kernel: saying N will just cause the configurator to skip all 15 15 - the questions about Alteon cards. If you say Y, you will be asked for 16 16 - your specific card in the following questions. 17 17 - 18 18 - if NET_VENDOR_ALTEON 19 19 - 20 20 - config ACENIC 21 21 - tristate "Alteon AceNIC/3Com 3C985/NetGear GA620 Gigabit support" 22 22 - depends on PCI 23 23 - help 24 24 - Say Y here if you have an Alteon AceNIC, 3Com 3C985(B), NetGear 25 25 - GA620, SGI Gigabit or Farallon PN9000-SX PCI Gigabit Ethernet 26 26 - adapter. The driver allows for using the Jumbo Frame option (9000 27 27 - bytes/frame) however it requires that your switches can handle this 28 28 - as well. To enable Jumbo Frames, add `mtu 9000' to your ifconfig 29 29 - line. 30 30 - 31 31 - To compile this driver as a module, choose M here: the 32 32 - module will be called acenic. 33 33 - 34 34 - config ACENIC_OMIT_TIGON_I 35 35 - bool "Omit support for old Tigon I based AceNICs" 36 36 - depends on ACENIC 37 37 - help 38 38 - Say Y here if you only have Tigon II based AceNICs and want to leave 39 39 - out support for the older Tigon I based cards which are no longer 40 40 - being sold (ie. the original Alteon AceNIC and 3Com 3C985 (non B 41 41 - version)). This will reduce the size of the driver object by 42 42 - app. 100KB. If you are not sure whether your card is a Tigon I or a 43 43 - Tigon II, say N here. 44 44 - 45 45 - The safe and default value for this is N. 46 46 - 47 47 - endif # NET_VENDOR_ALTEON

-6

drivers/net/ethernet/alteon/Makefile

reviewed

··· 1 1 - # SPDX-License-Identifier: GPL-2.0-only 2 2 - # 3 3 - # Makefile for the Alteon network device drivers. 4 4 - # 5 5 - 6 6 - obj-$(CONFIG_ACENIC) += acenic.o

-3178

drivers/net/ethernet/alteon/acenic.c

reviewed

··· 1 1 - // SPDX-License-Identifier: GPL-2.0-or-later 2 2 - /* 3 3 - * acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card 4 4 - * and other Tigon based cards. 5 5 - * 6 6 - * Copyright 1998-2002 by Jes Sorensen, <jes@trained-monkey.org>. 7 7 - * 8 8 - * Thanks to Alteon and 3Com for providing hardware and documentation 9 9 - * enabling me to write this driver. 10 10 - * 11 11 - * A mailing list for discussing the use of this driver has been 12 12 - * setup, please subscribe to the lists if you have any questions 13 13 - * about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to 14 14 - * see how to subscribe. 15 15 - * 16 16 - * Additional credits: 17 17 - * Pete Wyckoff <wyckoff@ca.sandia.gov>: Initial Linux/Alpha and trace 18 18 - * dump support. The trace dump support has not been 19 19 - * integrated yet however. 20 20 - * Troy Benjegerdes: Big Endian (PPC) patches. 21 21 - * Nate Stahl: Better out of memory handling and stats support. 22 22 - * Aman Singla: Nasty race between interrupt handler and tx code dealing 23 23 - * with 'testing the tx_ret_csm and setting tx_full' 24 24 - * David S. Miller <davem@redhat.com>: conversion to new PCI dma mapping 25 25 - * infrastructure and Sparc support 26 26 - * Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the 27 27 - * driver under Linux/Sparc64 28 28 - * Matt Domsch <Matt_Domsch@dell.com>: Detect Alteon 1000baseT cards 29 29 - * ETHTOOL_GDRVINFO support 30 30 - * Chip Salzenberg <chip@valinux.com>: Fix race condition between tx 31 31 - * handler and close() cleanup. 32 32 - * Ken Aaker <kdaaker@rchland.vnet.ibm.com>: Correct check for whether 33 33 - * memory mapped IO is enabled to 34 34 - * make the driver work on RS/6000. 35 35 - * Takayoshi Kouchi <kouchi@hpc.bs1.fc.nec.co.jp>: Identifying problem 36 36 - * where the driver would disable 37 37 - * bus master mode if it had to disable 38 38 - * write and invalidate. 39 39 - * Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little 40 40 - * endian systems. 41 41 - * Val Henson <vhenson@esscom.com>: Reset Jumbo skb producer and 42 42 - * rx producer index when 43 43 - * flushing the Jumbo ring. 44 44 - * Hans Grobler <grobh@sun.ac.za>: Memory leak fixes in the 45 45 - * driver init path. 46 46 - * Grant Grundler <grundler@cup.hp.com>: PCI write posting fixes. 47 47 - */ 48 48 - 49 49 - #include <linux/module.h> 50 50 - #include <linux/moduleparam.h> 51 51 - #include <linux/types.h> 52 52 - #include <linux/errno.h> 53 53 - #include <linux/ioport.h> 54 54 - #include <linux/pci.h> 55 55 - #include <linux/dma-mapping.h> 56 56 - #include <linux/kernel.h> 57 57 - #include <linux/netdevice.h> 58 58 - #include <linux/etherdevice.h> 59 59 - #include <linux/skbuff.h> 60 60 - #include <linux/delay.h> 61 61 - #include <linux/mm.h> 62 62 - #include <linux/highmem.h> 63 63 - #include <linux/sockios.h> 64 64 - #include <linux/firmware.h> 65 65 - #include <linux/slab.h> 66 66 - #include <linux/prefetch.h> 67 67 - #include <linux/if_vlan.h> 68 68 - 69 69 - #ifdef SIOCETHTOOL 70 70 - #include <linux/ethtool.h> 71 71 - #endif 72 72 - 73 73 - #include <net/sock.h> 74 74 - #include <net/ip.h> 75 75 - 76 76 - #include <asm/io.h> 77 77 - #include <asm/irq.h> 78 78 - #include <asm/byteorder.h> 79 79 - #include <linux/uaccess.h> 80 80 - 81 81 - 82 82 - #define DRV_NAME "acenic" 83 83 - 84 84 - #undef INDEX_DEBUG 85 85 - 86 86 - #ifdef CONFIG_ACENIC_OMIT_TIGON_I 87 87 - #define ACE_IS_TIGON_I(ap) 0 88 88 - #define ACE_TX_RING_ENTRIES(ap) MAX_TX_RING_ENTRIES 89 89 - #else 90 90 - #define ACE_IS_TIGON_I(ap) (ap->version == 1) 91 91 - #define ACE_TX_RING_ENTRIES(ap) ap->tx_ring_entries 92 92 - #endif 93 93 - 94 94 - #ifndef PCI_VENDOR_ID_ALTEON 95 95 - #define PCI_VENDOR_ID_ALTEON 0x12ae 96 96 - #endif 97 97 - #ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 98 98 - #define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001 99 99 - #define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002 100 100 - #endif 101 101 - #ifndef PCI_DEVICE_ID_3COM_3C985 102 102 - #define PCI_DEVICE_ID_3COM_3C985 0x0001 103 103 - #endif 104 104 - #ifndef PCI_VENDOR_ID_NETGEAR 105 105 - #define PCI_VENDOR_ID_NETGEAR 0x1385 106 106 - #define PCI_DEVICE_ID_NETGEAR_GA620 0x620a 107 107 - #endif 108 108 - #ifndef PCI_DEVICE_ID_NETGEAR_GA620T 109 109 - #define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a 110 110 - #endif 111 111 - 112 112 - 113 113 - /* 114 114 - * Farallon used the DEC vendor ID by mistake and they seem not 115 115 - * to care - stinky! 116 116 - */ 117 117 - #ifndef PCI_DEVICE_ID_FARALLON_PN9000SX 118 118 - #define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a 119 119 - #endif 120 120 - #ifndef PCI_DEVICE_ID_FARALLON_PN9100T 121 121 - #define PCI_DEVICE_ID_FARALLON_PN9100T 0xfa 122 122 - #endif 123 123 - #ifndef PCI_VENDOR_ID_SGI 124 124 - #define PCI_VENDOR_ID_SGI 0x10a9 125 125 - #endif 126 126 - #ifndef PCI_DEVICE_ID_SGI_ACENIC 127 127 - #define PCI_DEVICE_ID_SGI_ACENIC 0x0009 128 128 - #endif 129 129 - 130 130 - static const struct pci_device_id acenic_pci_tbl[] = { 131 131 - { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE, 132 132 - PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, }, 133 133 - { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER, 134 134 - PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, }, 135 135 - { PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C985, 136 136 - PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, }, 137 137 - { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620, 138 138 - PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, }, 139 139 - { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620T, 140 140 - PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, }, 141 141 - /* 142 142 - * Farallon used the DEC vendor ID on their cards incorrectly, 143 143 - * then later Alteon's ID. 144 144 - */ 145 145 - { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_FARALLON_PN9000SX, 146 146 - PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, }, 147 147 - { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_FARALLON_PN9100T, 148 148 - PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, }, 149 149 - { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_ACENIC, 150 150 - PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, }, 151 151 - { } 152 152 - }; 153 153 - MODULE_DEVICE_TABLE(pci, acenic_pci_tbl); 154 154 - 155 155 - #define ace_sync_irq(irq) synchronize_irq(irq) 156 156 - 157 157 - #ifndef offset_in_page 158 158 - #define offset_in_page(ptr) ((unsigned long)(ptr) & ~PAGE_MASK) 159 159 - #endif 160 160 - 161 161 - #define ACE_MAX_MOD_PARMS 8 162 162 - #define BOARD_IDX_STATIC 0 163 163 - #define BOARD_IDX_OVERFLOW -1 164 164 - 165 165 - #include "acenic.h" 166 166 - 167 167 - /* 168 168 - * These must be defined before the firmware is included. 169 169 - */ 170 170 - #define MAX_TEXT_LEN 96*1024 171 171 - #define MAX_RODATA_LEN 8*1024 172 172 - #define MAX_DATA_LEN 2*1024 173 173 - 174 174 - #ifndef tigon2FwReleaseLocal 175 175 - #define tigon2FwReleaseLocal 0 176 176 - #endif 177 177 - 178 178 - /* 179 179 - * This driver currently supports Tigon I and Tigon II based cards 180 180 - * including the Alteon AceNIC, the 3Com 3C985[B] and NetGear 181 181 - * GA620. The driver should also work on the SGI, DEC and Farallon 182 182 - * versions of the card, however I have not been able to test that 183 183 - * myself. 184 184 - * 185 185 - * This card is really neat, it supports receive hardware checksumming 186 186 - * and jumbo frames (up to 9000 bytes) and does a lot of work in the 187 187 - * firmware. Also the programming interface is quite neat, except for 188 188 - * the parts dealing with the i2c eeprom on the card ;-) 189 189 - * 190 190 - * Using jumbo frames: 191 191 - * 192 192 - * To enable jumbo frames, simply specify an mtu between 1500 and 9000 193 193 - * bytes to ifconfig. Jumbo frames can be enabled or disabled at any time 194 194 - * by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet 195 195 - * interface number and <MTU> being the MTU value. 196 196 - * 197 197 - * Module parameters: 198 198 - * 199 199 - * When compiled as a loadable module, the driver allows for a number 200 200 - * of module parameters to be specified. The driver supports the 201 201 - * following module parameters: 202 202 - * 203 203 - * trace=<val> - Firmware trace level. This requires special traced 204 204 - * firmware to replace the firmware supplied with 205 205 - * the driver - for debugging purposes only. 206 206 - * 207 207 - * link=<val> - Link state. Normally you want to use the default link 208 208 - * parameters set by the driver. This can be used to 209 209 - * override these in case your switch doesn't negotiate 210 210 - * the link properly. Valid values are: 211 211 - * 0x0001 - Force half duplex link. 212 212 - * 0x0002 - Do not negotiate line speed with the other end. 213 213 - * 0x0010 - 10Mbit/sec link. 214 214 - * 0x0020 - 100Mbit/sec link. 215 215 - * 0x0040 - 1000Mbit/sec link. 216 216 - * 0x0100 - Do not negotiate flow control. 217 217 - * 0x0200 - Enable RX flow control Y 218 218 - * 0x0400 - Enable TX flow control Y (Tigon II NICs only). 219 219 - * Default value is 0x0270, ie. enable link+flow 220 220 - * control negotiation. Negotiating the highest 221 221 - * possible link speed with RX flow control enabled. 222 222 - * 223 223 - * When disabling link speed negotiation, only one link 224 224 - * speed is allowed to be specified! 225 225 - * 226 226 - * tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed 227 227 - * to wait for more packets to arive before 228 228 - * interrupting the host, from the time the first 229 229 - * packet arrives. 230 230 - * 231 231 - * rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed 232 232 - * to wait for more packets to arive in the transmit ring, 233 233 - * before interrupting the host, after transmitting the 234 234 - * first packet in the ring. 235 235 - * 236 236 - * max_tx_desc=<val> - maximum number of transmit descriptors 237 237 - * (packets) transmitted before interrupting the host. 238 238 - * 239 239 - * max_rx_desc=<val> - maximum number of receive descriptors 240 240 - * (packets) received before interrupting the host. 241 241 - * 242 242 - * tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th 243 243 - * increments of the NIC's on board memory to be used for 244 244 - * transmit and receive buffers. For the 1MB NIC app. 800KB 245 245 - * is available, on the 1/2MB NIC app. 300KB is available. 246 246 - * 68KB will always be available as a minimum for both 247 247 - * directions. The default value is a 50/50 split. 248 248 - * dis_pci_mem_inval=<val> - disable PCI memory write and invalidate 249 249 - * operations, default (1) is to always disable this as 250 250 - * that is what Alteon does on NT. I have not been able 251 251 - * to measure any real performance differences with 252 252 - * this on my systems. Set <val>=0 if you want to 253 253 - * enable these operations. 254 254 - * 255 255 - * If you use more than one NIC, specify the parameters for the 256 256 - * individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to 257 257 - * run tracing on NIC #2 but not on NIC #1 and #3. 258 258 - * 259 259 - * TODO: 260 260 - * 261 261 - * - Proper multicast support. 262 262 - * - NIC dump support. 263 263 - * - More tuning parameters. 264 264 - * 265 265 - * The mini ring is not used under Linux and I am not sure it makes sense 266 266 - * to actually use it. 267 267 - * 268 268 - * New interrupt handler strategy: 269 269 - * 270 270 - * The old interrupt handler worked using the traditional method of 271 271 - * replacing an skbuff with a new one when a packet arrives. However 272 272 - * the rx rings do not need to contain a static number of buffer 273 273 - * descriptors, thus it makes sense to move the memory allocation out 274 274 - * of the main interrupt handler and do it in a bottom half handler 275 275 - * and only allocate new buffers when the number of buffers in the 276 276 - * ring is below a certain threshold. In order to avoid starving the 277 277 - * NIC under heavy load it is however necessary to force allocation 278 278 - * when hitting a minimum threshold. The strategy for alloction is as 279 279 - * follows: 280 280 - * 281 281 - * RX_LOW_BUF_THRES - allocate buffers in the bottom half 282 282 - * RX_PANIC_LOW_THRES - we are very low on buffers, allocate 283 283 - * the buffers in the interrupt handler 284 284 - * RX_RING_THRES - maximum number of buffers in the rx ring 285 285 - * RX_MINI_THRES - maximum number of buffers in the mini ring 286 286 - * RX_JUMBO_THRES - maximum number of buffers in the jumbo ring 287 287 - * 288 288 - * One advantagous side effect of this allocation approach is that the 289 289 - * entire rx processing can be done without holding any spin lock 290 290 - * since the rx rings and registers are totally independent of the tx 291 291 - * ring and its registers. This of course includes the kmalloc's of 292 292 - * new skb's. Thus start_xmit can run in parallel with rx processing 293 293 - * and the memory allocation on SMP systems. 294 294 - * 295 295 - * Note that running the skb reallocation in a bottom half opens up 296 296 - * another can of races which needs to be handled properly. In 297 297 - * particular it can happen that the interrupt handler tries to run 298 298 - * the reallocation while the bottom half is either running on another 299 299 - * CPU or was interrupted on the same CPU. To get around this the 300 300 - * driver uses bitops to prevent the reallocation routines from being 301 301 - * reentered. 302 302 - * 303 303 - * TX handling can also be done without holding any spin lock, wheee 304 304 - * this is fun! since tx_ret_csm is only written to by the interrupt 305 305 - * handler. The case to be aware of is when shutting down the device 306 306 - * and cleaning up where it is necessary to make sure that 307 307 - * start_xmit() is not running while this is happening. Well DaveM 308 308 - * informs me that this case is already protected against ... bye bye 309 309 - * Mr. Spin Lock, it was nice to know you. 310 310 - * 311 311 - * TX interrupts are now partly disabled so the NIC will only generate 312 312 - * TX interrupts for the number of coal ticks, not for the number of 313 313 - * TX packets in the queue. This should reduce the number of TX only, 314 314 - * ie. when no RX processing is done, interrupts seen. 315 315 - */ 316 316 - 317 317 - /* 318 318 - * Threshold values for RX buffer allocation - the low water marks for 319 319 - * when to start refilling the rings are set to 75% of the ring 320 320 - * sizes. It seems to make sense to refill the rings entirely from the 321 321 - * intrrupt handler once it gets below the panic threshold, that way 322 322 - * we don't risk that the refilling is moved to another CPU when the 323 323 - * one running the interrupt handler just got the slab code hot in its 324 324 - * cache. 325 325 - */ 326 326 - #define RX_RING_SIZE 72 327 327 - #define RX_MINI_SIZE 64 328 328 - #define RX_JUMBO_SIZE 48 329 329 - 330 330 - #define RX_PANIC_STD_THRES 16 331 331 - #define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2 332 332 - #define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4 333 333 - #define RX_PANIC_MINI_THRES 12 334 334 - #define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2 335 335 - #define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4 336 336 - #define RX_PANIC_JUMBO_THRES 6 337 337 - #define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2 338 338 - #define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4 339 339 - 340 340 - 341 341 - /* 342 342 - * Size of the mini ring entries, basically these just should be big 343 343 - * enough to take TCP ACKs 344 344 - */ 345 345 - #define ACE_MINI_SIZE 100 346 346 - 347 347 - #define ACE_MINI_BUFSIZE ACE_MINI_SIZE 348 348 - #define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 4) 349 349 - #define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 4) 350 350 - 351 351 - /* 352 352 - * There seems to be a magic difference in the effect between 995 and 996 353 353 - * but little difference between 900 and 995 ... no idea why. 354 354 - * 355 355 - * There is now a default set of tuning parameters which is set, depending 356 356 - * on whether or not the user enables Jumbo frames. It's assumed that if 357 357 - * Jumbo frames are enabled, the user wants optimal tuning for that case. 358 358 - */ 359 359 - #define DEF_TX_COAL 400 /* 996 */ 360 360 - #define DEF_TX_MAX_DESC 60 /* was 40 */ 361 361 - #define DEF_RX_COAL 120 /* 1000 */ 362 362 - #define DEF_RX_MAX_DESC 25 363 363 - #define DEF_TX_RATIO 21 /* 24 */ 364 364 - 365 365 - #define DEF_JUMBO_TX_COAL 20 366 366 - #define DEF_JUMBO_TX_MAX_DESC 60 367 367 - #define DEF_JUMBO_RX_COAL 30 368 368 - #define DEF_JUMBO_RX_MAX_DESC 6 369 369 - #define DEF_JUMBO_TX_RATIO 21 370 370 - 371 371 - #if tigon2FwReleaseLocal < 20001118 372 372 - /* 373 373 - * Standard firmware and early modifications duplicate 374 374 - * IRQ load without this flag (coal timer is never reset). 375 375 - * Note that with this flag tx_coal should be less than 376 376 - * time to xmit full tx ring. 377 377 - * 400usec is not so bad for tx ring size of 128. 378 378 - */ 379 379 - #define TX_COAL_INTS_ONLY 1 /* worth it */ 380 380 - #else 381 381 - /* 382 382 - * With modified firmware, this is not necessary, but still useful. 383 383 - */ 384 384 - #define TX_COAL_INTS_ONLY 1 385 385 - #endif 386 386 - 387 387 - #define DEF_TRACE 0 388 388 - #define DEF_STAT (2 * TICKS_PER_SEC) 389 389 - 390 390 - 391 391 - static int link_state[ACE_MAX_MOD_PARMS]; 392 392 - static int trace[ACE_MAX_MOD_PARMS]; 393 393 - static int tx_coal_tick[ACE_MAX_MOD_PARMS]; 394 394 - static int rx_coal_tick[ACE_MAX_MOD_PARMS]; 395 395 - static int max_tx_desc[ACE_MAX_MOD_PARMS]; 396 396 - static int max_rx_desc[ACE_MAX_MOD_PARMS]; 397 397 - static int tx_ratio[ACE_MAX_MOD_PARMS]; 398 398 - static int dis_pci_mem_inval[ACE_MAX_MOD_PARMS] = {1, 1, 1, 1, 1, 1, 1, 1}; 399 399 - 400 400 - MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>"); 401 401 - MODULE_LICENSE("GPL"); 402 402 - MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver"); 403 403 - #ifndef CONFIG_ACENIC_OMIT_TIGON_I 404 404 - MODULE_FIRMWARE("acenic/tg1.bin"); 405 405 - #endif 406 406 - MODULE_FIRMWARE("acenic/tg2.bin"); 407 407 - 408 408 - module_param_array_named(link, link_state, int, NULL, 0); 409 409 - module_param_array(trace, int, NULL, 0); 410 410 - module_param_array(tx_coal_tick, int, NULL, 0); 411 411 - module_param_array(max_tx_desc, int, NULL, 0); 412 412 - module_param_array(rx_coal_tick, int, NULL, 0); 413 413 - module_param_array(max_rx_desc, int, NULL, 0); 414 414 - module_param_array(tx_ratio, int, NULL, 0); 415 415 - MODULE_PARM_DESC(link, "AceNIC/3C985/NetGear link state"); 416 416 - MODULE_PARM_DESC(trace, "AceNIC/3C985/NetGear firmware trace level"); 417 417 - MODULE_PARM_DESC(tx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first tx descriptor arrives"); 418 418 - MODULE_PARM_DESC(max_tx_desc, "AceNIC/3C985/GA620 max number of transmit descriptors to wait"); 419 419 - MODULE_PARM_DESC(rx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first rx descriptor arrives"); 420 420 - MODULE_PARM_DESC(max_rx_desc, "AceNIC/3C985/GA620 max number of receive descriptors to wait"); 421 421 - MODULE_PARM_DESC(tx_ratio, "AceNIC/3C985/GA620 ratio of NIC memory used for TX/RX descriptors (range 0-63)"); 422 422 - 423 423 - 424 424 - static const char version[] = 425 425 - "acenic.c: v0.92 08/05/2002 Jes Sorensen, linux-acenic@SunSITE.dk\n" 426 426 - " http://home.cern.ch/~jes/gige/acenic.html\n"; 427 427 - 428 428 - static int ace_get_link_ksettings(struct net_device *, 429 429 - struct ethtool_link_ksettings *); 430 430 - static int ace_set_link_ksettings(struct net_device *, 431 431 - const struct ethtool_link_ksettings *); 432 432 - static void ace_get_drvinfo(struct net_device *, struct ethtool_drvinfo *); 433 433 - 434 434 - static const struct ethtool_ops ace_ethtool_ops = { 435 435 - .get_drvinfo = ace_get_drvinfo, 436 436 - .get_link_ksettings = ace_get_link_ksettings, 437 437 - .set_link_ksettings = ace_set_link_ksettings, 438 438 - }; 439 439 - 440 440 - static void ace_watchdog(struct net_device *dev, unsigned int txqueue); 441 441 - 442 442 - static const struct net_device_ops ace_netdev_ops = { 443 443 - .ndo_open = ace_open, 444 444 - .ndo_stop = ace_close, 445 445 - .ndo_tx_timeout = ace_watchdog, 446 446 - .ndo_get_stats = ace_get_stats, 447 447 - .ndo_start_xmit = ace_start_xmit, 448 448 - .ndo_set_rx_mode = ace_set_multicast_list, 449 449 - .ndo_validate_addr = eth_validate_addr, 450 450 - .ndo_set_mac_address = ace_set_mac_addr, 451 451 - .ndo_change_mtu = ace_change_mtu, 452 452 - }; 453 453 - 454 454 - static int acenic_probe_one(struct pci_dev *pdev, 455 455 - const struct pci_device_id *id) 456 456 - { 457 457 - struct net_device *dev; 458 458 - struct ace_private *ap; 459 459 - static int boards_found; 460 460 - 461 461 - dev = alloc_etherdev(sizeof(struct ace_private)); 462 462 - if (dev == NULL) 463 463 - return -ENOMEM; 464 464 - 465 465 - SET_NETDEV_DEV(dev, &pdev->dev); 466 466 - 467 467 - ap = netdev_priv(dev); 468 468 - ap->ndev = dev; 469 469 - ap->pdev = pdev; 470 470 - ap->name = pci_name(pdev); 471 471 - 472 472 - dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM; 473 473 - dev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX; 474 474 - 475 475 - dev->watchdog_timeo = 5*HZ; 476 476 - dev->min_mtu = 0; 477 477 - dev->max_mtu = ACE_JUMBO_MTU; 478 478 - 479 479 - dev->netdev_ops = &ace_netdev_ops; 480 480 - dev->ethtool_ops = &ace_ethtool_ops; 481 481 - 482 482 - /* we only display this string ONCE */ 483 483 - if (!boards_found) 484 484 - printk(version); 485 485 - 486 486 - if (pci_enable_device(pdev)) 487 487 - goto fail_free_netdev; 488 488 - 489 489 - /* 490 490 - * Enable master mode before we start playing with the 491 491 - * pci_command word since pci_set_master() will modify 492 492 - * it. 493 493 - */ 494 494 - pci_set_master(pdev); 495 495 - 496 496 - pci_read_config_word(pdev, PCI_COMMAND, &ap->pci_command); 497 497 - 498 498 - /* OpenFirmware on Mac's does not set this - DOH.. */ 499 499 - if (!(ap->pci_command & PCI_COMMAND_MEMORY)) { 500 500 - printk(KERN_INFO "%s: Enabling PCI Memory Mapped " 501 501 - "access - was not enabled by BIOS/Firmware\n", 502 502 - ap->name); 503 503 - ap->pci_command = ap->pci_command | PCI_COMMAND_MEMORY; 504 504 - pci_write_config_word(ap->pdev, PCI_COMMAND, 505 505 - ap->pci_command); 506 506 - wmb(); 507 507 - } 508 508 - 509 509 - pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &ap->pci_latency); 510 510 - if (ap->pci_latency <= 0x40) { 511 511 - ap->pci_latency = 0x40; 512 512 - pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ap->pci_latency); 513 513 - } 514 514 - 515 515 - /* 516 516 - * Remap the regs into kernel space - this is abuse of 517 517 - * dev->base_addr since it was means for I/O port 518 518 - * addresses but who gives a damn. 519 519 - */ 520 520 - dev->base_addr = pci_resource_start(pdev, 0); 521 521 - ap->regs = ioremap(dev->base_addr, 0x4000); 522 522 - if (!ap->regs) { 523 523 - printk(KERN_ERR "%s: Unable to map I/O register, " 524 524 - "AceNIC %i will be disabled.\n", 525 525 - ap->name, boards_found); 526 526 - goto fail_free_netdev; 527 527 - } 528 528 - 529 529 - switch(pdev->vendor) { 530 530 - case PCI_VENDOR_ID_ALTEON: 531 531 - if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9100T) { 532 532 - printk(KERN_INFO "%s: Farallon PN9100-T ", 533 533 - ap->name); 534 534 - } else { 535 535 - printk(KERN_INFO "%s: Alteon AceNIC ", 536 536 - ap->name); 537 537 - } 538 538 - break; 539 539 - case PCI_VENDOR_ID_3COM: 540 540 - printk(KERN_INFO "%s: 3Com 3C985 ", ap->name); 541 541 - break; 542 542 - case PCI_VENDOR_ID_NETGEAR: 543 543 - printk(KERN_INFO "%s: NetGear GA620 ", ap->name); 544 544 - break; 545 545 - case PCI_VENDOR_ID_DEC: 546 546 - if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX) { 547 547 - printk(KERN_INFO "%s: Farallon PN9000-SX ", 548 548 - ap->name); 549 549 - break; 550 550 - } 551 551 - fallthrough; 552 552 - case PCI_VENDOR_ID_SGI: 553 553 - printk(KERN_INFO "%s: SGI AceNIC ", ap->name); 554 554 - break; 555 555 - default: 556 556 - printk(KERN_INFO "%s: Unknown AceNIC ", ap->name); 557 557 - break; 558 558 - } 559 559 - 560 560 - printk("Gigabit Ethernet at 0x%08lx, ", dev->base_addr); 561 561 - printk("irq %d\n", pdev->irq); 562 562 - 563 563 - #ifdef CONFIG_ACENIC_OMIT_TIGON_I 564 564 - if ((readl(&ap->regs->HostCtrl) >> 28) == 4) { 565 565 - printk(KERN_ERR "%s: Driver compiled without Tigon I" 566 566 - " support - NIC disabled\n", dev->name); 567 567 - goto fail_uninit; 568 568 - } 569 569 - #endif 570 570 - 571 571 - if (ace_allocate_descriptors(dev)) 572 572 - goto fail_free_netdev; 573 573 - 574 574 - #ifdef MODULE 575 575 - if (boards_found >= ACE_MAX_MOD_PARMS) 576 576 - ap->board_idx = BOARD_IDX_OVERFLOW; 577 577 - else 578 578 - ap->board_idx = boards_found; 579 579 - #else 580 580 - ap->board_idx = BOARD_IDX_STATIC; 581 581 - #endif 582 582 - 583 583 - if (ace_init(dev)) 584 584 - goto fail_free_netdev; 585 585 - 586 586 - if (register_netdev(dev)) { 587 587 - printk(KERN_ERR "acenic: device registration failed\n"); 588 588 - goto fail_uninit; 589 589 - } 590 590 - ap->name = dev->name; 591 591 - 592 592 - dev->features |= NETIF_F_HIGHDMA; 593 593 - 594 594 - pci_set_drvdata(pdev, dev); 595 595 - 596 596 - boards_found++; 597 597 - return 0; 598 598 - 599 599 - fail_uninit: 600 600 - ace_init_cleanup(dev); 601 601 - fail_free_netdev: 602 602 - free_netdev(dev); 603 603 - return -ENODEV; 604 604 - } 605 605 - 606 606 - static void acenic_remove_one(struct pci_dev *pdev) 607 607 - { 608 608 - struct net_device *dev = pci_get_drvdata(pdev); 609 609 - struct ace_private *ap = netdev_priv(dev); 610 610 - struct ace_regs __iomem *regs = ap->regs; 611 611 - short i; 612 612 - 613 613 - unregister_netdev(dev); 614 614 - 615 615 - writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl); 616 616 - if (ap->version >= 2) 617 617 - writel(readl(&regs->CpuBCtrl) | CPU_HALT, &regs->CpuBCtrl); 618 618 - 619 619 - /* 620 620 - * This clears any pending interrupts 621 621 - */ 622 622 - writel(1, &regs->Mb0Lo); 623 623 - readl(&regs->CpuCtrl); /* flush */ 624 624 - 625 625 - /* 626 626 - * Make sure no other CPUs are processing interrupts 627 627 - * on the card before the buffers are being released. 628 628 - * Otherwise one might experience some `interesting' 629 629 - * effects. 630 630 - * 631 631 - * Then release the RX buffers - jumbo buffers were 632 632 - * already released in ace_close(). 633 633 - */ 634 634 - ace_sync_irq(dev->irq); 635 635 - 636 636 - for (i = 0; i < RX_STD_RING_ENTRIES; i++) { 637 637 - struct sk_buff *skb = ap->skb->rx_std_skbuff[i].skb; 638 638 - 639 639 - if (skb) { 640 640 - struct ring_info *ringp; 641 641 - dma_addr_t mapping; 642 642 - 643 643 - ringp = &ap->skb->rx_std_skbuff[i]; 644 644 - mapping = dma_unmap_addr(ringp, mapping); 645 645 - dma_unmap_page(&ap->pdev->dev, mapping, 646 646 - ACE_STD_BUFSIZE, DMA_FROM_DEVICE); 647 647 - 648 648 - ap->rx_std_ring[i].size = 0; 649 649 - ap->skb->rx_std_skbuff[i].skb = NULL; 650 650 - dev_kfree_skb(skb); 651 651 - } 652 652 - } 653 653 - 654 654 - if (ap->version >= 2) { 655 655 - for (i = 0; i < RX_MINI_RING_ENTRIES; i++) { 656 656 - struct sk_buff *skb = ap->skb->rx_mini_skbuff[i].skb; 657 657 - 658 658 - if (skb) { 659 659 - struct ring_info *ringp; 660 660 - dma_addr_t mapping; 661 661 - 662 662 - ringp = &ap->skb->rx_mini_skbuff[i]; 663 663 - mapping = dma_unmap_addr(ringp,mapping); 664 664 - dma_unmap_page(&ap->pdev->dev, mapping, 665 665 - ACE_MINI_BUFSIZE, 666 666 - DMA_FROM_DEVICE); 667 667 - 668 668 - ap->rx_mini_ring[i].size = 0; 669 669 - ap->skb->rx_mini_skbuff[i].skb = NULL; 670 670 - dev_kfree_skb(skb); 671 671 - } 672 672 - } 673 673 - } 674 674 - 675 675 - for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) { 676 676 - struct sk_buff *skb = ap->skb->rx_jumbo_skbuff[i].skb; 677 677 - if (skb) { 678 678 - struct ring_info *ringp; 679 679 - dma_addr_t mapping; 680 680 - 681 681 - ringp = &ap->skb->rx_jumbo_skbuff[i]; 682 682 - mapping = dma_unmap_addr(ringp, mapping); 683 683 - dma_unmap_page(&ap->pdev->dev, mapping, 684 684 - ACE_JUMBO_BUFSIZE, DMA_FROM_DEVICE); 685 685 - 686 686 - ap->rx_jumbo_ring[i].size = 0; 687 687 - ap->skb->rx_jumbo_skbuff[i].skb = NULL; 688 688 - dev_kfree_skb(skb); 689 689 - } 690 690 - } 691 691 - 692 692 - ace_init_cleanup(dev); 693 693 - free_netdev(dev); 694 694 - } 695 695 - 696 696 - static struct pci_driver acenic_pci_driver = { 697 697 - .name = "acenic", 698 698 - .id_table = acenic_pci_tbl, 699 699 - .probe = acenic_probe_one, 700 700 - .remove = acenic_remove_one, 701 701 - }; 702 702 - 703 703 - static void ace_free_descriptors(struct net_device *dev) 704 704 - { 705 705 - struct ace_private *ap = netdev_priv(dev); 706 706 - int size; 707 707 - 708 708 - if (ap->rx_std_ring != NULL) { 709 709 - size = (sizeof(struct rx_desc) * 710 710 - (RX_STD_RING_ENTRIES + 711 711 - RX_JUMBO_RING_ENTRIES + 712 712 - RX_MINI_RING_ENTRIES + 713 713 - RX_RETURN_RING_ENTRIES)); 714 714 - dma_free_coherent(&ap->pdev->dev, size, ap->rx_std_ring, 715 715 - ap->rx_ring_base_dma); 716 716 - ap->rx_std_ring = NULL; 717 717 - ap->rx_jumbo_ring = NULL; 718 718 - ap->rx_mini_ring = NULL; 719 719 - ap->rx_return_ring = NULL; 720 720 - } 721 721 - if (ap->evt_ring != NULL) { 722 722 - size = (sizeof(struct event) * EVT_RING_ENTRIES); 723 723 - dma_free_coherent(&ap->pdev->dev, size, ap->evt_ring, 724 724 - ap->evt_ring_dma); 725 725 - ap->evt_ring = NULL; 726 726 - } 727 727 - if (ap->tx_ring != NULL && !ACE_IS_TIGON_I(ap)) { 728 728 - size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES); 729 729 - dma_free_coherent(&ap->pdev->dev, size, ap->tx_ring, 730 730 - ap->tx_ring_dma); 731 731 - } 732 732 - ap->tx_ring = NULL; 733 733 - 734 734 - if (ap->evt_prd != NULL) { 735 735 - dma_free_coherent(&ap->pdev->dev, sizeof(u32), 736 736 - (void *)ap->evt_prd, ap->evt_prd_dma); 737 737 - ap->evt_prd = NULL; 738 738 - } 739 739 - if (ap->rx_ret_prd != NULL) { 740 740 - dma_free_coherent(&ap->pdev->dev, sizeof(u32), 741 741 - (void *)ap->rx_ret_prd, ap->rx_ret_prd_dma); 742 742 - ap->rx_ret_prd = NULL; 743 743 - } 744 744 - if (ap->tx_csm != NULL) { 745 745 - dma_free_coherent(&ap->pdev->dev, sizeof(u32), 746 746 - (void *)ap->tx_csm, ap->tx_csm_dma); 747 747 - ap->tx_csm = NULL; 748 748 - } 749 749 - } 750 750 - 751 751 - 752 752 - static int ace_allocate_descriptors(struct net_device *dev) 753 753 - { 754 754 - struct ace_private *ap = netdev_priv(dev); 755 755 - int size; 756 756 - 757 757 - size = (sizeof(struct rx_desc) * 758 758 - (RX_STD_RING_ENTRIES + 759 759 - RX_JUMBO_RING_ENTRIES + 760 760 - RX_MINI_RING_ENTRIES + 761 761 - RX_RETURN_RING_ENTRIES)); 762 762 - 763 763 - ap->rx_std_ring = dma_alloc_coherent(&ap->pdev->dev, size, 764 764 - &ap->rx_ring_base_dma, GFP_KERNEL); 765 765 - if (ap->rx_std_ring == NULL) 766 766 - goto fail; 767 767 - 768 768 - ap->rx_jumbo_ring = ap->rx_std_ring + RX_STD_RING_ENTRIES; 769 769 - ap->rx_mini_ring = ap->rx_jumbo_ring + RX_JUMBO_RING_ENTRIES; 770 770 - ap->rx_return_ring = ap->rx_mini_ring + RX_MINI_RING_ENTRIES; 771 771 - 772 772 - size = (sizeof(struct event) * EVT_RING_ENTRIES); 773 773 - 774 774 - ap->evt_ring = dma_alloc_coherent(&ap->pdev->dev, size, 775 775 - &ap->evt_ring_dma, GFP_KERNEL); 776 776 - 777 777 - if (ap->evt_ring == NULL) 778 778 - goto fail; 779 779 - 780 780 - /* 781 781 - * Only allocate a host TX ring for the Tigon II, the Tigon I 782 782 - * has to use PCI registers for this ;-( 783 783 - */ 784 784 - if (!ACE_IS_TIGON_I(ap)) { 785 785 - size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES); 786 786 - 787 787 - ap->tx_ring = dma_alloc_coherent(&ap->pdev->dev, size, 788 788 - &ap->tx_ring_dma, GFP_KERNEL); 789 789 - 790 790 - if (ap->tx_ring == NULL) 791 791 - goto fail; 792 792 - } 793 793 - 794 794 - ap->evt_prd = dma_alloc_coherent(&ap->pdev->dev, sizeof(u32), 795 795 - &ap->evt_prd_dma, GFP_KERNEL); 796 796 - if (ap->evt_prd == NULL) 797 797 - goto fail; 798 798 - 799 799 - ap->rx_ret_prd = dma_alloc_coherent(&ap->pdev->dev, sizeof(u32), 800 800 - &ap->rx_ret_prd_dma, GFP_KERNEL); 801 801 - if (ap->rx_ret_prd == NULL) 802 802 - goto fail; 803 803 - 804 804 - ap->tx_csm = dma_alloc_coherent(&ap->pdev->dev, sizeof(u32), 805 805 - &ap->tx_csm_dma, GFP_KERNEL); 806 806 - if (ap->tx_csm == NULL) 807 807 - goto fail; 808 808 - 809 809 - return 0; 810 810 - 811 811 - fail: 812 812 - /* Clean up. */ 813 813 - ace_init_cleanup(dev); 814 814 - return 1; 815 815 - } 816 816 - 817 817 - 818 818 - /* 819 819 - * Generic cleanup handling data allocated during init. Used when the 820 820 - * module is unloaded or if an error occurs during initialization 821 821 - */ 822 822 - static void ace_init_cleanup(struct net_device *dev) 823 823 - { 824 824 - struct ace_private *ap; 825 825 - 826 826 - ap = netdev_priv(dev); 827 827 - 828 828 - ace_free_descriptors(dev); 829 829 - 830 830 - if (ap->info) 831 831 - dma_free_coherent(&ap->pdev->dev, sizeof(struct ace_info), 832 832 - ap->info, ap->info_dma); 833 833 - kfree(ap->skb); 834 834 - kfree(ap->trace_buf); 835 835 - 836 836 - if (dev->irq) 837 837 - free_irq(dev->irq, dev); 838 838 - 839 839 - iounmap(ap->regs); 840 840 - } 841 841 - 842 842 - 843 843 - /* 844 844 - * Commands are considered to be slow. 845 845 - */ 846 846 - static inline void ace_issue_cmd(struct ace_regs __iomem *regs, struct cmd *cmd) 847 847 - { 848 848 - u32 idx; 849 849 - 850 850 - idx = readl(&regs->CmdPrd); 851 851 - 852 852 - writel(*(u32 *)(cmd), &regs->CmdRng[idx]); 853 853 - idx = (idx + 1) % CMD_RING_ENTRIES; 854 854 - 855 855 - writel(idx, &regs->CmdPrd); 856 856 - } 857 857 - 858 858 - 859 859 - static int ace_init(struct net_device *dev) 860 860 - { 861 861 - struct ace_private *ap; 862 862 - struct ace_regs __iomem *regs; 863 863 - struct ace_info *info = NULL; 864 864 - struct pci_dev *pdev; 865 865 - unsigned long myjif; 866 866 - u64 tmp_ptr; 867 867 - u32 tig_ver, mac1, mac2, tmp, pci_state; 868 868 - int board_idx, ecode = 0; 869 869 - short i; 870 870 - unsigned char cache_size; 871 871 - u8 addr[ETH_ALEN]; 872 872 - 873 873 - ap = netdev_priv(dev); 874 874 - regs = ap->regs; 875 875 - 876 876 - board_idx = ap->board_idx; 877 877 - 878 878 - /* 879 879 - * aman@sgi.com - its useful to do a NIC reset here to 880 880 - * address the `Firmware not running' problem subsequent 881 881 - * to any crashes involving the NIC 882 882 - */ 883 883 - writel(HW_RESET | (HW_RESET << 24), &regs->HostCtrl); 884 884 - readl(&regs->HostCtrl); /* PCI write posting */ 885 885 - udelay(5); 886 886 - 887 887 - /* 888 888 - * Don't access any other registers before this point! 889 889 - */ 890 890 - #ifdef __BIG_ENDIAN 891 891 - /* 892 892 - * This will most likely need BYTE_SWAP once we switch 893 893 - * to using __raw_writel() 894 894 - */ 895 895 - writel((WORD_SWAP | CLR_INT | ((WORD_SWAP | CLR_INT) << 24)), 896 896 - &regs->HostCtrl); 897 897 - #else 898 898 - writel((CLR_INT | WORD_SWAP | ((CLR_INT | WORD_SWAP) << 24)), 899 899 - &regs->HostCtrl); 900 900 - #endif 901 901 - readl(&regs->HostCtrl); /* PCI write posting */ 902 902 - 903 903 - /* 904 904 - * Stop the NIC CPU and clear pending interrupts 905 905 - */ 906 906 - writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl); 907 907 - readl(&regs->CpuCtrl); /* PCI write posting */ 908 908 - writel(0, &regs->Mb0Lo); 909 909 - 910 910 - tig_ver = readl(&regs->HostCtrl) >> 28; 911 911 - 912 912 - switch(tig_ver){ 913 913 - #ifndef CONFIG_ACENIC_OMIT_TIGON_I 914 914 - case 4: 915 915 - case 5: 916 916 - printk(KERN_INFO " Tigon I (Rev. %i), Firmware: %i.%i.%i, ", 917 917 - tig_ver, ap->firmware_major, ap->firmware_minor, 918 918 - ap->firmware_fix); 919 919 - writel(0, &regs->LocalCtrl); 920 920 - ap->version = 1; 921 921 - ap->tx_ring_entries = TIGON_I_TX_RING_ENTRIES; 922 922 - break; 923 923 - #endif 924 924 - case 6: 925 925 - printk(KERN_INFO " Tigon II (Rev. %i), Firmware: %i.%i.%i, ", 926 926 - tig_ver, ap->firmware_major, ap->firmware_minor, 927 927 - ap->firmware_fix); 928 928 - writel(readl(&regs->CpuBCtrl) | CPU_HALT, &regs->CpuBCtrl); 929 929 - readl(&regs->CpuBCtrl); /* PCI write posting */ 930 930 - /* 931 931 - * The SRAM bank size does _not_ indicate the amount 932 932 - * of memory on the card, it controls the _bank_ size! 933 933 - * Ie. a 1MB AceNIC will have two banks of 512KB. 934 934 - */ 935 935 - writel(SRAM_BANK_512K, &regs->LocalCtrl); 936 936 - writel(SYNC_SRAM_TIMING, &regs->MiscCfg); 937 937 - ap->version = 2; 938 938 - ap->tx_ring_entries = MAX_TX_RING_ENTRIES; 939 939 - break; 940 940 - default: 941 941 - printk(KERN_WARNING " Unsupported Tigon version detected " 942 942 - "(%i)\n", tig_ver); 943 943 - ecode = -ENODEV; 944 944 - goto init_error; 945 945 - } 946 946 - 947 947 - /* 948 948 - * ModeStat _must_ be set after the SRAM settings as this change 949 949 - * seems to corrupt the ModeStat and possible other registers. 950 950 - * The SRAM settings survive resets and setting it to the same 951 951 - * value a second time works as well. This is what caused the 952 952 - * `Firmware not running' problem on the Tigon II. 953 953 - */ 954 954 - #ifdef __BIG_ENDIAN 955 955 - writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | ACE_BYTE_SWAP_BD | 956 956 - ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, &regs->ModeStat); 957 957 - #else 958 958 - writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | 959 959 - ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, &regs->ModeStat); 960 960 - #endif 961 961 - readl(&regs->ModeStat); /* PCI write posting */ 962 962 - 963 963 - mac1 = 0; 964 964 - for(i = 0; i < 4; i++) { 965 965 - int t; 966 966 - 967 967 - mac1 = mac1 << 8; 968 968 - t = read_eeprom_byte(dev, 0x8c+i); 969 969 - if (t < 0) { 970 970 - ecode = -EIO; 971 971 - goto init_error; 972 972 - } else 973 973 - mac1 |= (t & 0xff); 974 974 - } 975 975 - mac2 = 0; 976 976 - for(i = 4; i < 8; i++) { 977 977 - int t; 978 978 - 979 979 - mac2 = mac2 << 8; 980 980 - t = read_eeprom_byte(dev, 0x8c+i); 981 981 - if (t < 0) { 982 982 - ecode = -EIO; 983 983 - goto init_error; 984 984 - } else 985 985 - mac2 |= (t & 0xff); 986 986 - } 987 987 - 988 988 - writel(mac1, &regs->MacAddrHi); 989 989 - writel(mac2, &regs->MacAddrLo); 990 990 - 991 991 - addr[0] = (mac1 >> 8) & 0xff; 992 992 - addr[1] = mac1 & 0xff; 993 993 - addr[2] = (mac2 >> 24) & 0xff; 994 994 - addr[3] = (mac2 >> 16) & 0xff; 995 995 - addr[4] = (mac2 >> 8) & 0xff; 996 996 - addr[5] = mac2 & 0xff; 997 997 - eth_hw_addr_set(dev, addr); 998 998 - 999 999 - printk("MAC: %pM\n", dev->dev_addr); 1000 1000 - 1001 1001 - /* 1002 1002 - * Looks like this is necessary to deal with on all architectures, 1003 1003 - * even this %$#%$# N440BX Intel based thing doesn't get it right. 1004 1004 - * Ie. having two NICs in the machine, one will have the cache 1005 1005 - * line set at boot time, the other will not. 1006 1006 - */ 1007 1007 - pdev = ap->pdev; 1008 1008 - pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_size); 1009 1009 - cache_size <<= 2; 1010 1010 - if (cache_size != SMP_CACHE_BYTES) { 1011 1011 - printk(KERN_INFO " PCI cache line size set incorrectly " 1012 1012 - "(%i bytes) by BIOS/FW, ", cache_size); 1013 1013 - if (cache_size > SMP_CACHE_BYTES) 1014 1014 - printk("expecting %i\n", SMP_CACHE_BYTES); 1015 1015 - else { 1016 1016 - printk("correcting to %i\n", SMP_CACHE_BYTES); 1017 1017 - pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, 1018 1018 - SMP_CACHE_BYTES >> 2); 1019 1019 - } 1020 1020 - } 1021 1021 - 1022 1022 - pci_state = readl(&regs->PciState); 1023 1023 - printk(KERN_INFO " PCI bus width: %i bits, speed: %iMHz, " 1024 1024 - "latency: %i clks\n", 1025 1025 - (pci_state & PCI_32BIT) ? 32 : 64, 1026 1026 - (pci_state & PCI_66MHZ) ? 66 : 33, 1027 1027 - ap->pci_latency); 1028 1028 - 1029 1029 - /* 1030 1030 - * Set the max DMA transfer size. Seems that for most systems 1031 1031 - * the performance is better when no MAX parameter is 1032 1032 - * set. However for systems enabling PCI write and invalidate, 1033 1033 - * DMA writes must be set to the L1 cache line size to get 1034 1034 - * optimal performance. 1035 1035 - * 1036 1036 - * The default is now to turn the PCI write and invalidate off 1037 1037 - * - that is what Alteon does for NT. 1038 1038 - */ 1039 1039 - tmp = READ_CMD_MEM | WRITE_CMD_MEM; 1040 1040 - if (ap->version >= 2) { 1041 1041 - tmp |= (MEM_READ_MULTIPLE | (pci_state & PCI_66MHZ)); 1042 1042 - /* 1043 1043 - * Tuning parameters only supported for 8 cards 1044 1044 - */ 1045 1045 - if (board_idx == BOARD_IDX_OVERFLOW || 1046 1046 - dis_pci_mem_inval[board_idx]) { 1047 1047 - if (ap->pci_command & PCI_COMMAND_INVALIDATE) { 1048 1048 - ap->pci_command &= ~PCI_COMMAND_INVALIDATE; 1049 1049 - pci_write_config_word(pdev, PCI_COMMAND, 1050 1050 - ap->pci_command); 1051 1051 - printk(KERN_INFO " Disabling PCI memory " 1052 1052 - "write and invalidate\n"); 1053 1053 - } 1054 1054 - } else if (ap->pci_command & PCI_COMMAND_INVALIDATE) { 1055 1055 - printk(KERN_INFO " PCI memory write & invalidate " 1056 1056 - "enabled by BIOS, enabling counter measures\n"); 1057 1057 - 1058 1058 - switch(SMP_CACHE_BYTES) { 1059 1059 - case 16: 1060 1060 - tmp |= DMA_WRITE_MAX_16; 1061 1061 - break; 1062 1062 - case 32: 1063 1063 - tmp |= DMA_WRITE_MAX_32; 1064 1064 - break; 1065 1065 - case 64: 1066 1066 - tmp |= DMA_WRITE_MAX_64; 1067 1067 - break; 1068 1068 - case 128: 1069 1069 - tmp |= DMA_WRITE_MAX_128; 1070 1070 - break; 1071 1071 - default: 1072 1072 - printk(KERN_INFO " Cache line size %i not " 1073 1073 - "supported, PCI write and invalidate " 1074 1074 - "disabled\n", SMP_CACHE_BYTES); 1075 1075 - ap->pci_command &= ~PCI_COMMAND_INVALIDATE; 1076 1076 - pci_write_config_word(pdev, PCI_COMMAND, 1077 1077 - ap->pci_command); 1078 1078 - } 1079 1079 - } 1080 1080 - } 1081 1081 - 1082 1082 - #ifdef __sparc__ 1083 1083 - /* 1084 1084 - * On this platform, we know what the best dma settings 1085 1085 - * are. We use 64-byte maximum bursts, because if we 1086 1086 - * burst larger than the cache line size (or even cross 1087 1087 - * a 64byte boundary in a single burst) the UltraSparc 1088 1088 - * PCI controller will disconnect at 64-byte multiples. 1089 1089 - * 1090 1090 - * Read-multiple will be properly enabled above, and when 1091 1091 - * set will give the PCI controller proper hints about 1092 1092 - * prefetching. 1093 1093 - */ 1094 1094 - tmp &= ~DMA_READ_WRITE_MASK; 1095 1095 - tmp |= DMA_READ_MAX_64; 1096 1096 - tmp |= DMA_WRITE_MAX_64; 1097 1097 - #endif 1098 1098 - #ifdef __alpha__ 1099 1099 - tmp &= ~DMA_READ_WRITE_MASK; 1100 1100 - tmp |= DMA_READ_MAX_128; 1101 1101 - /* 1102 1102 - * All the docs say MUST NOT. Well, I did. 1103 1103 - * Nothing terrible happens, if we load wrong size. 1104 1104 - * Bit w&i still works better! 1105 1105 - */ 1106 1106 - tmp |= DMA_WRITE_MAX_128; 1107 1107 - #endif 1108 1108 - writel(tmp, &regs->PciState); 1109 1109 - 1110 1110 - #if 0 1111 1111 - /* 1112 1112 - * The Host PCI bus controller driver has to set FBB. 1113 1113 - * If all devices on that PCI bus support FBB, then the controller 1114 1114 - * can enable FBB support in the Host PCI Bus controller (or on 1115 1115 - * the PCI-PCI bridge if that applies). 1116 1116 - * -ggg 1117 1117 - */ 1118 1118 - /* 1119 1119 - * I have received reports from people having problems when this 1120 1120 - * bit is enabled. 1121 1121 - */ 1122 1122 - if (!(ap->pci_command & PCI_COMMAND_FAST_BACK)) { 1123 1123 - printk(KERN_INFO " Enabling PCI Fast Back to Back\n"); 1124 1124 - ap->pci_command |= PCI_COMMAND_FAST_BACK; 1125 1125 - pci_write_config_word(pdev, PCI_COMMAND, ap->pci_command); 1126 1126 - } 1127 1127 - #endif 1128 1128 - 1129 1129 - /* 1130 1130 - * Configure DMA attributes. 1131 1131 - */ 1132 1132 - if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) { 1133 1133 - ecode = -ENODEV; 1134 1134 - goto init_error; 1135 1135 - } 1136 1136 - 1137 1137 - /* 1138 1138 - * Initialize the generic info block and the command+event rings 1139 1139 - * and the control blocks for the transmit and receive rings 1140 1140 - * as they need to be setup once and for all. 1141 1141 - */ 1142 1142 - if (!(info = dma_alloc_coherent(&ap->pdev->dev, sizeof(struct ace_info), 1143 1143 - &ap->info_dma, GFP_KERNEL))) { 1144 1144 - ecode = -EAGAIN; 1145 1145 - goto init_error; 1146 1146 - } 1147 1147 - ap->info = info; 1148 1148 - 1149 1149 - /* 1150 1150 - * Get the memory for the skb rings. 1151 1151 - */ 1152 1152 - if (!(ap->skb = kzalloc_obj(struct ace_skb))) { 1153 1153 - ecode = -EAGAIN; 1154 1154 - goto init_error; 1155 1155 - } 1156 1156 - 1157 1157 - ecode = request_irq(pdev->irq, ace_interrupt, IRQF_SHARED, 1158 1158 - DRV_NAME, dev); 1159 1159 - if (ecode) { 1160 1160 - printk(KERN_WARNING "%s: Requested IRQ %d is busy\n", 1161 1161 - DRV_NAME, pdev->irq); 1162 1162 - goto init_error; 1163 1163 - } else 1164 1164 - dev->irq = pdev->irq; 1165 1165 - 1166 1166 - #ifdef INDEX_DEBUG 1167 1167 - spin_lock_init(&ap->debug_lock); 1168 1168 - ap->last_tx = ACE_TX_RING_ENTRIES(ap) - 1; 1169 1169 - ap->last_std_rx = 0; 1170 1170 - ap->last_mini_rx = 0; 1171 1171 - #endif 1172 1172 - 1173 1173 - ecode = ace_load_firmware(dev); 1174 1174 - if (ecode) 1175 1175 - goto init_error; 1176 1176 - 1177 1177 - ap->fw_running = 0; 1178 1178 - 1179 1179 - tmp_ptr = ap->info_dma; 1180 1180 - writel(tmp_ptr >> 32, &regs->InfoPtrHi); 1181 1181 - writel(tmp_ptr & 0xffffffff, &regs->InfoPtrLo); 1182 1182 - 1183 1183 - memset(ap->evt_ring, 0, EVT_RING_ENTRIES * sizeof(struct event)); 1184 1184 - 1185 1185 - set_aceaddr(&info->evt_ctrl.rngptr, ap->evt_ring_dma); 1186 1186 - info->evt_ctrl.flags = 0; 1187 1187 - 1188 1188 - *(ap->evt_prd) = 0; 1189 1189 - wmb(); 1190 1190 - set_aceaddr(&info->evt_prd_ptr, ap->evt_prd_dma); 1191 1191 - writel(0, &regs->EvtCsm); 1192 1192 - 1193 1193 - set_aceaddr(&info->cmd_ctrl.rngptr, 0x100); 1194 1194 - info->cmd_ctrl.flags = 0; 1195 1195 - info->cmd_ctrl.max_len = 0; 1196 1196 - 1197 1197 - for (i = 0; i < CMD_RING_ENTRIES; i++) 1198 1198 - writel(0, &regs->CmdRng[i]); 1199 1199 - 1200 1200 - writel(0, &regs->CmdPrd); 1201 1201 - writel(0, &regs->CmdCsm); 1202 1202 - 1203 1203 - tmp_ptr = ap->info_dma; 1204 1204 - tmp_ptr += (unsigned long) &(((struct ace_info *)0)->s.stats); 1205 1205 - set_aceaddr(&info->stats2_ptr, (dma_addr_t) tmp_ptr); 1206 1206 - 1207 1207 - set_aceaddr(&info->rx_std_ctrl.rngptr, ap->rx_ring_base_dma); 1208 1208 - info->rx_std_ctrl.max_len = ACE_STD_BUFSIZE; 1209 1209 - info->rx_std_ctrl.flags = 1210 1210 - RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST; 1211 1211 - 1212 1212 - memset(ap->rx_std_ring, 0, 1213 1213 - RX_STD_RING_ENTRIES * sizeof(struct rx_desc)); 1214 1214 - 1215 1215 - for (i = 0; i < RX_STD_RING_ENTRIES; i++) 1216 1216 - ap->rx_std_ring[i].flags = BD_FLG_TCP_UDP_SUM; 1217 1217 - 1218 1218 - ap->rx_std_skbprd = 0; 1219 1219 - atomic_set(&ap->cur_rx_bufs, 0); 1220 1220 - 1221 1221 - set_aceaddr(&info->rx_jumbo_ctrl.rngptr, 1222 1222 - (ap->rx_ring_base_dma + 1223 1223 - (sizeof(struct rx_desc) * RX_STD_RING_ENTRIES))); 1224 1224 - info->rx_jumbo_ctrl.max_len = 0; 1225 1225 - info->rx_jumbo_ctrl.flags = 1226 1226 - RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST; 1227 1227 - 1228 1228 - memset(ap->rx_jumbo_ring, 0, 1229 1229 - RX_JUMBO_RING_ENTRIES * sizeof(struct rx_desc)); 1230 1230 - 1231 1231 - for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) 1232 1232 - ap->rx_jumbo_ring[i].flags = BD_FLG_TCP_UDP_SUM | BD_FLG_JUMBO; 1233 1233 - 1234 1234 - ap->rx_jumbo_skbprd = 0; 1235 1235 - atomic_set(&ap->cur_jumbo_bufs, 0); 1236 1236 - 1237 1237 - memset(ap->rx_mini_ring, 0, 1238 1238 - RX_MINI_RING_ENTRIES * sizeof(struct rx_desc)); 1239 1239 - 1240 1240 - if (ap->version >= 2) { 1241 1241 - set_aceaddr(&info->rx_mini_ctrl.rngptr, 1242 1242 - (ap->rx_ring_base_dma + 1243 1243 - (sizeof(struct rx_desc) * 1244 1244 - (RX_STD_RING_ENTRIES + 1245 1245 - RX_JUMBO_RING_ENTRIES)))); 1246 1246 - info->rx_mini_ctrl.max_len = ACE_MINI_SIZE; 1247 1247 - info->rx_mini_ctrl.flags = 1248 1248 - RCB_FLG_TCP_UDP_SUM|RCB_FLG_NO_PSEUDO_HDR|RCB_FLG_VLAN_ASSIST; 1249 1249 - 1250 1250 - for (i = 0; i < RX_MINI_RING_ENTRIES; i++) 1251 1251 - ap->rx_mini_ring[i].flags = 1252 1252 - BD_FLG_TCP_UDP_SUM | BD_FLG_MINI; 1253 1253 - } else { 1254 1254 - set_aceaddr(&info->rx_mini_ctrl.rngptr, 0); 1255 1255 - info->rx_mini_ctrl.flags = RCB_FLG_RNG_DISABLE; 1256 1256 - info->rx_mini_ctrl.max_len = 0; 1257 1257 - } 1258 1258 - 1259 1259 - ap->rx_mini_skbprd = 0; 1260 1260 - atomic_set(&ap->cur_mini_bufs, 0); 1261 1261 - 1262 1262 - set_aceaddr(&info->rx_return_ctrl.rngptr, 1263 1263 - (ap->rx_ring_base_dma + 1264 1264 - (sizeof(struct rx_desc) * 1265 1265 - (RX_STD_RING_ENTRIES + 1266 1266 - RX_JUMBO_RING_ENTRIES + 1267 1267 - RX_MINI_RING_ENTRIES)))); 1268 1268 - info->rx_return_ctrl.flags = 0; 1269 1269 - info->rx_return_ctrl.max_len = RX_RETURN_RING_ENTRIES; 1270 1270 - 1271 1271 - memset(ap->rx_return_ring, 0, 1272 1272 - RX_RETURN_RING_ENTRIES * sizeof(struct rx_desc)); 1273 1273 - 1274 1274 - set_aceaddr(&info->rx_ret_prd_ptr, ap->rx_ret_prd_dma); 1275 1275 - *(ap->rx_ret_prd) = 0; 1276 1276 - 1277 1277 - writel(TX_RING_BASE, &regs->WinBase); 1278 1278 - 1279 1279 - if (ACE_IS_TIGON_I(ap)) { 1280 1280 - ap->tx_ring = (__force struct tx_desc *) regs->Window; 1281 1281 - for (i = 0; i < (TIGON_I_TX_RING_ENTRIES 1282 1282 - * sizeof(struct tx_desc)) / sizeof(u32); i++) 1283 1283 - writel(0, (__force void __iomem *)ap->tx_ring + i * 4); 1284 1284 - 1285 1285 - set_aceaddr(&info->tx_ctrl.rngptr, TX_RING_BASE); 1286 1286 - } else { 1287 1287 - memset(ap->tx_ring, 0, 1288 1288 - MAX_TX_RING_ENTRIES * sizeof(struct tx_desc)); 1289 1289 - 1290 1290 - set_aceaddr(&info->tx_ctrl.rngptr, ap->tx_ring_dma); 1291 1291 - } 1292 1292 - 1293 1293 - info->tx_ctrl.max_len = ACE_TX_RING_ENTRIES(ap); 1294 1294 - tmp = RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST; 1295 1295 - 1296 1296 - /* 1297 1297 - * The Tigon I does not like having the TX ring in host memory ;-( 1298 1298 - */ 1299 1299 - if (!ACE_IS_TIGON_I(ap)) 1300 1300 - tmp |= RCB_FLG_TX_HOST_RING; 1301 1301 - #if TX_COAL_INTS_ONLY 1302 1302 - tmp |= RCB_FLG_COAL_INT_ONLY; 1303 1303 - #endif 1304 1304 - info->tx_ctrl.flags = tmp; 1305 1305 - 1306 1306 - set_aceaddr(&info->tx_csm_ptr, ap->tx_csm_dma); 1307 1307 - 1308 1308 - /* 1309 1309 - * Potential item for tuning parameter 1310 1310 - */ 1311 1311 - #if 0 /* NO */ 1312 1312 - writel(DMA_THRESH_16W, &regs->DmaReadCfg); 1313 1313 - writel(DMA_THRESH_16W, &regs->DmaWriteCfg); 1314 1314 - #else 1315 1315 - writel(DMA_THRESH_8W, &regs->DmaReadCfg); 1316 1316 - writel(DMA_THRESH_8W, &regs->DmaWriteCfg); 1317 1317 - #endif 1318 1318 - 1319 1319 - writel(0, &regs->MaskInt); 1320 1320 - writel(1, &regs->IfIdx); 1321 1321 - #if 0 1322 1322 - /* 1323 1323 - * McKinley boxes do not like us fiddling with AssistState 1324 1324 - * this early 1325 1325 - */ 1326 1326 - writel(1, &regs->AssistState); 1327 1327 - #endif 1328 1328 - 1329 1329 - writel(DEF_STAT, &regs->TuneStatTicks); 1330 1330 - writel(DEF_TRACE, &regs->TuneTrace); 1331 1331 - 1332 1332 - ace_set_rxtx_parms(dev, 0); 1333 1333 - 1334 1334 - if (board_idx == BOARD_IDX_OVERFLOW) { 1335 1335 - printk(KERN_WARNING "%s: more than %i NICs detected, " 1336 1336 - "ignoring module parameters!\n", 1337 1337 - ap->name, ACE_MAX_MOD_PARMS); 1338 1338 - } else if (board_idx >= 0) { 1339 1339 - if (tx_coal_tick[board_idx]) 1340 1340 - writel(tx_coal_tick[board_idx], 1341 1341 - &regs->TuneTxCoalTicks); 1342 1342 - if (max_tx_desc[board_idx]) 1343 1343 - writel(max_tx_desc[board_idx], &regs->TuneMaxTxDesc); 1344 1344 - 1345 1345 - if (rx_coal_tick[board_idx]) 1346 1346 - writel(rx_coal_tick[board_idx], 1347 1347 - &regs->TuneRxCoalTicks); 1348 1348 - if (max_rx_desc[board_idx]) 1349 1349 - writel(max_rx_desc[board_idx], &regs->TuneMaxRxDesc); 1350 1350 - 1351 1351 - if (trace[board_idx]) 1352 1352 - writel(trace[board_idx], &regs->TuneTrace); 1353 1353 - 1354 1354 - if ((tx_ratio[board_idx] > 0) && (tx_ratio[board_idx] < 64)) 1355 1355 - writel(tx_ratio[board_idx], &regs->TxBufRat); 1356 1356 - } 1357 1357 - 1358 1358 - /* 1359 1359 - * Default link parameters 1360 1360 - */ 1361 1361 - tmp = LNK_ENABLE | LNK_FULL_DUPLEX | LNK_1000MB | LNK_100MB | 1362 1362 - LNK_10MB | LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL | LNK_NEGOTIATE; 1363 1363 - if(ap->version >= 2) 1364 1364 - tmp |= LNK_TX_FLOW_CTL_Y; 1365 1365 - 1366 1366 - /* 1367 1367 - * Override link default parameters 1368 1368 - */ 1369 1369 - if ((board_idx >= 0) && link_state[board_idx]) { 1370 1370 - int option = link_state[board_idx]; 1371 1371 - 1372 1372 - tmp = LNK_ENABLE; 1373 1373 - 1374 1374 - if (option & 0x01) { 1375 1375 - printk(KERN_INFO "%s: Setting half duplex link\n", 1376 1376 - ap->name); 1377 1377 - tmp &= ~LNK_FULL_DUPLEX; 1378 1378 - } 1379 1379 - if (option & 0x02) 1380 1380 - tmp &= ~LNK_NEGOTIATE; 1381 1381 - if (option & 0x10) 1382 1382 - tmp |= LNK_10MB; 1383 1383 - if (option & 0x20) 1384 1384 - tmp |= LNK_100MB; 1385 1385 - if (option & 0x40) 1386 1386 - tmp |= LNK_1000MB; 1387 1387 - if ((option & 0x70) == 0) { 1388 1388 - printk(KERN_WARNING "%s: No media speed specified, " 1389 1389 - "forcing auto negotiation\n", ap->name); 1390 1390 - tmp |= LNK_NEGOTIATE | LNK_1000MB | 1391 1391 - LNK_100MB | LNK_10MB; 1392 1392 - } 1393 1393 - if ((option & 0x100) == 0) 1394 1394 - tmp |= LNK_NEG_FCTL; 1395 1395 - else 1396 1396 - printk(KERN_INFO "%s: Disabling flow control " 1397 1397 - "negotiation\n", ap->name); 1398 1398 - if (option & 0x200) 1399 1399 - tmp |= LNK_RX_FLOW_CTL_Y; 1400 1400 - if ((option & 0x400) && (ap->version >= 2)) { 1401 1401 - printk(KERN_INFO "%s: Enabling TX flow control\n", 1402 1402 - ap->name); 1403 1403 - tmp |= LNK_TX_FLOW_CTL_Y; 1404 1404 - } 1405 1405 - } 1406 1406 - 1407 1407 - ap->link = tmp; 1408 1408 - writel(tmp, &regs->TuneLink); 1409 1409 - if (ap->version >= 2) 1410 1410 - writel(tmp, &regs->TuneFastLink); 1411 1411 - 1412 1412 - writel(ap->firmware_start, &regs->Pc); 1413 1413 - 1414 1414 - writel(0, &regs->Mb0Lo); 1415 1415 - 1416 1416 - /* 1417 1417 - * Set tx_csm before we start receiving interrupts, otherwise 1418 1418 - * the interrupt handler might think it is supposed to process 1419 1419 - * tx ints before we are up and running, which may cause a null 1420 1420 - * pointer access in the int handler. 1421 1421 - */ 1422 1422 - ap->cur_rx = 0; 1423 1423 - ap->tx_prd = *(ap->tx_csm) = ap->tx_ret_csm = 0; 1424 1424 - 1425 1425 - wmb(); 1426 1426 - ace_set_txprd(regs, ap, 0); 1427 1427 - writel(0, &regs->RxRetCsm); 1428 1428 - 1429 1429 - /* 1430 1430 - * Enable DMA engine now. 1431 1431 - * If we do this sooner, Mckinley box pukes. 1432 1432 - * I assume it's because Tigon II DMA engine wants to check 1433 1433 - * *something* even before the CPU is started. 1434 1434 - */ 1435 1435 - writel(1, &regs->AssistState); /* enable DMA */ 1436 1436 - 1437 1437 - /* 1438 1438 - * Start the NIC CPU 1439 1439 - */ 1440 1440 - writel(readl(&regs->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), &regs->CpuCtrl); 1441 1441 - readl(&regs->CpuCtrl); 1442 1442 - 1443 1443 - /* 1444 1444 - * Wait for the firmware to spin up - max 3 seconds. 1445 1445 - */ 1446 1446 - myjif = jiffies + 3 * HZ; 1447 1447 - while (time_before(jiffies, myjif) && !ap->fw_running) 1448 1448 - cpu_relax(); 1449 1449 - 1450 1450 - if (!ap->fw_running) { 1451 1451 - printk(KERN_ERR "%s: Firmware NOT running!\n", ap->name); 1452 1452 - 1453 1453 - ace_dump_trace(ap); 1454 1454 - writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl); 1455 1455 - readl(&regs->CpuCtrl); 1456 1456 - 1457 1457 - /* aman@sgi.com - account for badly behaving firmware/NIC: 1458 1458 - * - have observed that the NIC may continue to generate 1459 1459 - * interrupts for some reason; attempt to stop it - halt 1460 1460 - * second CPU for Tigon II cards, and also clear Mb0 1461 1461 - * - if we're a module, we'll fail to load if this was 1462 1462 - * the only GbE card in the system => if the kernel does 1463 1463 - * see an interrupt from the NIC, code to handle it is 1464 1464 - * gone and OOps! - so free_irq also 1465 1465 - */ 1466 1466 - if (ap->version >= 2) 1467 1467 - writel(readl(&regs->CpuBCtrl) | CPU_HALT, 1468 1468 - &regs->CpuBCtrl); 1469 1469 - writel(0, &regs->Mb0Lo); 1470 1470 - readl(&regs->Mb0Lo); 1471 1471 - 1472 1472 - ecode = -EBUSY; 1473 1473 - goto init_error; 1474 1474 - } 1475 1475 - 1476 1476 - /* 1477 1477 - * We load the ring here as there seem to be no way to tell the 1478 1478 - * firmware to wipe the ring without re-initializing it. 1479 1479 - */ 1480 1480 - if (!test_and_set_bit(0, &ap->std_refill_busy)) 1481 1481 - ace_load_std_rx_ring(dev, RX_RING_SIZE); 1482 1482 - else 1483 1483 - printk(KERN_ERR "%s: Someone is busy refilling the RX ring\n", 1484 1484 - ap->name); 1485 1485 - if (ap->version >= 2) { 1486 1486 - if (!test_and_set_bit(0, &ap->mini_refill_busy)) 1487 1487 - ace_load_mini_rx_ring(dev, RX_MINI_SIZE); 1488 1488 - else 1489 1489 - printk(KERN_ERR "%s: Someone is busy refilling " 1490 1490 - "the RX mini ring\n", ap->name); 1491 1491 - } 1492 1492 - return 0; 1493 1493 - 1494 1494 - init_error: 1495 1495 - ace_init_cleanup(dev); 1496 1496 - return ecode; 1497 1497 - } 1498 1498 - 1499 1499 - 1500 1500 - static void ace_set_rxtx_parms(struct net_device *dev, int jumbo) 1501 1501 - { 1502 1502 - struct ace_private *ap = netdev_priv(dev); 1503 1503 - struct ace_regs __iomem *regs = ap->regs; 1504 1504 - int board_idx = ap->board_idx; 1505 1505 - 1506 1506 - if (board_idx >= 0) { 1507 1507 - if (!jumbo) { 1508 1508 - if (!tx_coal_tick[board_idx]) 1509 1509 - writel(DEF_TX_COAL, &regs->TuneTxCoalTicks); 1510 1510 - if (!max_tx_desc[board_idx]) 1511 1511 - writel(DEF_TX_MAX_DESC, &regs->TuneMaxTxDesc); 1512 1512 - if (!rx_coal_tick[board_idx]) 1513 1513 - writel(DEF_RX_COAL, &regs->TuneRxCoalTicks); 1514 1514 - if (!max_rx_desc[board_idx]) 1515 1515 - writel(DEF_RX_MAX_DESC, &regs->TuneMaxRxDesc); 1516 1516 - if (!tx_ratio[board_idx]) 1517 1517 - writel(DEF_TX_RATIO, &regs->TxBufRat); 1518 1518 - } else { 1519 1519 - if (!tx_coal_tick[board_idx]) 1520 1520 - writel(DEF_JUMBO_TX_COAL, 1521 1521 - &regs->TuneTxCoalTicks); 1522 1522 - if (!max_tx_desc[board_idx]) 1523 1523 - writel(DEF_JUMBO_TX_MAX_DESC, 1524 1524 - &regs->TuneMaxTxDesc); 1525 1525 - if (!rx_coal_tick[board_idx]) 1526 1526 - writel(DEF_JUMBO_RX_COAL, 1527 1527 - &regs->TuneRxCoalTicks); 1528 1528 - if (!max_rx_desc[board_idx]) 1529 1529 - writel(DEF_JUMBO_RX_MAX_DESC, 1530 1530 - &regs->TuneMaxRxDesc); 1531 1531 - if (!tx_ratio[board_idx]) 1532 1532 - writel(DEF_JUMBO_TX_RATIO, &regs->TxBufRat); 1533 1533 - } 1534 1534 - } 1535 1535 - } 1536 1536 - 1537 1537 - 1538 1538 - static void ace_watchdog(struct net_device *data, unsigned int txqueue) 1539 1539 - { 1540 1540 - struct net_device *dev = data; 1541 1541 - struct ace_private *ap = netdev_priv(dev); 1542 1542 - struct ace_regs __iomem *regs = ap->regs; 1543 1543 - 1544 1544 - /* 1545 1545 - * We haven't received a stats update event for more than 2.5 1546 1546 - * seconds and there is data in the transmit queue, thus we 1547 1547 - * assume the card is stuck. 1548 1548 - */ 1549 1549 - if (*ap->tx_csm != ap->tx_ret_csm) { 1550 1550 - printk(KERN_WARNING "%s: Transmitter is stuck, %08x\n", 1551 1551 - dev->name, (unsigned int)readl(&regs->HostCtrl)); 1552 1552 - /* This can happen due to ieee flow control. */ 1553 1553 - } else { 1554 1554 - printk(KERN_DEBUG "%s: BUG... transmitter died. Kicking it.\n", 1555 1555 - dev->name); 1556 1556 - #if 0 1557 1557 - netif_wake_queue(dev); 1558 1558 - #endif 1559 1559 - } 1560 1560 - } 1561 1561 - 1562 1562 - 1563 1563 - static void ace_bh_work(struct work_struct *work) 1564 1564 - { 1565 1565 - struct ace_private *ap = from_work(ap, work, ace_bh_work); 1566 1566 - struct net_device *dev = ap->ndev; 1567 1567 - int cur_size; 1568 1568 - 1569 1569 - cur_size = atomic_read(&ap->cur_rx_bufs); 1570 1570 - if ((cur_size < RX_LOW_STD_THRES) && 1571 1571 - !test_and_set_bit(0, &ap->std_refill_busy)) { 1572 1572 - #ifdef DEBUG 1573 1573 - printk("refilling buffers (current %i)\n", cur_size); 1574 1574 - #endif 1575 1575 - ace_load_std_rx_ring(dev, RX_RING_SIZE - cur_size); 1576 1576 - } 1577 1577 - 1578 1578 - if (ap->version >= 2) { 1579 1579 - cur_size = atomic_read(&ap->cur_mini_bufs); 1580 1580 - if ((cur_size < RX_LOW_MINI_THRES) && 1581 1581 - !test_and_set_bit(0, &ap->mini_refill_busy)) { 1582 1582 - #ifdef DEBUG 1583 1583 - printk("refilling mini buffers (current %i)\n", 1584 1584 - cur_size); 1585 1585 - #endif 1586 1586 - ace_load_mini_rx_ring(dev, RX_MINI_SIZE - cur_size); 1587 1587 - } 1588 1588 - } 1589 1589 - 1590 1590 - cur_size = atomic_read(&ap->cur_jumbo_bufs); 1591 1591 - if (ap->jumbo && (cur_size < RX_LOW_JUMBO_THRES) && 1592 1592 - !test_and_set_bit(0, &ap->jumbo_refill_busy)) { 1593 1593 - #ifdef DEBUG 1594 1594 - printk("refilling jumbo buffers (current %i)\n", cur_size); 1595 1595 - #endif 1596 1596 - ace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE - cur_size); 1597 1597 - } 1598 1598 - ap->bh_work_pending = 0; 1599 1599 - } 1600 1600 - 1601 1601 - 1602 1602 - /* 1603 1603 - * Copy the contents of the NIC's trace buffer to kernel memory. 1604 1604 - */ 1605 1605 - static void ace_dump_trace(struct ace_private *ap) 1606 1606 - { 1607 1607 - #if 0 1608 1608 - if (!ap->trace_buf) 1609 1609 - if (!(ap->trace_buf = kmalloc(ACE_TRACE_SIZE, GFP_KERNEL))) 1610 1610 - return; 1611 1611 - #endif 1612 1612 - } 1613 1613 - 1614 1614 - 1615 1615 - /* 1616 1616 - * Load the standard rx ring. 1617 1617 - * 1618 1618 - * Loading rings is safe without holding the spin lock since this is 1619 1619 - * done only before the device is enabled, thus no interrupts are 1620 1620 - * generated and by the interrupt handler/bh handler. 1621 1621 - */ 1622 1622 - static void ace_load_std_rx_ring(struct net_device *dev, int nr_bufs) 1623 1623 - { 1624 1624 - struct ace_private *ap = netdev_priv(dev); 1625 1625 - struct ace_regs __iomem *regs = ap->regs; 1626 1626 - short i, idx; 1627 1627 - 1628 1628 - 1629 1629 - prefetchw(&ap->cur_rx_bufs); 1630 1630 - 1631 1631 - idx = ap->rx_std_skbprd; 1632 1632 - 1633 1633 - for (i = 0; i < nr_bufs; i++) { 1634 1634 - struct sk_buff *skb; 1635 1635 - struct rx_desc *rd; 1636 1636 - dma_addr_t mapping; 1637 1637 - 1638 1638 - skb = netdev_alloc_skb_ip_align(dev, ACE_STD_BUFSIZE); 1639 1639 - if (!skb) 1640 1640 - break; 1641 1641 - 1642 1642 - mapping = dma_map_page(&ap->pdev->dev, 1643 1643 - virt_to_page(skb->data), 1644 1644 - offset_in_page(skb->data), 1645 1645 - ACE_STD_BUFSIZE, DMA_FROM_DEVICE); 1646 1646 - ap->skb->rx_std_skbuff[idx].skb = skb; 1647 1647 - dma_unmap_addr_set(&ap->skb->rx_std_skbuff[idx], 1648 1648 - mapping, mapping); 1649 1649 - 1650 1650 - rd = &ap->rx_std_ring[idx]; 1651 1651 - set_aceaddr(&rd->addr, mapping); 1652 1652 - rd->size = ACE_STD_BUFSIZE; 1653 1653 - rd->idx = idx; 1654 1654 - idx = (idx + 1) % RX_STD_RING_ENTRIES; 1655 1655 - } 1656 1656 - 1657 1657 - if (!i) 1658 1658 - goto error_out; 1659 1659 - 1660 1660 - atomic_add(i, &ap->cur_rx_bufs); 1661 1661 - ap->rx_std_skbprd = idx; 1662 1662 - 1663 1663 - if (ACE_IS_TIGON_I(ap)) { 1664 1664 - struct cmd cmd; 1665 1665 - cmd.evt = C_SET_RX_PRD_IDX; 1666 1666 - cmd.code = 0; 1667 1667 - cmd.idx = ap->rx_std_skbprd; 1668 1668 - ace_issue_cmd(regs, &cmd); 1669 1669 - } else { 1670 1670 - writel(idx, &regs->RxStdPrd); 1671 1671 - wmb(); 1672 1672 - } 1673 1673 - 1674 1674 - out: 1675 1675 - clear_bit(0, &ap->std_refill_busy); 1676 1676 - return; 1677 1677 - 1678 1678 - error_out: 1679 1679 - printk(KERN_INFO "Out of memory when allocating " 1680 1680 - "standard receive buffers\n"); 1681 1681 - goto out; 1682 1682 - } 1683 1683 - 1684 1684 - 1685 1685 - static void ace_load_mini_rx_ring(struct net_device *dev, int nr_bufs) 1686 1686 - { 1687 1687 - struct ace_private *ap = netdev_priv(dev); 1688 1688 - struct ace_regs __iomem *regs = ap->regs; 1689 1689 - short i, idx; 1690 1690 - 1691 1691 - prefetchw(&ap->cur_mini_bufs); 1692 1692 - 1693 1693 - idx = ap->rx_mini_skbprd; 1694 1694 - for (i = 0; i < nr_bufs; i++) { 1695 1695 - struct sk_buff *skb; 1696 1696 - struct rx_desc *rd; 1697 1697 - dma_addr_t mapping; 1698 1698 - 1699 1699 - skb = netdev_alloc_skb_ip_align(dev, ACE_MINI_BUFSIZE); 1700 1700 - if (!skb) 1701 1701 - break; 1702 1702 - 1703 1703 - mapping = dma_map_page(&ap->pdev->dev, 1704 1704 - virt_to_page(skb->data), 1705 1705 - offset_in_page(skb->data), 1706 1706 - ACE_MINI_BUFSIZE, DMA_FROM_DEVICE); 1707 1707 - ap->skb->rx_mini_skbuff[idx].skb = skb; 1708 1708 - dma_unmap_addr_set(&ap->skb->rx_mini_skbuff[idx], 1709 1709 - mapping, mapping); 1710 1710 - 1711 1711 - rd = &ap->rx_mini_ring[idx]; 1712 1712 - set_aceaddr(&rd->addr, mapping); 1713 1713 - rd->size = ACE_MINI_BUFSIZE; 1714 1714 - rd->idx = idx; 1715 1715 - idx = (idx + 1) % RX_MINI_RING_ENTRIES; 1716 1716 - } 1717 1717 - 1718 1718 - if (!i) 1719 1719 - goto error_out; 1720 1720 - 1721 1721 - atomic_add(i, &ap->cur_mini_bufs); 1722 1722 - 1723 1723 - ap->rx_mini_skbprd = idx; 1724 1724 - 1725 1725 - writel(idx, &regs->RxMiniPrd); 1726 1726 - wmb(); 1727 1727 - 1728 1728 - out: 1729 1729 - clear_bit(0, &ap->mini_refill_busy); 1730 1730 - return; 1731 1731 - error_out: 1732 1732 - printk(KERN_INFO "Out of memory when allocating " 1733 1733 - "mini receive buffers\n"); 1734 1734 - goto out; 1735 1735 - } 1736 1736 - 1737 1737 - 1738 1738 - /* 1739 1739 - * Load the jumbo rx ring, this may happen at any time if the MTU 1740 1740 - * is changed to a value > 1500. 1741 1741 - */ 1742 1742 - static void ace_load_jumbo_rx_ring(struct net_device *dev, int nr_bufs) 1743 1743 - { 1744 1744 - struct ace_private *ap = netdev_priv(dev); 1745 1745 - struct ace_regs __iomem *regs = ap->regs; 1746 1746 - short i, idx; 1747 1747 - 1748 1748 - idx = ap->rx_jumbo_skbprd; 1749 1749 - 1750 1750 - for (i = 0; i < nr_bufs; i++) { 1751 1751 - struct sk_buff *skb; 1752 1752 - struct rx_desc *rd; 1753 1753 - dma_addr_t mapping; 1754 1754 - 1755 1755 - skb = netdev_alloc_skb_ip_align(dev, ACE_JUMBO_BUFSIZE); 1756 1756 - if (!skb) 1757 1757 - break; 1758 1758 - 1759 1759 - mapping = dma_map_page(&ap->pdev->dev, 1760 1760 - virt_to_page(skb->data), 1761 1761 - offset_in_page(skb->data), 1762 1762 - ACE_JUMBO_BUFSIZE, DMA_FROM_DEVICE); 1763 1763 - ap->skb->rx_jumbo_skbuff[idx].skb = skb; 1764 1764 - dma_unmap_addr_set(&ap->skb->rx_jumbo_skbuff[idx], 1765 1765 - mapping, mapping); 1766 1766 - 1767 1767 - rd = &ap->rx_jumbo_ring[idx]; 1768 1768 - set_aceaddr(&rd->addr, mapping); 1769 1769 - rd->size = ACE_JUMBO_BUFSIZE; 1770 1770 - rd->idx = idx; 1771 1771 - idx = (idx + 1) % RX_JUMBO_RING_ENTRIES; 1772 1772 - } 1773 1773 - 1774 1774 - if (!i) 1775 1775 - goto error_out; 1776 1776 - 1777 1777 - atomic_add(i, &ap->cur_jumbo_bufs); 1778 1778 - ap->rx_jumbo_skbprd = idx; 1779 1779 - 1780 1780 - if (ACE_IS_TIGON_I(ap)) { 1781 1781 - struct cmd cmd; 1782 1782 - cmd.evt = C_SET_RX_JUMBO_PRD_IDX; 1783 1783 - cmd.code = 0; 1784 1784 - cmd.idx = ap->rx_jumbo_skbprd; 1785 1785 - ace_issue_cmd(regs, &cmd); 1786 1786 - } else { 1787 1787 - writel(idx, &regs->RxJumboPrd); 1788 1788 - wmb(); 1789 1789 - } 1790 1790 - 1791 1791 - out: 1792 1792 - clear_bit(0, &ap->jumbo_refill_busy); 1793 1793 - return; 1794 1794 - error_out: 1795 1795 - if (net_ratelimit()) 1796 1796 - printk(KERN_INFO "Out of memory when allocating " 1797 1797 - "jumbo receive buffers\n"); 1798 1798 - goto out; 1799 1799 - } 1800 1800 - 1801 1801 - 1802 1802 - /* 1803 1803 - * All events are considered to be slow (RX/TX ints do not generate 1804 1804 - * events) and are handled here, outside the main interrupt handler, 1805 1805 - * to reduce the size of the handler. 1806 1806 - */ 1807 1807 - static u32 ace_handle_event(struct net_device *dev, u32 evtcsm, u32 evtprd) 1808 1808 - { 1809 1809 - struct ace_private *ap; 1810 1810 - 1811 1811 - ap = netdev_priv(dev); 1812 1812 - 1813 1813 - while (evtcsm != evtprd) { 1814 1814 - switch (ap->evt_ring[evtcsm].evt) { 1815 1815 - case E_FW_RUNNING: 1816 1816 - printk(KERN_INFO "%s: Firmware up and running\n", 1817 1817 - ap->name); 1818 1818 - ap->fw_running = 1; 1819 1819 - wmb(); 1820 1820 - break; 1821 1821 - case E_STATS_UPDATED: 1822 1822 - break; 1823 1823 - case E_LNK_STATE: 1824 1824 - { 1825 1825 - u16 code = ap->evt_ring[evtcsm].code; 1826 1826 - switch (code) { 1827 1827 - case E_C_LINK_UP: 1828 1828 - { 1829 1829 - u32 state = readl(&ap->regs->GigLnkState); 1830 1830 - printk(KERN_WARNING "%s: Optical link UP " 1831 1831 - "(%s Duplex, Flow Control: %s%s)\n", 1832 1832 - ap->name, 1833 1833 - state & LNK_FULL_DUPLEX ? "Full":"Half", 1834 1834 - state & LNK_TX_FLOW_CTL_Y ? "TX " : "", 1835 1835 - state & LNK_RX_FLOW_CTL_Y ? "RX" : ""); 1836 1836 - break; 1837 1837 - } 1838 1838 - case E_C_LINK_DOWN: 1839 1839 - printk(KERN_WARNING "%s: Optical link DOWN\n", 1840 1840 - ap->name); 1841 1841 - break; 1842 1842 - case E_C_LINK_10_100: 1843 1843 - printk(KERN_WARNING "%s: 10/100BaseT link " 1844 1844 - "UP\n", ap->name); 1845 1845 - break; 1846 1846 - default: 1847 1847 - printk(KERN_ERR "%s: Unknown optical link " 1848 1848 - "state %02x\n", ap->name, code); 1849 1849 - } 1850 1850 - break; 1851 1851 - } 1852 1852 - case E_ERROR: 1853 1853 - switch(ap->evt_ring[evtcsm].code) { 1854 1854 - case E_C_ERR_INVAL_CMD: 1855 1855 - printk(KERN_ERR "%s: invalid command error\n", 1856 1856 - ap->name); 1857 1857 - break; 1858 1858 - case E_C_ERR_UNIMP_CMD: 1859 1859 - printk(KERN_ERR "%s: unimplemented command " 1860 1860 - "error\n", ap->name); 1861 1861 - break; 1862 1862 - case E_C_ERR_BAD_CFG: 1863 1863 - printk(KERN_ERR "%s: bad config error\n", 1864 1864 - ap->name); 1865 1865 - break; 1866 1866 - default: 1867 1867 - printk(KERN_ERR "%s: unknown error %02x\n", 1868 1868 - ap->name, ap->evt_ring[evtcsm].code); 1869 1869 - } 1870 1870 - break; 1871 1871 - case E_RESET_JUMBO_RNG: 1872 1872 - { 1873 1873 - int i; 1874 1874 - for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) { 1875 1875 - if (ap->skb->rx_jumbo_skbuff[i].skb) { 1876 1876 - ap->rx_jumbo_ring[i].size = 0; 1877 1877 - set_aceaddr(&ap->rx_jumbo_ring[i].addr, 0); 1878 1878 - dev_kfree_skb(ap->skb->rx_jumbo_skbuff[i].skb); 1879 1879 - ap->skb->rx_jumbo_skbuff[i].skb = NULL; 1880 1880 - } 1881 1881 - } 1882 1882 - 1883 1883 - if (ACE_IS_TIGON_I(ap)) { 1884 1884 - struct cmd cmd; 1885 1885 - cmd.evt = C_SET_RX_JUMBO_PRD_IDX; 1886 1886 - cmd.code = 0; 1887 1887 - cmd.idx = 0; 1888 1888 - ace_issue_cmd(ap->regs, &cmd); 1889 1889 - } else { 1890 1890 - writel(0, &((ap->regs)->RxJumboPrd)); 1891 1891 - wmb(); 1892 1892 - } 1893 1893 - 1894 1894 - ap->jumbo = 0; 1895 1895 - ap->rx_jumbo_skbprd = 0; 1896 1896 - printk(KERN_INFO "%s: Jumbo ring flushed\n", 1897 1897 - ap->name); 1898 1898 - clear_bit(0, &ap->jumbo_refill_busy); 1899 1899 - break; 1900 1900 - } 1901 1901 - default: 1902 1902 - printk(KERN_ERR "%s: Unhandled event 0x%02x\n", 1903 1903 - ap->name, ap->evt_ring[evtcsm].evt); 1904 1904 - } 1905 1905 - evtcsm = (evtcsm + 1) % EVT_RING_ENTRIES; 1906 1906 - } 1907 1907 - 1908 1908 - return evtcsm; 1909 1909 - } 1910 1910 - 1911 1911 - 1912 1912 - static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm) 1913 1913 - { 1914 1914 - struct ace_private *ap = netdev_priv(dev); 1915 1915 - u32 idx; 1916 1916 - int mini_count = 0, std_count = 0; 1917 1917 - 1918 1918 - idx = rxretcsm; 1919 1919 - 1920 1920 - prefetchw(&ap->cur_rx_bufs); 1921 1921 - prefetchw(&ap->cur_mini_bufs); 1922 1922 - 1923 1923 - while (idx != rxretprd) { 1924 1924 - struct ring_info *rip; 1925 1925 - struct sk_buff *skb; 1926 1926 - struct rx_desc *retdesc; 1927 1927 - u32 skbidx; 1928 1928 - int bd_flags, desc_type, mapsize; 1929 1929 - u16 csum; 1930 1930 - 1931 1931 - 1932 1932 - /* make sure the rx descriptor isn't read before rxretprd */ 1933 1933 - if (idx == rxretcsm) 1934 1934 - rmb(); 1935 1935 - 1936 1936 - retdesc = &ap->rx_return_ring[idx]; 1937 1937 - skbidx = retdesc->idx; 1938 1938 - bd_flags = retdesc->flags; 1939 1939 - desc_type = bd_flags & (BD_FLG_JUMBO | BD_FLG_MINI); 1940 1940 - 1941 1941 - switch(desc_type) { 1942 1942 - /* 1943 1943 - * Normal frames do not have any flags set 1944 1944 - * 1945 1945 - * Mini and normal frames arrive frequently, 1946 1946 - * so use a local counter to avoid doing 1947 1947 - * atomic operations for each packet arriving. 1948 1948 - */ 1949 1949 - case 0: 1950 1950 - rip = &ap->skb->rx_std_skbuff[skbidx]; 1951 1951 - mapsize = ACE_STD_BUFSIZE; 1952 1952 - std_count++; 1953 1953 - break; 1954 1954 - case BD_FLG_JUMBO: 1955 1955 - rip = &ap->skb->rx_jumbo_skbuff[skbidx]; 1956 1956 - mapsize = ACE_JUMBO_BUFSIZE; 1957 1957 - atomic_dec(&ap->cur_jumbo_bufs); 1958 1958 - break; 1959 1959 - case BD_FLG_MINI: 1960 1960 - rip = &ap->skb->rx_mini_skbuff[skbidx]; 1961 1961 - mapsize = ACE_MINI_BUFSIZE; 1962 1962 - mini_count++; 1963 1963 - break; 1964 1964 - default: 1965 1965 - printk(KERN_INFO "%s: unknown frame type (0x%02x) " 1966 1966 - "returned by NIC\n", dev->name, 1967 1967 - retdesc->flags); 1968 1968 - goto error; 1969 1969 - } 1970 1970 - 1971 1971 - skb = rip->skb; 1972 1972 - rip->skb = NULL; 1973 1973 - dma_unmap_page(&ap->pdev->dev, dma_unmap_addr(rip, mapping), 1974 1974 - mapsize, DMA_FROM_DEVICE); 1975 1975 - skb_put(skb, retdesc->size); 1976 1976 - 1977 1977 - /* 1978 1978 - * Fly baby, fly! 1979 1979 - */ 1980 1980 - csum = retdesc->tcp_udp_csum; 1981 1981 - 1982 1982 - skb->protocol = eth_type_trans(skb, dev); 1983 1983 - 1984 1984 - /* 1985 1985 - * Instead of forcing the poor tigon mips cpu to calculate 1986 1986 - * pseudo hdr checksum, we do this ourselves. 1987 1987 - */ 1988 1988 - if (bd_flags & BD_FLG_TCP_UDP_SUM) { 1989 1989 - skb->csum = htons(csum); 1990 1990 - skb->ip_summed = CHECKSUM_COMPLETE; 1991 1991 - } else { 1992 1992 - skb_checksum_none_assert(skb); 1993 1993 - } 1994 1994 - 1995 1995 - /* send it up */ 1996 1996 - if ((bd_flags & BD_FLG_VLAN_TAG)) 1997 1997 - __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), retdesc->vlan); 1998 1998 - netif_rx(skb); 1999 1999 - 2000 2000 - dev->stats.rx_packets++; 2001 2001 - dev->stats.rx_bytes += retdesc->size; 2002 2002 - 2003 2003 - idx = (idx + 1) % RX_RETURN_RING_ENTRIES; 2004 2004 - } 2005 2005 - 2006 2006 - atomic_sub(std_count, &ap->cur_rx_bufs); 2007 2007 - if (!ACE_IS_TIGON_I(ap)) 2008 2008 - atomic_sub(mini_count, &ap->cur_mini_bufs); 2009 2009 - 2010 2010 - out: 2011 2011 - /* 2012 2012 - * According to the documentation RxRetCsm is obsolete with 2013 2013 - * the 12.3.x Firmware - my Tigon I NICs seem to disagree! 2014 2014 - */ 2015 2015 - if (ACE_IS_TIGON_I(ap)) { 2016 2016 - writel(idx, &ap->regs->RxRetCsm); 2017 2017 - } 2018 2018 - ap->cur_rx = idx; 2019 2019 - 2020 2020 - return; 2021 2021 - error: 2022 2022 - idx = rxretprd; 2023 2023 - goto out; 2024 2024 - } 2025 2025 - 2026 2026 - 2027 2027 - static inline void ace_tx_int(struct net_device *dev, 2028 2028 - u32 txcsm, u32 idx) 2029 2029 - { 2030 2030 - struct ace_private *ap = netdev_priv(dev); 2031 2031 - 2032 2032 - do { 2033 2033 - struct sk_buff *skb; 2034 2034 - struct tx_ring_info *info; 2035 2035 - 2036 2036 - info = ap->skb->tx_skbuff + idx; 2037 2037 - skb = info->skb; 2038 2038 - 2039 2039 - if (dma_unmap_len(info, maplen)) { 2040 2040 - dma_unmap_page(&ap->pdev->dev, 2041 2041 - dma_unmap_addr(info, mapping), 2042 2042 - dma_unmap_len(info, maplen), 2043 2043 - DMA_TO_DEVICE); 2044 2044 - dma_unmap_len_set(info, maplen, 0); 2045 2045 - } 2046 2046 - 2047 2047 - if (skb) { 2048 2048 - dev->stats.tx_packets++; 2049 2049 - dev->stats.tx_bytes += skb->len; 2050 2050 - dev_consume_skb_irq(skb); 2051 2051 - info->skb = NULL; 2052 2052 - } 2053 2053 - 2054 2054 - idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap); 2055 2055 - } while (idx != txcsm); 2056 2056 - 2057 2057 - if (netif_queue_stopped(dev)) 2058 2058 - netif_wake_queue(dev); 2059 2059 - 2060 2060 - wmb(); 2061 2061 - ap->tx_ret_csm = txcsm; 2062 2062 - 2063 2063 - /* So... tx_ret_csm is advanced _after_ check for device wakeup. 2064 2064 - * 2065 2065 - * We could try to make it before. In this case we would get 2066 2066 - * the following race condition: hard_start_xmit on other cpu 2067 2067 - * enters after we advanced tx_ret_csm and fills space, 2068 2068 - * which we have just freed, so that we make illegal device wakeup. 2069 2069 - * There is no good way to workaround this (at entry 2070 2070 - * to ace_start_xmit detects this condition and prevents 2071 2071 - * ring corruption, but it is not a good workaround.) 2072 2072 - * 2073 2073 - * When tx_ret_csm is advanced after, we wake up device _only_ 2074 2074 - * if we really have some space in ring (though the core doing 2075 2075 - * hard_start_xmit can see full ring for some period and has to 2076 2076 - * synchronize.) Superb. 2077 2077 - * BUT! We get another subtle race condition. hard_start_xmit 2078 2078 - * may think that ring is full between wakeup and advancing 2079 2079 - * tx_ret_csm and will stop device instantly! It is not so bad. 2080 2080 - * We are guaranteed that there is something in ring, so that 2081 2081 - * the next irq will resume transmission. To speedup this we could 2082 2082 - * mark descriptor, which closes ring with BD_FLG_COAL_NOW 2083 2083 - * (see ace_start_xmit). 2084 2084 - * 2085 2085 - * Well, this dilemma exists in all lock-free devices. 2086 2086 - * We, following scheme used in drivers by Donald Becker, 2087 2087 - * select the least dangerous. 2088 2088 - * --ANK 2089 2089 - */ 2090 2090 - } 2091 2091 - 2092 2092 - 2093 2093 - static irqreturn_t ace_interrupt(int irq, void *dev_id) 2094 2094 - { 2095 2095 - struct net_device *dev = (struct net_device *)dev_id; 2096 2096 - struct ace_private *ap = netdev_priv(dev); 2097 2097 - struct ace_regs __iomem *regs = ap->regs; 2098 2098 - u32 idx; 2099 2099 - u32 txcsm, rxretcsm, rxretprd; 2100 2100 - u32 evtcsm, evtprd; 2101 2101 - 2102 2102 - /* 2103 2103 - * In case of PCI shared interrupts or spurious interrupts, 2104 2104 - * we want to make sure it is actually our interrupt before 2105 2105 - * spending any time in here. 2106 2106 - */ 2107 2107 - if (!(readl(&regs->HostCtrl) & IN_INT)) 2108 2108 - return IRQ_NONE; 2109 2109 - 2110 2110 - /* 2111 2111 - * ACK intr now. Otherwise we will lose updates to rx_ret_prd, 2112 2112 - * which happened _after_ rxretprd = *ap->rx_ret_prd; but before 2113 2113 - * writel(0, &regs->Mb0Lo). 2114 2114 - * 2115 2115 - * "IRQ avoidance" recommended in docs applies to IRQs served 2116 2116 - * threads and it is wrong even for that case. 2117 2117 - */ 2118 2118 - writel(0, &regs->Mb0Lo); 2119 2119 - readl(&regs->Mb0Lo); 2120 2120 - 2121 2121 - /* 2122 2122 - * There is no conflict between transmit handling in 2123 2123 - * start_xmit and receive processing, thus there is no reason 2124 2124 - * to take a spin lock for RX handling. Wait until we start 2125 2125 - * working on the other stuff - hey we don't need a spin lock 2126 2126 - * anymore. 2127 2127 - */ 2128 2128 - rxretprd = *ap->rx_ret_prd; 2129 2129 - rxretcsm = ap->cur_rx; 2130 2130 - 2131 2131 - if (rxretprd != rxretcsm) 2132 2132 - ace_rx_int(dev, rxretprd, rxretcsm); 2133 2133 - 2134 2134 - txcsm = *ap->tx_csm; 2135 2135 - idx = ap->tx_ret_csm; 2136 2136 - 2137 2137 - if (txcsm != idx) { 2138 2138 - /* 2139 2139 - * If each skb takes only one descriptor this check degenerates 2140 2140 - * to identity, because new space has just been opened. 2141 2141 - * But if skbs are fragmented we must check that this index 2142 2142 - * update releases enough of space, otherwise we just 2143 2143 - * wait for device to make more work. 2144 2144 - */ 2145 2145 - if (!tx_ring_full(ap, txcsm, ap->tx_prd)) 2146 2146 - ace_tx_int(dev, txcsm, idx); 2147 2147 - } 2148 2148 - 2149 2149 - evtcsm = readl(&regs->EvtCsm); 2150 2150 - evtprd = *ap->evt_prd; 2151 2151 - 2152 2152 - if (evtcsm != evtprd) { 2153 2153 - evtcsm = ace_handle_event(dev, evtcsm, evtprd); 2154 2154 - writel(evtcsm, &regs->EvtCsm); 2155 2155 - } 2156 2156 - 2157 2157 - /* 2158 2158 - * This has to go last in the interrupt handler and run with 2159 2159 - * the spin lock released ... what lock? 2160 2160 - */ 2161 2161 - if (netif_running(dev)) { 2162 2162 - int cur_size; 2163 2163 - int run_bh_work = 0; 2164 2164 - 2165 2165 - cur_size = atomic_read(&ap->cur_rx_bufs); 2166 2166 - if (cur_size < RX_LOW_STD_THRES) { 2167 2167 - if ((cur_size < RX_PANIC_STD_THRES) && 2168 2168 - !test_and_set_bit(0, &ap->std_refill_busy)) { 2169 2169 - #ifdef DEBUG 2170 2170 - printk("low on std buffers %i\n", cur_size); 2171 2171 - #endif 2172 2172 - ace_load_std_rx_ring(dev, 2173 2173 - RX_RING_SIZE - cur_size); 2174 2174 - } else 2175 2175 - run_bh_work = 1; 2176 2176 - } 2177 2177 - 2178 2178 - if (!ACE_IS_TIGON_I(ap)) { 2179 2179 - cur_size = atomic_read(&ap->cur_mini_bufs); 2180 2180 - if (cur_size < RX_LOW_MINI_THRES) { 2181 2181 - if ((cur_size < RX_PANIC_MINI_THRES) && 2182 2182 - !test_and_set_bit(0, 2183 2183 - &ap->mini_refill_busy)) { 2184 2184 - #ifdef DEBUG 2185 2185 - printk("low on mini buffers %i\n", 2186 2186 - cur_size); 2187 2187 - #endif 2188 2188 - ace_load_mini_rx_ring(dev, 2189 2189 - RX_MINI_SIZE - cur_size); 2190 2190 - } else 2191 2191 - run_bh_work = 1; 2192 2192 - } 2193 2193 - } 2194 2194 - 2195 2195 - if (ap->jumbo) { 2196 2196 - cur_size = atomic_read(&ap->cur_jumbo_bufs); 2197 2197 - if (cur_size < RX_LOW_JUMBO_THRES) { 2198 2198 - if ((cur_size < RX_PANIC_JUMBO_THRES) && 2199 2199 - !test_and_set_bit(0, 2200 2200 - &ap->jumbo_refill_busy)){ 2201 2201 - #ifdef DEBUG 2202 2202 - printk("low on jumbo buffers %i\n", 2203 2203 - cur_size); 2204 2204 - #endif 2205 2205 - ace_load_jumbo_rx_ring(dev, 2206 2206 - RX_JUMBO_SIZE - cur_size); 2207 2207 - } else 2208 2208 - run_bh_work = 1; 2209 2209 - } 2210 2210 - } 2211 2211 - if (run_bh_work && !ap->bh_work_pending) { 2212 2212 - ap->bh_work_pending = 1; 2213 2213 - queue_work(system_bh_wq, &ap->ace_bh_work); 2214 2214 - } 2215 2215 - } 2216 2216 - 2217 2217 - return IRQ_HANDLED; 2218 2218 - } 2219 2219 - 2220 2220 - static int ace_open(struct net_device *dev) 2221 2221 - { 2222 2222 - struct ace_private *ap = netdev_priv(dev); 2223 2223 - struct ace_regs __iomem *regs = ap->regs; 2224 2224 - struct cmd cmd; 2225 2225 - 2226 2226 - if (!(ap->fw_running)) { 2227 2227 - printk(KERN_WARNING "%s: Firmware not running!\n", dev->name); 2228 2228 - return -EBUSY; 2229 2229 - } 2230 2230 - 2231 2231 - writel(dev->mtu + ETH_HLEN + 4, &regs->IfMtu); 2232 2232 - 2233 2233 - cmd.evt = C_CLEAR_STATS; 2234 2234 - cmd.code = 0; 2235 2235 - cmd.idx = 0; 2236 2236 - ace_issue_cmd(regs, &cmd); 2237 2237 - 2238 2238 - cmd.evt = C_HOST_STATE; 2239 2239 - cmd.code = C_C_STACK_UP; 2240 2240 - cmd.idx = 0; 2241 2241 - ace_issue_cmd(regs, &cmd); 2242 2242 - 2243 2243 - if (ap->jumbo && 2244 2244 - !test_and_set_bit(0, &ap->jumbo_refill_busy)) 2245 2245 - ace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE); 2246 2246 - 2247 2247 - if (dev->flags & IFF_PROMISC) { 2248 2248 - cmd.evt = C_SET_PROMISC_MODE; 2249 2249 - cmd.code = C_C_PROMISC_ENABLE; 2250 2250 - cmd.idx = 0; 2251 2251 - ace_issue_cmd(regs, &cmd); 2252 2252 - 2253 2253 - ap->promisc = 1; 2254 2254 - }else 2255 2255 - ap->promisc = 0; 2256 2256 - ap->mcast_all = 0; 2257 2257 - 2258 2258 - #if 0 2259 2259 - cmd.evt = C_LNK_NEGOTIATION; 2260 2260 - cmd.code = 0; 2261 2261 - cmd.idx = 0; 2262 2262 - ace_issue_cmd(regs, &cmd); 2263 2263 - #endif 2264 2264 - 2265 2265 - netif_start_queue(dev); 2266 2266 - 2267 2267 - /* 2268 2268 - * Setup the bottom half rx ring refill handler 2269 2269 - */ 2270 2270 - INIT_WORK(&ap->ace_bh_work, ace_bh_work); 2271 2271 - return 0; 2272 2272 - } 2273 2273 - 2274 2274 - 2275 2275 - static int ace_close(struct net_device *dev) 2276 2276 - { 2277 2277 - struct ace_private *ap = netdev_priv(dev); 2278 2278 - struct ace_regs __iomem *regs = ap->regs; 2279 2279 - struct cmd cmd; 2280 2280 - unsigned long flags; 2281 2281 - short i; 2282 2282 - 2283 2283 - /* 2284 2284 - * Without (or before) releasing irq and stopping hardware, this 2285 2285 - * is an absolute non-sense, by the way. It will be reset instantly 2286 2286 - * by the first irq. 2287 2287 - */ 2288 2288 - netif_stop_queue(dev); 2289 2289 - 2290 2290 - 2291 2291 - if (ap->promisc) { 2292 2292 - cmd.evt = C_SET_PROMISC_MODE; 2293 2293 - cmd.code = C_C_PROMISC_DISABLE; 2294 2294 - cmd.idx = 0; 2295 2295 - ace_issue_cmd(regs, &cmd); 2296 2296 - ap->promisc = 0; 2297 2297 - } 2298 2298 - 2299 2299 - cmd.evt = C_HOST_STATE; 2300 2300 - cmd.code = C_C_STACK_DOWN; 2301 2301 - cmd.idx = 0; 2302 2302 - ace_issue_cmd(regs, &cmd); 2303 2303 - 2304 2304 - cancel_work_sync(&ap->ace_bh_work); 2305 2305 - 2306 2306 - /* 2307 2307 - * Make sure one CPU is not processing packets while 2308 2308 - * buffers are being released by another. 2309 2309 - */ 2310 2310 - 2311 2311 - local_irq_save(flags); 2312 2312 - ace_mask_irq(dev); 2313 2313 - 2314 2314 - for (i = 0; i < ACE_TX_RING_ENTRIES(ap); i++) { 2315 2315 - struct sk_buff *skb; 2316 2316 - struct tx_ring_info *info; 2317 2317 - 2318 2318 - info = ap->skb->tx_skbuff + i; 2319 2319 - skb = info->skb; 2320 2320 - 2321 2321 - if (dma_unmap_len(info, maplen)) { 2322 2322 - if (ACE_IS_TIGON_I(ap)) { 2323 2323 - /* NB: TIGON_1 is special, tx_ring is in io space */ 2324 2324 - struct tx_desc __iomem *tx; 2325 2325 - tx = (__force struct tx_desc __iomem *) &ap->tx_ring[i]; 2326 2326 - writel(0, &tx->addr.addrhi); 2327 2327 - writel(0, &tx->addr.addrlo); 2328 2328 - writel(0, &tx->flagsize); 2329 2329 - } else 2330 2330 - memset(ap->tx_ring + i, 0, 2331 2331 - sizeof(struct tx_desc)); 2332 2332 - dma_unmap_page(&ap->pdev->dev, 2333 2333 - dma_unmap_addr(info, mapping), 2334 2334 - dma_unmap_len(info, maplen), 2335 2335 - DMA_TO_DEVICE); 2336 2336 - dma_unmap_len_set(info, maplen, 0); 2337 2337 - } 2338 2338 - if (skb) { 2339 2339 - dev_kfree_skb(skb); 2340 2340 - info->skb = NULL; 2341 2341 - } 2342 2342 - } 2343 2343 - 2344 2344 - if (ap->jumbo) { 2345 2345 - cmd.evt = C_RESET_JUMBO_RNG; 2346 2346 - cmd.code = 0; 2347 2347 - cmd.idx = 0; 2348 2348 - ace_issue_cmd(regs, &cmd); 2349 2349 - } 2350 2350 - 2351 2351 - ace_unmask_irq(dev); 2352 2352 - local_irq_restore(flags); 2353 2353 - 2354 2354 - return 0; 2355 2355 - } 2356 2356 - 2357 2357 - 2358 2358 - static inline dma_addr_t 2359 2359 - ace_map_tx_skb(struct ace_private *ap, struct sk_buff *skb, 2360 2360 - struct sk_buff *tail, u32 idx) 2361 2361 - { 2362 2362 - dma_addr_t mapping; 2363 2363 - struct tx_ring_info *info; 2364 2364 - 2365 2365 - mapping = dma_map_page(&ap->pdev->dev, virt_to_page(skb->data), 2366 2366 - offset_in_page(skb->data), skb->len, 2367 2367 - DMA_TO_DEVICE); 2368 2368 - 2369 2369 - info = ap->skb->tx_skbuff + idx; 2370 2370 - info->skb = tail; 2371 2371 - dma_unmap_addr_set(info, mapping, mapping); 2372 2372 - dma_unmap_len_set(info, maplen, skb->len); 2373 2373 - return mapping; 2374 2374 - } 2375 2375 - 2376 2376 - 2377 2377 - static inline void 2378 2378 - ace_load_tx_bd(struct ace_private *ap, struct tx_desc *desc, u64 addr, 2379 2379 - u32 flagsize, u32 vlan_tag) 2380 2380 - { 2381 2381 - #if !USE_TX_COAL_NOW 2382 2382 - flagsize &= ~BD_FLG_COAL_NOW; 2383 2383 - #endif 2384 2384 - 2385 2385 - if (ACE_IS_TIGON_I(ap)) { 2386 2386 - struct tx_desc __iomem *io = (__force struct tx_desc __iomem *) desc; 2387 2387 - writel(addr >> 32, &io->addr.addrhi); 2388 2388 - writel(addr & 0xffffffff, &io->addr.addrlo); 2389 2389 - writel(flagsize, &io->flagsize); 2390 2390 - writel(vlan_tag, &io->vlanres); 2391 2391 - } else { 2392 2392 - desc->addr.addrhi = addr >> 32; 2393 2393 - desc->addr.addrlo = addr; 2394 2394 - desc->flagsize = flagsize; 2395 2395 - desc->vlanres = vlan_tag; 2396 2396 - } 2397 2397 - } 2398 2398 - 2399 2399 - 2400 2400 - static netdev_tx_t ace_start_xmit(struct sk_buff *skb, 2401 2401 - struct net_device *dev) 2402 2402 - { 2403 2403 - struct ace_private *ap = netdev_priv(dev); 2404 2404 - struct ace_regs __iomem *regs = ap->regs; 2405 2405 - struct tx_desc *desc; 2406 2406 - u32 idx, flagsize; 2407 2407 - unsigned long maxjiff = jiffies + 3*HZ; 2408 2408 - 2409 2409 - restart: 2410 2410 - idx = ap->tx_prd; 2411 2411 - 2412 2412 - if (tx_ring_full(ap, ap->tx_ret_csm, idx)) 2413 2413 - goto overflow; 2414 2414 - 2415 2415 - if (!skb_shinfo(skb)->nr_frags) { 2416 2416 - dma_addr_t mapping; 2417 2417 - u32 vlan_tag = 0; 2418 2418 - 2419 2419 - mapping = ace_map_tx_skb(ap, skb, skb, idx); 2420 2420 - flagsize = (skb->len << 16) | (BD_FLG_END); 2421 2421 - if (skb->ip_summed == CHECKSUM_PARTIAL) 2422 2422 - flagsize |= BD_FLG_TCP_UDP_SUM; 2423 2423 - if (skb_vlan_tag_present(skb)) { 2424 2424 - flagsize |= BD_FLG_VLAN_TAG; 2425 2425 - vlan_tag = skb_vlan_tag_get(skb); 2426 2426 - } 2427 2427 - desc = ap->tx_ring + idx; 2428 2428 - idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap); 2429 2429 - 2430 2430 - /* Look at ace_tx_int for explanations. */ 2431 2431 - if (tx_ring_full(ap, ap->tx_ret_csm, idx)) 2432 2432 - flagsize |= BD_FLG_COAL_NOW; 2433 2433 - 2434 2434 - ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag); 2435 2435 - } else { 2436 2436 - dma_addr_t mapping; 2437 2437 - u32 vlan_tag = 0; 2438 2438 - int i; 2439 2439 - 2440 2440 - mapping = ace_map_tx_skb(ap, skb, NULL, idx); 2441 2441 - flagsize = (skb_headlen(skb) << 16); 2442 2442 - if (skb->ip_summed == CHECKSUM_PARTIAL) 2443 2443 - flagsize |= BD_FLG_TCP_UDP_SUM; 2444 2444 - if (skb_vlan_tag_present(skb)) { 2445 2445 - flagsize |= BD_FLG_VLAN_TAG; 2446 2446 - vlan_tag = skb_vlan_tag_get(skb); 2447 2447 - } 2448 2448 - 2449 2449 - ace_load_tx_bd(ap, ap->tx_ring + idx, mapping, flagsize, vlan_tag); 2450 2450 - 2451 2451 - idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap); 2452 2452 - 2453 2453 - for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 2454 2454 - const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; 2455 2455 - struct tx_ring_info *info; 2456 2456 - 2457 2457 - info = ap->skb->tx_skbuff + idx; 2458 2458 - desc = ap->tx_ring + idx; 2459 2459 - 2460 2460 - mapping = skb_frag_dma_map(&ap->pdev->dev, frag, 0, 2461 2461 - skb_frag_size(frag), 2462 2462 - DMA_TO_DEVICE); 2463 2463 - 2464 2464 - flagsize = skb_frag_size(frag) << 16; 2465 2465 - if (skb->ip_summed == CHECKSUM_PARTIAL) 2466 2466 - flagsize |= BD_FLG_TCP_UDP_SUM; 2467 2467 - idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap); 2468 2468 - 2469 2469 - if (i == skb_shinfo(skb)->nr_frags - 1) { 2470 2470 - flagsize |= BD_FLG_END; 2471 2471 - if (tx_ring_full(ap, ap->tx_ret_csm, idx)) 2472 2472 - flagsize |= BD_FLG_COAL_NOW; 2473 2473 - 2474 2474 - /* 2475 2475 - * Only the last fragment frees 2476 2476 - * the skb! 2477 2477 - */ 2478 2478 - info->skb = skb; 2479 2479 - } else { 2480 2480 - info->skb = NULL; 2481 2481 - } 2482 2482 - dma_unmap_addr_set(info, mapping, mapping); 2483 2483 - dma_unmap_len_set(info, maplen, skb_frag_size(frag)); 2484 2484 - ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag); 2485 2485 - } 2486 2486 - } 2487 2487 - 2488 2488 - wmb(); 2489 2489 - ap->tx_prd = idx; 2490 2490 - ace_set_txprd(regs, ap, idx); 2491 2491 - 2492 2492 - if (flagsize & BD_FLG_COAL_NOW) { 2493 2493 - netif_stop_queue(dev); 2494 2494 - 2495 2495 - /* 2496 2496 - * A TX-descriptor producer (an IRQ) might have gotten 2497 2497 - * between, making the ring free again. Since xmit is 2498 2498 - * serialized, this is the only situation we have to 2499 2499 - * re-test. 2500 2500 - */ 2501 2501 - if (!tx_ring_full(ap, ap->tx_ret_csm, idx)) 2502 2502 - netif_wake_queue(dev); 2503 2503 - } 2504 2504 - 2505 2505 - return NETDEV_TX_OK; 2506 2506 - 2507 2507 - overflow: 2508 2508 - /* 2509 2509 - * This race condition is unavoidable with lock-free drivers. 2510 2510 - * We wake up the queue _before_ tx_prd is advanced, so that we can 2511 2511 - * enter hard_start_xmit too early, while tx ring still looks closed. 2512 2512 - * This happens ~1-4 times per 100000 packets, so that we can allow 2513 2513 - * to loop syncing to other CPU. Probably, we need an additional 2514 2514 - * wmb() in ace_tx_intr as well. 2515 2515 - * 2516 2516 - * Note that this race is relieved by reserving one more entry 2517 2517 - * in tx ring than it is necessary (see original non-SG driver). 2518 2518 - * However, with SG we need to reserve 2*MAX_SKB_FRAGS+1, which 2519 2519 - * is already overkill. 2520 2520 - * 2521 2521 - * Alternative is to return with 1 not throttling queue. In this 2522 2522 - * case loop becomes longer, no more useful effects. 2523 2523 - */ 2524 2524 - if (time_before(jiffies, maxjiff)) { 2525 2525 - barrier(); 2526 2526 - cpu_relax(); 2527 2527 - goto restart; 2528 2528 - } 2529 2529 - 2530 2530 - /* The ring is stuck full. */ 2531 2531 - printk(KERN_WARNING "%s: Transmit ring stuck full\n", dev->name); 2532 2532 - return NETDEV_TX_BUSY; 2533 2533 - } 2534 2534 - 2535 2535 - 2536 2536 - static int ace_change_mtu(struct net_device *dev, int new_mtu) 2537 2537 - { 2538 2538 - struct ace_private *ap = netdev_priv(dev); 2539 2539 - struct ace_regs __iomem *regs = ap->regs; 2540 2540 - 2541 2541 - writel(new_mtu + ETH_HLEN + 4, &regs->IfMtu); 2542 2542 - WRITE_ONCE(dev->mtu, new_mtu); 2543 2543 - 2544 2544 - if (new_mtu > ACE_STD_MTU) { 2545 2545 - if (!(ap->jumbo)) { 2546 2546 - printk(KERN_INFO "%s: Enabling Jumbo frame " 2547 2547 - "support\n", dev->name); 2548 2548 - ap->jumbo = 1; 2549 2549 - if (!test_and_set_bit(0, &ap->jumbo_refill_busy)) 2550 2550 - ace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE); 2551 2551 - ace_set_rxtx_parms(dev, 1); 2552 2552 - } 2553 2553 - } else { 2554 2554 - while (test_and_set_bit(0, &ap->jumbo_refill_busy)); 2555 2555 - ace_sync_irq(dev->irq); 2556 2556 - ace_set_rxtx_parms(dev, 0); 2557 2557 - if (ap->jumbo) { 2558 2558 - struct cmd cmd; 2559 2559 - 2560 2560 - cmd.evt = C_RESET_JUMBO_RNG; 2561 2561 - cmd.code = 0; 2562 2562 - cmd.idx = 0; 2563 2563 - ace_issue_cmd(regs, &cmd); 2564 2564 - } 2565 2565 - } 2566 2566 - 2567 2567 - return 0; 2568 2568 - } 2569 2569 - 2570 2570 - static int ace_get_link_ksettings(struct net_device *dev, 2571 2571 - struct ethtool_link_ksettings *cmd) 2572 2572 - { 2573 2573 - struct ace_private *ap = netdev_priv(dev); 2574 2574 - struct ace_regs __iomem *regs = ap->regs; 2575 2575 - u32 link; 2576 2576 - u32 supported; 2577 2577 - 2578 2578 - memset(cmd, 0, sizeof(struct ethtool_link_ksettings)); 2579 2579 - 2580 2580 - supported = (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | 2581 2581 - SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | 2582 2582 - SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full | 2583 2583 - SUPPORTED_Autoneg | SUPPORTED_FIBRE); 2584 2584 - 2585 2585 - cmd->base.port = PORT_FIBRE; 2586 2586 - 2587 2587 - link = readl(&regs->GigLnkState); 2588 2588 - if (link & LNK_1000MB) { 2589 2589 - cmd->base.speed = SPEED_1000; 2590 2590 - } else { 2591 2591 - link = readl(&regs->FastLnkState); 2592 2592 - if (link & LNK_100MB) 2593 2593 - cmd->base.speed = SPEED_100; 2594 2594 - else if (link & LNK_10MB) 2595 2595 - cmd->base.speed = SPEED_10; 2596 2596 - else 2597 2597 - cmd->base.speed = 0; 2598 2598 - } 2599 2599 - if (link & LNK_FULL_DUPLEX) 2600 2600 - cmd->base.duplex = DUPLEX_FULL; 2601 2601 - else 2602 2602 - cmd->base.duplex = DUPLEX_HALF; 2603 2603 - 2604 2604 - if (link & LNK_NEGOTIATE) 2605 2605 - cmd->base.autoneg = AUTONEG_ENABLE; 2606 2606 - else 2607 2607 - cmd->base.autoneg = AUTONEG_DISABLE; 2608 2608 - 2609 2609 - #if 0 2610 2610 - /* 2611 2611 - * Current struct ethtool_cmd is insufficient 2612 2612 - */ 2613 2613 - ecmd->trace = readl(&regs->TuneTrace); 2614 2614 - 2615 2615 - ecmd->txcoal = readl(&regs->TuneTxCoalTicks); 2616 2616 - ecmd->rxcoal = readl(&regs->TuneRxCoalTicks); 2617 2617 - #endif 2618 2618 - 2619 2619 - ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, 2620 2620 - supported); 2621 2621 - 2622 2622 - return 0; 2623 2623 - } 2624 2624 - 2625 2625 - static int ace_set_link_ksettings(struct net_device *dev, 2626 2626 - const struct ethtool_link_ksettings *cmd) 2627 2627 - { 2628 2628 - struct ace_private *ap = netdev_priv(dev); 2629 2629 - struct ace_regs __iomem *regs = ap->regs; 2630 2630 - u32 link, speed; 2631 2631 - 2632 2632 - link = readl(&regs->GigLnkState); 2633 2633 - if (link & LNK_1000MB) 2634 2634 - speed = SPEED_1000; 2635 2635 - else { 2636 2636 - link = readl(&regs->FastLnkState); 2637 2637 - if (link & LNK_100MB) 2638 2638 - speed = SPEED_100; 2639 2639 - else if (link & LNK_10MB) 2640 2640 - speed = SPEED_10; 2641 2641 - else 2642 2642 - speed = SPEED_100; 2643 2643 - } 2644 2644 - 2645 2645 - link = LNK_ENABLE | LNK_1000MB | LNK_100MB | LNK_10MB | 2646 2646 - LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL; 2647 2647 - if (!ACE_IS_TIGON_I(ap)) 2648 2648 - link |= LNK_TX_FLOW_CTL_Y; 2649 2649 - if (cmd->base.autoneg == AUTONEG_ENABLE) 2650 2650 - link |= LNK_NEGOTIATE; 2651 2651 - if (cmd->base.speed != speed) { 2652 2652 - link &= ~(LNK_1000MB | LNK_100MB | LNK_10MB); 2653 2653 - switch (cmd->base.speed) { 2654 2654 - case SPEED_1000: 2655 2655 - link |= LNK_1000MB; 2656 2656 - break; 2657 2657 - case SPEED_100: 2658 2658 - link |= LNK_100MB; 2659 2659 - break; 2660 2660 - case SPEED_10: 2661 2661 - link |= LNK_10MB; 2662 2662 - break; 2663 2663 - } 2664 2664 - } 2665 2665 - 2666 2666 - if (cmd->base.duplex == DUPLEX_FULL) 2667 2667 - link |= LNK_FULL_DUPLEX; 2668 2668 - 2669 2669 - if (link != ap->link) { 2670 2670 - struct cmd cmd; 2671 2671 - printk(KERN_INFO "%s: Renegotiating link state\n", 2672 2672 - dev->name); 2673 2673 - 2674 2674 - ap->link = link; 2675 2675 - writel(link, &regs->TuneLink); 2676 2676 - if (!ACE_IS_TIGON_I(ap)) 2677 2677 - writel(link, &regs->TuneFastLink); 2678 2678 - wmb(); 2679 2679 - 2680 2680 - cmd.evt = C_LNK_NEGOTIATION; 2681 2681 - cmd.code = 0; 2682 2682 - cmd.idx = 0; 2683 2683 - ace_issue_cmd(regs, &cmd); 2684 2684 - } 2685 2685 - return 0; 2686 2686 - } 2687 2687 - 2688 2688 - static void ace_get_drvinfo(struct net_device *dev, 2689 2689 - struct ethtool_drvinfo *info) 2690 2690 - { 2691 2691 - struct ace_private *ap = netdev_priv(dev); 2692 2692 - 2693 2693 - strscpy(info->driver, "acenic", sizeof(info->driver)); 2694 2694 - snprintf(info->fw_version, sizeof(info->version), "%i.%i.%i", 2695 2695 - ap->firmware_major, ap->firmware_minor, ap->firmware_fix); 2696 2696 - 2697 2697 - if (ap->pdev) 2698 2698 - strscpy(info->bus_info, pci_name(ap->pdev), 2699 2699 - sizeof(info->bus_info)); 2700 2700 - 2701 2701 - } 2702 2702 - 2703 2703 - /* 2704 2704 - * Set the hardware MAC address. 2705 2705 - */ 2706 2706 - static int ace_set_mac_addr(struct net_device *dev, void *p) 2707 2707 - { 2708 2708 - struct ace_private *ap = netdev_priv(dev); 2709 2709 - struct ace_regs __iomem *regs = ap->regs; 2710 2710 - struct sockaddr *addr=p; 2711 2711 - const u8 *da; 2712 2712 - struct cmd cmd; 2713 2713 - 2714 2714 - if(netif_running(dev)) 2715 2715 - return -EBUSY; 2716 2716 - 2717 2717 - eth_hw_addr_set(dev, addr->sa_data); 2718 2718 - 2719 2719 - da = (const u8 *)dev->dev_addr; 2720 2720 - 2721 2721 - writel(da[0] << 8 | da[1], &regs->MacAddrHi); 2722 2722 - writel((da[2] << 24) | (da[3] << 16) | (da[4] << 8) | da[5], 2723 2723 - &regs->MacAddrLo); 2724 2724 - 2725 2725 - cmd.evt = C_SET_MAC_ADDR; 2726 2726 - cmd.code = 0; 2727 2727 - cmd.idx = 0; 2728 2728 - ace_issue_cmd(regs, &cmd); 2729 2729 - 2730 2730 - return 0; 2731 2731 - } 2732 2732 - 2733 2733 - 2734 2734 - static void ace_set_multicast_list(struct net_device *dev) 2735 2735 - { 2736 2736 - struct ace_private *ap = netdev_priv(dev); 2737 2737 - struct ace_regs __iomem *regs = ap->regs; 2738 2738 - struct cmd cmd; 2739 2739 - 2740 2740 - if ((dev->flags & IFF_ALLMULTI) && !(ap->mcast_all)) { 2741 2741 - cmd.evt = C_SET_MULTICAST_MODE; 2742 2742 - cmd.code = C_C_MCAST_ENABLE; 2743 2743 - cmd.idx = 0; 2744 2744 - ace_issue_cmd(regs, &cmd); 2745 2745 - ap->mcast_all = 1; 2746 2746 - } else if (ap->mcast_all) { 2747 2747 - cmd.evt = C_SET_MULTICAST_MODE; 2748 2748 - cmd.code = C_C_MCAST_DISABLE; 2749 2749 - cmd.idx = 0; 2750 2750 - ace_issue_cmd(regs, &cmd); 2751 2751 - ap->mcast_all = 0; 2752 2752 - } 2753 2753 - 2754 2754 - if ((dev->flags & IFF_PROMISC) && !(ap->promisc)) { 2755 2755 - cmd.evt = C_SET_PROMISC_MODE; 2756 2756 - cmd.code = C_C_PROMISC_ENABLE; 2757 2757 - cmd.idx = 0; 2758 2758 - ace_issue_cmd(regs, &cmd); 2759 2759 - ap->promisc = 1; 2760 2760 - }else if (!(dev->flags & IFF_PROMISC) && (ap->promisc)) { 2761 2761 - cmd.evt = C_SET_PROMISC_MODE; 2762 2762 - cmd.code = C_C_PROMISC_DISABLE; 2763 2763 - cmd.idx = 0; 2764 2764 - ace_issue_cmd(regs, &cmd); 2765 2765 - ap->promisc = 0; 2766 2766 - } 2767 2767 - 2768 2768 - /* 2769 2769 - * For the time being multicast relies on the upper layers 2770 2770 - * filtering it properly. The Firmware does not allow one to 2771 2771 - * set the entire multicast list at a time and keeping track of 2772 2772 - * it here is going to be messy. 2773 2773 - */ 2774 2774 - if (!netdev_mc_empty(dev) && !ap->mcast_all) { 2775 2775 - cmd.evt = C_SET_MULTICAST_MODE; 2776 2776 - cmd.code = C_C_MCAST_ENABLE; 2777 2777 - cmd.idx = 0; 2778 2778 - ace_issue_cmd(regs, &cmd); 2779 2779 - }else if (!ap->mcast_all) { 2780 2780 - cmd.evt = C_SET_MULTICAST_MODE; 2781 2781 - cmd.code = C_C_MCAST_DISABLE; 2782 2782 - cmd.idx = 0; 2783 2783 - ace_issue_cmd(regs, &cmd); 2784 2784 - } 2785 2785 - } 2786 2786 - 2787 2787 - 2788 2788 - static struct net_device_stats *ace_get_stats(struct net_device *dev) 2789 2789 - { 2790 2790 - struct ace_private *ap = netdev_priv(dev); 2791 2791 - struct ace_mac_stats __iomem *mac_stats = 2792 2792 - (struct ace_mac_stats __iomem *)ap->regs->Stats; 2793 2793 - 2794 2794 - dev->stats.rx_missed_errors = readl(&mac_stats->drop_space); 2795 2795 - dev->stats.multicast = readl(&mac_stats->kept_mc); 2796 2796 - dev->stats.collisions = readl(&mac_stats->coll); 2797 2797 - 2798 2798 - return &dev->stats; 2799 2799 - } 2800 2800 - 2801 2801 - 2802 2802 - static void ace_copy(struct ace_regs __iomem *regs, const __be32 *src, 2803 2803 - u32 dest, int size) 2804 2804 - { 2805 2805 - void __iomem *tdest; 2806 2806 - short tsize, i; 2807 2807 - 2808 2808 - if (size <= 0) 2809 2809 - return; 2810 2810 - 2811 2811 - while (size > 0) { 2812 2812 - tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1), 2813 2813 - min_t(u32, size, ACE_WINDOW_SIZE)); 2814 2814 - tdest = (void __iomem *) &regs->Window + 2815 2815 - (dest & (ACE_WINDOW_SIZE - 1)); 2816 2816 - writel(dest & ~(ACE_WINDOW_SIZE - 1), &regs->WinBase); 2817 2817 - for (i = 0; i < (tsize / 4); i++) { 2818 2818 - /* Firmware is big-endian */ 2819 2819 - writel(be32_to_cpup(src), tdest); 2820 2820 - src++; 2821 2821 - tdest += 4; 2822 2822 - dest += 4; 2823 2823 - size -= 4; 2824 2824 - } 2825 2825 - } 2826 2826 - } 2827 2827 - 2828 2828 - 2829 2829 - static void ace_clear(struct ace_regs __iomem *regs, u32 dest, int size) 2830 2830 - { 2831 2831 - void __iomem *tdest; 2832 2832 - short tsize = 0, i; 2833 2833 - 2834 2834 - if (size <= 0) 2835 2835 - return; 2836 2836 - 2837 2837 - while (size > 0) { 2838 2838 - tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1), 2839 2839 - min_t(u32, size, ACE_WINDOW_SIZE)); 2840 2840 - tdest = (void __iomem *) &regs->Window + 2841 2841 - (dest & (ACE_WINDOW_SIZE - 1)); 2842 2842 - writel(dest & ~(ACE_WINDOW_SIZE - 1), &regs->WinBase); 2843 2843 - 2844 2844 - for (i = 0; i < (tsize / 4); i++) { 2845 2845 - writel(0, tdest + i*4); 2846 2846 - } 2847 2847 - 2848 2848 - dest += tsize; 2849 2849 - size -= tsize; 2850 2850 - } 2851 2851 - } 2852 2852 - 2853 2853 - 2854 2854 - /* 2855 2855 - * Download the firmware into the SRAM on the NIC 2856 2856 - * 2857 2857 - * This operation requires the NIC to be halted and is performed with 2858 2858 - * interrupts disabled and with the spinlock hold. 2859 2859 - */ 2860 2860 - static int ace_load_firmware(struct net_device *dev) 2861 2861 - { 2862 2862 - const struct firmware *fw; 2863 2863 - const char *fw_name = "acenic/tg2.bin"; 2864 2864 - struct ace_private *ap = netdev_priv(dev); 2865 2865 - struct ace_regs __iomem *regs = ap->regs; 2866 2866 - const __be32 *fw_data; 2867 2867 - u32 load_addr; 2868 2868 - int ret; 2869 2869 - 2870 2870 - if (!(readl(&regs->CpuCtrl) & CPU_HALTED)) { 2871 2871 - printk(KERN_ERR "%s: trying to download firmware while the " 2872 2872 - "CPU is running!\n", ap->name); 2873 2873 - return -EFAULT; 2874 2874 - } 2875 2875 - 2876 2876 - if (ACE_IS_TIGON_I(ap)) 2877 2877 - fw_name = "acenic/tg1.bin"; 2878 2878 - 2879 2879 - ret = request_firmware(&fw, fw_name, &ap->pdev->dev); 2880 2880 - if (ret) { 2881 2881 - printk(KERN_ERR "%s: Failed to load firmware \"%s\"\n", 2882 2882 - ap->name, fw_name); 2883 2883 - return ret; 2884 2884 - } 2885 2885 - 2886 2886 - fw_data = (void *)fw->data; 2887 2887 - 2888 2888 - /* Firmware blob starts with version numbers, followed by 2889 2889 - load and start address. Remainder is the blob to be loaded 2890 2890 - contiguously from load address. We don't bother to represent 2891 2891 - the BSS/SBSS sections any more, since we were clearing the 2892 2892 - whole thing anyway. */ 2893 2893 - ap->firmware_major = fw->data[0]; 2894 2894 - ap->firmware_minor = fw->data[1]; 2895 2895 - ap->firmware_fix = fw->data[2]; 2896 2896 - 2897 2897 - ap->firmware_start = be32_to_cpu(fw_data[1]); 2898 2898 - if (ap->firmware_start < 0x4000 || ap->firmware_start >= 0x80000) { 2899 2899 - printk(KERN_ERR "%s: bogus load address %08x in \"%s\"\n", 2900 2900 - ap->name, ap->firmware_start, fw_name); 2901 2901 - ret = -EINVAL; 2902 2902 - goto out; 2903 2903 - } 2904 2904 - 2905 2905 - load_addr = be32_to_cpu(fw_data[2]); 2906 2906 - if (load_addr < 0x4000 || load_addr >= 0x80000) { 2907 2907 - printk(KERN_ERR "%s: bogus load address %08x in \"%s\"\n", 2908 2908 - ap->name, load_addr, fw_name); 2909 2909 - ret = -EINVAL; 2910 2910 - goto out; 2911 2911 - } 2912 2912 - 2913 2913 - /* 2914 2914 - * Do not try to clear more than 512KiB or we end up seeing 2915 2915 - * funny things on NICs with only 512KiB SRAM 2916 2916 - */ 2917 2917 - ace_clear(regs, 0x2000, 0x80000-0x2000); 2918 2918 - ace_copy(regs, &fw_data[3], load_addr, fw->size-12); 2919 2919 - out: 2920 2920 - release_firmware(fw); 2921 2921 - return ret; 2922 2922 - } 2923 2923 - 2924 2924 - 2925 2925 - /* 2926 2926 - * The eeprom on the AceNIC is an Atmel i2c EEPROM. 2927 2927 - * 2928 2928 - * Accessing the EEPROM is `interesting' to say the least - don't read 2929 2929 - * this code right after dinner. 2930 2930 - * 2931 2931 - * This is all about black magic and bit-banging the device .... I 2932 2932 - * wonder in what hospital they have put the guy who designed the i2c 2933 2933 - * specs. 2934 2934 - * 2935 2935 - * Oh yes, this is only the beginning! 2936 2936 - * 2937 2937 - * Thanks to Stevarino Webinski for helping tracking down the bugs in the 2938 2938 - * code i2c readout code by beta testing all my hacks. 2939 2939 - */ 2940 2940 - static void eeprom_start(struct ace_regs __iomem *regs) 2941 2941 - { 2942 2942 - u32 local; 2943 2943 - 2944 2944 - readl(&regs->LocalCtrl); 2945 2945 - udelay(ACE_SHORT_DELAY); 2946 2946 - local = readl(&regs->LocalCtrl); 2947 2947 - local |= EEPROM_DATA_OUT | EEPROM_WRITE_ENABLE; 2948 2948 - writel(local, &regs->LocalCtrl); 2949 2949 - readl(&regs->LocalCtrl); 2950 2950 - mb(); 2951 2951 - udelay(ACE_SHORT_DELAY); 2952 2952 - local |= EEPROM_CLK_OUT; 2953 2953 - writel(local, &regs->LocalCtrl); 2954 2954 - readl(&regs->LocalCtrl); 2955 2955 - mb(); 2956 2956 - udelay(ACE_SHORT_DELAY); 2957 2957 - local &= ~EEPROM_DATA_OUT; 2958 2958 - writel(local, &regs->LocalCtrl); 2959 2959 - readl(&regs->LocalCtrl); 2960 2960 - mb(); 2961 2961 - udelay(ACE_SHORT_DELAY); 2962 2962 - local &= ~EEPROM_CLK_OUT; 2963 2963 - writel(local, &regs->LocalCtrl); 2964 2964 - readl(&regs->LocalCtrl); 2965 2965 - mb(); 2966 2966 - } 2967 2967 - 2968 2968 - 2969 2969 - static void eeprom_prep(struct ace_regs __iomem *regs, u8 magic) 2970 2970 - { 2971 2971 - short i; 2972 2972 - u32 local; 2973 2973 - 2974 2974 - udelay(ACE_SHORT_DELAY); 2975 2975 - local = readl(&regs->LocalCtrl); 2976 2976 - local &= ~EEPROM_DATA_OUT; 2977 2977 - local |= EEPROM_WRITE_ENABLE; 2978 2978 - writel(local, &regs->LocalCtrl); 2979 2979 - readl(&regs->LocalCtrl); 2980 2980 - mb(); 2981 2981 - 2982 2982 - for (i = 0; i < 8; i++, magic <<= 1) { 2983 2983 - udelay(ACE_SHORT_DELAY); 2984 2984 - if (magic & 0x80) 2985 2985 - local |= EEPROM_DATA_OUT; 2986 2986 - else 2987 2987 - local &= ~EEPROM_DATA_OUT; 2988 2988 - writel(local, &regs->LocalCtrl); 2989 2989 - readl(&regs->LocalCtrl); 2990 2990 - mb(); 2991 2991 - 2992 2992 - udelay(ACE_SHORT_DELAY); 2993 2993 - local |= EEPROM_CLK_OUT; 2994 2994 - writel(local, &regs->LocalCtrl); 2995 2995 - readl(&regs->LocalCtrl); 2996 2996 - mb(); 2997 2997 - udelay(ACE_SHORT_DELAY); 2998 2998 - local &= ~(EEPROM_CLK_OUT | EEPROM_DATA_OUT); 2999 2999 - writel(local, &regs->LocalCtrl); 3000 3000 - readl(&regs->LocalCtrl); 3001 3001 - mb(); 3002 3002 - } 3003 3003 - } 3004 3004 - 3005 3005 - 3006 3006 - static int eeprom_check_ack(struct ace_regs __iomem *regs) 3007 3007 - { 3008 3008 - int state; 3009 3009 - u32 local; 3010 3010 - 3011 3011 - local = readl(&regs->LocalCtrl); 3012 3012 - local &= ~EEPROM_WRITE_ENABLE; 3013 3013 - writel(local, &regs->LocalCtrl); 3014 3014 - readl(&regs->LocalCtrl); 3015 3015 - mb(); 3016 3016 - udelay(ACE_LONG_DELAY); 3017 3017 - local |= EEPROM_CLK_OUT; 3018 3018 - writel(local, &regs->LocalCtrl); 3019 3019 - readl(&regs->LocalCtrl); 3020 3020 - mb(); 3021 3021 - udelay(ACE_SHORT_DELAY); 3022 3022 - /* sample data in middle of high clk */ 3023 3023 - state = (readl(&regs->LocalCtrl) & EEPROM_DATA_IN) != 0; 3024 3024 - udelay(ACE_SHORT_DELAY); 3025 3025 - mb(); 3026 3026 - writel(readl(&regs->LocalCtrl) & ~EEPROM_CLK_OUT, &regs->LocalCtrl); 3027 3027 - readl(&regs->LocalCtrl); 3028 3028 - mb(); 3029 3029 - 3030 3030 - return state; 3031 3031 - } 3032 3032 - 3033 3033 - 3034 3034 - static void eeprom_stop(struct ace_regs __iomem *regs) 3035 3035 - { 3036 3036 - u32 local; 3037 3037 - 3038 3038 - udelay(ACE_SHORT_DELAY); 3039 3039 - local = readl(&regs->LocalCtrl); 3040 3040 - local |= EEPROM_WRITE_ENABLE; 3041 3041 - writel(local, &regs->LocalCtrl); 3042 3042 - readl(&regs->LocalCtrl); 3043 3043 - mb(); 3044 3044 - udelay(ACE_SHORT_DELAY); 3045 3045 - local &= ~EEPROM_DATA_OUT; 3046 3046 - writel(local, &regs->LocalCtrl); 3047 3047 - readl(&regs->LocalCtrl); 3048 3048 - mb(); 3049 3049 - udelay(ACE_SHORT_DELAY); 3050 3050 - local |= EEPROM_CLK_OUT; 3051 3051 - writel(local, &regs->LocalCtrl); 3052 3052 - readl(&regs->LocalCtrl); 3053 3053 - mb(); 3054 3054 - udelay(ACE_SHORT_DELAY); 3055 3055 - local |= EEPROM_DATA_OUT; 3056 3056 - writel(local, &regs->LocalCtrl); 3057 3057 - readl(&regs->LocalCtrl); 3058 3058 - mb(); 3059 3059 - udelay(ACE_LONG_DELAY); 3060 3060 - local &= ~EEPROM_CLK_OUT; 3061 3061 - writel(local, &regs->LocalCtrl); 3062 3062 - mb(); 3063 3063 - } 3064 3064 - 3065 3065 - 3066 3066 - /* 3067 3067 - * Read a whole byte from the EEPROM. 3068 3068 - */ 3069 3069 - static int read_eeprom_byte(struct net_device *dev, unsigned long offset) 3070 3070 - { 3071 3071 - struct ace_private *ap = netdev_priv(dev); 3072 3072 - struct ace_regs __iomem *regs = ap->regs; 3073 3073 - unsigned long flags; 3074 3074 - u32 local; 3075 3075 - int result = 0; 3076 3076 - short i; 3077 3077 - 3078 3078 - /* 3079 3079 - * Don't take interrupts on this CPU will bit banging 3080 3080 - * the %#%#@$ I2C device 3081 3081 - */ 3082 3082 - local_irq_save(flags); 3083 3083 - 3084 3084 - eeprom_start(regs); 3085 3085 - 3086 3086 - eeprom_prep(regs, EEPROM_WRITE_SELECT); 3087 3087 - if (eeprom_check_ack(regs)) { 3088 3088 - local_irq_restore(flags); 3089 3089 - printk(KERN_ERR "%s: Unable to sync eeprom\n", ap->name); 3090 3090 - result = -EIO; 3091 3091 - goto eeprom_read_error; 3092 3092 - } 3093 3093 - 3094 3094 - eeprom_prep(regs, (offset >> 8) & 0xff); 3095 3095 - if (eeprom_check_ack(regs)) { 3096 3096 - local_irq_restore(flags); 3097 3097 - printk(KERN_ERR "%s: Unable to set address byte 0\n", 3098 3098 - ap->name); 3099 3099 - result = -EIO; 3100 3100 - goto eeprom_read_error; 3101 3101 - } 3102 3102 - 3103 3103 - eeprom_prep(regs, offset & 0xff); 3104 3104 - if (eeprom_check_ack(regs)) { 3105 3105 - local_irq_restore(flags); 3106 3106 - printk(KERN_ERR "%s: Unable to set address byte 1\n", 3107 3107 - ap->name); 3108 3108 - result = -EIO; 3109 3109 - goto eeprom_read_error; 3110 3110 - } 3111 3111 - 3112 3112 - eeprom_start(regs); 3113 3113 - eeprom_prep(regs, EEPROM_READ_SELECT); 3114 3114 - if (eeprom_check_ack(regs)) { 3115 3115 - local_irq_restore(flags); 3116 3116 - printk(KERN_ERR "%s: Unable to set READ_SELECT\n", 3117 3117 - ap->name); 3118 3118 - result = -EIO; 3119 3119 - goto eeprom_read_error; 3120 3120 - } 3121 3121 - 3122 3122 - for (i = 0; i < 8; i++) { 3123 3123 - local = readl(&regs->LocalCtrl); 3124 3124 - local &= ~EEPROM_WRITE_ENABLE; 3125 3125 - writel(local, &regs->LocalCtrl); 3126 3126 - readl(&regs->LocalCtrl); 3127 3127 - udelay(ACE_LONG_DELAY); 3128 3128 - mb(); 3129 3129 - local |= EEPROM_CLK_OUT; 3130 3130 - writel(local, &regs->LocalCtrl); 3131 3131 - readl(&regs->LocalCtrl); 3132 3132 - mb(); 3133 3133 - udelay(ACE_SHORT_DELAY); 3134 3134 - /* sample data mid high clk */ 3135 3135 - result = (result << 1) | 3136 3136 - ((readl(&regs->LocalCtrl) & EEPROM_DATA_IN) != 0); 3137 3137 - udelay(ACE_SHORT_DELAY); 3138 3138 - mb(); 3139 3139 - local = readl(&regs->LocalCtrl); 3140 3140 - local &= ~EEPROM_CLK_OUT; 3141 3141 - writel(local, &regs->LocalCtrl); 3142 3142 - readl(&regs->LocalCtrl); 3143 3143 - udelay(ACE_SHORT_DELAY); 3144 3144 - mb(); 3145 3145 - if (i == 7) { 3146 3146 - local |= EEPROM_WRITE_ENABLE; 3147 3147 - writel(local, &regs->LocalCtrl); 3148 3148 - readl(&regs->LocalCtrl); 3149 3149 - mb(); 3150 3150 - udelay(ACE_SHORT_DELAY); 3151 3151 - } 3152 3152 - } 3153 3153 - 3154 3154 - local |= EEPROM_DATA_OUT; 3155 3155 - writel(local, &regs->LocalCtrl); 3156 3156 - readl(&regs->LocalCtrl); 3157 3157 - mb(); 3158 3158 - udelay(ACE_SHORT_DELAY); 3159 3159 - writel(readl(&regs->LocalCtrl) | EEPROM_CLK_OUT, &regs->LocalCtrl); 3160 3160 - readl(&regs->LocalCtrl); 3161 3161 - udelay(ACE_LONG_DELAY); 3162 3162 - writel(readl(&regs->LocalCtrl) & ~EEPROM_CLK_OUT, &regs->LocalCtrl); 3163 3163 - readl(&regs->LocalCtrl); 3164 3164 - mb(); 3165 3165 - udelay(ACE_SHORT_DELAY); 3166 3166 - eeprom_stop(regs); 3167 3167 - 3168 3168 - local_irq_restore(flags); 3169 3169 - out: 3170 3170 - return result; 3171 3171 - 3172 3172 - eeprom_read_error: 3173 3173 - printk(KERN_ERR "%s: Unable to read eeprom byte 0x%02lx\n", 3174 3174 - ap->name, offset); 3175 3175 - goto out; 3176 3176 - } 3177 3177 - 3178 3178 - module_pci_driver(acenic_pci_driver);

-791

drivers/net/ethernet/alteon/acenic.h

reviewed

··· 1 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 2 - #ifndef _ACENIC_H_ 3 3 - #define _ACENIC_H_ 4 4 - #include <linux/interrupt.h> 5 5 - #include <linux/workqueue.h> 6 6 - 7 7 - /* 8 8 - * Generate TX index update each time, when TX ring is closed. 9 9 - * Normally, this is not useful, because results in more dma (and irqs 10 10 - * without TX_COAL_INTS_ONLY). 11 11 - */ 12 12 - #define USE_TX_COAL_NOW 0 13 13 - 14 14 - /* 15 15 - * Addressing: 16 16 - * 17 17 - * The Tigon uses 64-bit host addresses, regardless of their actual 18 18 - * length, and it expects a big-endian format. For 32 bit systems the 19 19 - * upper 32 bits of the address are simply ignored (zero), however for 20 20 - * little endian 64 bit systems (Alpha) this looks strange with the 21 21 - * two parts of the address word being swapped. 22 22 - * 23 23 - * The addresses are split in two 32 bit words for all architectures 24 24 - * as some of them are in PCI shared memory and it is necessary to use 25 25 - * readl/writel to access them. 26 26 - * 27 27 - * The addressing code is derived from Pete Wyckoff's work, but 28 28 - * modified to deal properly with readl/writel usage. 29 29 - */ 30 30 - 31 31 - struct ace_regs { 32 32 - u32 pad0[16]; /* PCI control registers */ 33 33 - 34 34 - u32 HostCtrl; /* 0x40 */ 35 35 - u32 LocalCtrl; 36 36 - 37 37 - u32 pad1[2]; 38 38 - 39 39 - u32 MiscCfg; /* 0x50 */ 40 40 - 41 41 - u32 pad2[2]; 42 42 - 43 43 - u32 PciState; 44 44 - 45 45 - u32 pad3[2]; /* 0x60 */ 46 46 - 47 47 - u32 WinBase; 48 48 - u32 WinData; 49 49 - 50 50 - u32 pad4[12]; /* 0x70 */ 51 51 - 52 52 - u32 DmaWriteState; /* 0xa0 */ 53 53 - u32 pad5[3]; 54 54 - u32 DmaReadState; /* 0xb0 */ 55 55 - 56 56 - u32 pad6[26]; 57 57 - 58 58 - u32 AssistState; 59 59 - 60 60 - u32 pad7[8]; /* 0x120 */ 61 61 - 62 62 - u32 CpuCtrl; /* 0x140 */ 63 63 - u32 Pc; 64 64 - 65 65 - u32 pad8[3]; 66 66 - 67 67 - u32 SramAddr; /* 0x154 */ 68 68 - u32 SramData; 69 69 - 70 70 - u32 pad9[49]; 71 71 - 72 72 - u32 MacRxState; /* 0x220 */ 73 73 - 74 74 - u32 pad10[7]; 75 75 - 76 76 - u32 CpuBCtrl; /* 0x240 */ 77 77 - u32 PcB; 78 78 - 79 79 - u32 pad11[3]; 80 80 - 81 81 - u32 SramBAddr; /* 0x254 */ 82 82 - u32 SramBData; 83 83 - 84 84 - u32 pad12[105]; 85 85 - 86 86 - u32 pad13[32]; /* 0x400 */ 87 87 - u32 Stats[32]; 88 88 - 89 89 - u32 Mb0Hi; /* 0x500 */ 90 90 - u32 Mb0Lo; 91 91 - u32 Mb1Hi; 92 92 - u32 CmdPrd; 93 93 - u32 Mb2Hi; 94 94 - u32 TxPrd; 95 95 - u32 Mb3Hi; 96 96 - u32 RxStdPrd; 97 97 - u32 Mb4Hi; 98 98 - u32 RxJumboPrd; 99 99 - u32 Mb5Hi; 100 100 - u32 RxMiniPrd; 101 101 - u32 Mb6Hi; 102 102 - u32 Mb6Lo; 103 103 - u32 Mb7Hi; 104 104 - u32 Mb7Lo; 105 105 - u32 Mb8Hi; 106 106 - u32 Mb8Lo; 107 107 - u32 Mb9Hi; 108 108 - u32 Mb9Lo; 109 109 - u32 MbAHi; 110 110 - u32 MbALo; 111 111 - u32 MbBHi; 112 112 - u32 MbBLo; 113 113 - u32 MbCHi; 114 114 - u32 MbCLo; 115 115 - u32 MbDHi; 116 116 - u32 MbDLo; 117 117 - u32 MbEHi; 118 118 - u32 MbELo; 119 119 - u32 MbFHi; 120 120 - u32 MbFLo; 121 121 - 122 122 - u32 pad14[32]; 123 123 - 124 124 - u32 MacAddrHi; /* 0x600 */ 125 125 - u32 MacAddrLo; 126 126 - u32 InfoPtrHi; 127 127 - u32 InfoPtrLo; 128 128 - u32 MultiCastHi; /* 0x610 */ 129 129 - u32 MultiCastLo; 130 130 - u32 ModeStat; 131 131 - u32 DmaReadCfg; 132 132 - u32 DmaWriteCfg; /* 0x620 */ 133 133 - u32 TxBufRat; 134 134 - u32 EvtCsm; 135 135 - u32 CmdCsm; 136 136 - u32 TuneRxCoalTicks;/* 0x630 */ 137 137 - u32 TuneTxCoalTicks; 138 138 - u32 TuneStatTicks; 139 139 - u32 TuneMaxTxDesc; 140 140 - u32 TuneMaxRxDesc; /* 0x640 */ 141 141 - u32 TuneTrace; 142 142 - u32 TuneLink; 143 143 - u32 TuneFastLink; 144 144 - u32 TracePtr; /* 0x650 */ 145 145 - u32 TraceStrt; 146 146 - u32 TraceLen; 147 147 - u32 IfIdx; 148 148 - u32 IfMtu; /* 0x660 */ 149 149 - u32 MaskInt; 150 150 - u32 GigLnkState; 151 151 - u32 FastLnkState; 152 152 - u32 pad16[4]; /* 0x670 */ 153 153 - u32 RxRetCsm; /* 0x680 */ 154 154 - 155 155 - u32 pad17[31]; 156 156 - 157 157 - u32 CmdRng[64]; /* 0x700 */ 158 158 - u32 Window[0x200]; 159 159 - }; 160 160 - 161 161 - 162 162 - typedef struct { 163 163 - u32 addrhi; 164 164 - u32 addrlo; 165 165 - } aceaddr; 166 166 - 167 167 - 168 168 - #define ACE_WINDOW_SIZE 0x800 169 169 - 170 170 - #define ACE_JUMBO_MTU 9000 171 171 - #define ACE_STD_MTU 1500 172 172 - 173 173 - #define ACE_TRACE_SIZE 0x8000 174 174 - 175 175 - /* 176 176 - * Host control register bits. 177 177 - */ 178 178 - 179 179 - #define IN_INT 0x01 180 180 - #define CLR_INT 0x02 181 181 - #define HW_RESET 0x08 182 182 - #define BYTE_SWAP 0x10 183 183 - #define WORD_SWAP 0x20 184 184 - #define MASK_INTS 0x40 185 185 - 186 186 - /* 187 187 - * Local control register bits. 188 188 - */ 189 189 - 190 190 - #define EEPROM_DATA_IN 0x800000 191 191 - #define EEPROM_DATA_OUT 0x400000 192 192 - #define EEPROM_WRITE_ENABLE 0x200000 193 193 - #define EEPROM_CLK_OUT 0x100000 194 194 - 195 195 - #define EEPROM_BASE 0xa0000000 196 196 - 197 197 - #define EEPROM_WRITE_SELECT 0xa0 198 198 - #define EEPROM_READ_SELECT 0xa1 199 199 - 200 200 - #define SRAM_BANK_512K 0x200 201 201 - 202 202 - 203 203 - /* 204 204 - * udelay() values for when clocking the eeprom 205 205 - */ 206 206 - #define ACE_SHORT_DELAY 2 207 207 - #define ACE_LONG_DELAY 4 208 208 - 209 209 - 210 210 - /* 211 211 - * Misc Config bits 212 212 - */ 213 213 - 214 214 - #define SYNC_SRAM_TIMING 0x100000 215 215 - 216 216 - 217 217 - /* 218 218 - * CPU state bits. 219 219 - */ 220 220 - 221 221 - #define CPU_RESET 0x01 222 222 - #define CPU_TRACE 0x02 223 223 - #define CPU_PROM_FAILED 0x10 224 224 - #define CPU_HALT 0x00010000 225 225 - #define CPU_HALTED 0xffff0000 226 226 - 227 227 - 228 228 - /* 229 229 - * PCI State bits. 230 230 - */ 231 231 - 232 232 - #define DMA_READ_MAX_4 0x04 233 233 - #define DMA_READ_MAX_16 0x08 234 234 - #define DMA_READ_MAX_32 0x0c 235 235 - #define DMA_READ_MAX_64 0x10 236 236 - #define DMA_READ_MAX_128 0x14 237 237 - #define DMA_READ_MAX_256 0x18 238 238 - #define DMA_READ_MAX_1K 0x1c 239 239 - #define DMA_WRITE_MAX_4 0x20 240 240 - #define DMA_WRITE_MAX_16 0x40 241 241 - #define DMA_WRITE_MAX_32 0x60 242 242 - #define DMA_WRITE_MAX_64 0x80 243 243 - #define DMA_WRITE_MAX_128 0xa0 244 244 - #define DMA_WRITE_MAX_256 0xc0 245 245 - #define DMA_WRITE_MAX_1K 0xe0 246 246 - #define DMA_READ_WRITE_MASK 0xfc 247 247 - #define MEM_READ_MULTIPLE 0x00020000 248 248 - #define PCI_66MHZ 0x00080000 249 249 - #define PCI_32BIT 0x00100000 250 250 - #define DMA_WRITE_ALL_ALIGN 0x00800000 251 251 - #define READ_CMD_MEM 0x06000000 252 252 - #define WRITE_CMD_MEM 0x70000000 253 253 - 254 254 - 255 255 - /* 256 256 - * Mode status 257 257 - */ 258 258 - 259 259 - #define ACE_BYTE_SWAP_BD 0x02 260 260 - #define ACE_WORD_SWAP_BD 0x04 /* not actually used */ 261 261 - #define ACE_WARN 0x08 262 262 - #define ACE_BYTE_SWAP_DMA 0x10 263 263 - #define ACE_NO_JUMBO_FRAG 0x200 264 264 - #define ACE_FATAL 0x40000000 265 265 - 266 266 - 267 267 - /* 268 268 - * DMA config 269 269 - */ 270 270 - 271 271 - #define DMA_THRESH_1W 0x10 272 272 - #define DMA_THRESH_2W 0x20 273 273 - #define DMA_THRESH_4W 0x40 274 274 - #define DMA_THRESH_8W 0x80 275 275 - #define DMA_THRESH_16W 0x100 276 276 - #define DMA_THRESH_32W 0x0 /* not described in doc, but exists. */ 277 277 - 278 278 - 279 279 - /* 280 280 - * Tuning parameters 281 281 - */ 282 282 - 283 283 - #define TICKS_PER_SEC 1000000 284 284 - 285 285 - 286 286 - /* 287 287 - * Link bits 288 288 - */ 289 289 - 290 290 - #define LNK_PREF 0x00008000 291 291 - #define LNK_10MB 0x00010000 292 292 - #define LNK_100MB 0x00020000 293 293 - #define LNK_1000MB 0x00040000 294 294 - #define LNK_FULL_DUPLEX 0x00080000 295 295 - #define LNK_HALF_DUPLEX 0x00100000 296 296 - #define LNK_TX_FLOW_CTL_Y 0x00200000 297 297 - #define LNK_NEG_ADVANCED 0x00400000 298 298 - #define LNK_RX_FLOW_CTL_Y 0x00800000 299 299 - #define LNK_NIC 0x01000000 300 300 - #define LNK_JAM 0x02000000 301 301 - #define LNK_JUMBO 0x04000000 302 302 - #define LNK_ALTEON 0x08000000 303 303 - #define LNK_NEG_FCTL 0x10000000 304 304 - #define LNK_NEGOTIATE 0x20000000 305 305 - #define LNK_ENABLE 0x40000000 306 306 - #define LNK_UP 0x80000000 307 307 - 308 308 - 309 309 - /* 310 310 - * Event definitions 311 311 - */ 312 312 - 313 313 - #define EVT_RING_ENTRIES 256 314 314 - #define EVT_RING_SIZE (EVT_RING_ENTRIES * sizeof(struct event)) 315 315 - 316 316 - struct event { 317 317 - #ifdef __LITTLE_ENDIAN_BITFIELD 318 318 - u32 idx:12; 319 319 - u32 code:12; 320 320 - u32 evt:8; 321 321 - #else 322 322 - u32 evt:8; 323 323 - u32 code:12; 324 324 - u32 idx:12; 325 325 - #endif 326 326 - u32 pad; 327 327 - }; 328 328 - 329 329 - 330 330 - /* 331 331 - * Events 332 332 - */ 333 333 - 334 334 - #define E_FW_RUNNING 0x01 335 335 - #define E_STATS_UPDATED 0x04 336 336 - 337 337 - #define E_STATS_UPDATE 0x04 338 338 - 339 339 - #define E_LNK_STATE 0x06 340 340 - #define E_C_LINK_UP 0x01 341 341 - #define E_C_LINK_DOWN 0x02 342 342 - #define E_C_LINK_10_100 0x03 343 343 - 344 344 - #define E_ERROR 0x07 345 345 - #define E_C_ERR_INVAL_CMD 0x01 346 346 - #define E_C_ERR_UNIMP_CMD 0x02 347 347 - #define E_C_ERR_BAD_CFG 0x03 348 348 - 349 349 - #define E_MCAST_LIST 0x08 350 350 - #define E_C_MCAST_ADDR_ADD 0x01 351 351 - #define E_C_MCAST_ADDR_DEL 0x02 352 352 - 353 353 - #define E_RESET_JUMBO_RNG 0x09 354 354 - 355 355 - 356 356 - /* 357 357 - * Commands 358 358 - */ 359 359 - 360 360 - #define CMD_RING_ENTRIES 64 361 361 - 362 362 - struct cmd { 363 363 - #ifdef __LITTLE_ENDIAN_BITFIELD 364 364 - u32 idx:12; 365 365 - u32 code:12; 366 366 - u32 evt:8; 367 367 - #else 368 368 - u32 evt:8; 369 369 - u32 code:12; 370 370 - u32 idx:12; 371 371 - #endif 372 372 - }; 373 373 - 374 374 - 375 375 - #define C_HOST_STATE 0x01 376 376 - #define C_C_STACK_UP 0x01 377 377 - #define C_C_STACK_DOWN 0x02 378 378 - 379 379 - #define C_FDR_FILTERING 0x02 380 380 - #define C_C_FDR_FILT_ENABLE 0x01 381 381 - #define C_C_FDR_FILT_DISABLE 0x02 382 382 - 383 383 - #define C_SET_RX_PRD_IDX 0x03 384 384 - #define C_UPDATE_STATS 0x04 385 385 - #define C_RESET_JUMBO_RNG 0x05 386 386 - #define C_ADD_MULTICAST_ADDR 0x08 387 387 - #define C_DEL_MULTICAST_ADDR 0x09 388 388 - 389 389 - #define C_SET_PROMISC_MODE 0x0a 390 390 - #define C_C_PROMISC_ENABLE 0x01 391 391 - #define C_C_PROMISC_DISABLE 0x02 392 392 - 393 393 - #define C_LNK_NEGOTIATION 0x0b 394 394 - #define C_C_NEGOTIATE_BOTH 0x00 395 395 - #define C_C_NEGOTIATE_GIG 0x01 396 396 - #define C_C_NEGOTIATE_10_100 0x02 397 397 - 398 398 - #define C_SET_MAC_ADDR 0x0c 399 399 - #define C_CLEAR_PROFILE 0x0d 400 400 - 401 401 - #define C_SET_MULTICAST_MODE 0x0e 402 402 - #define C_C_MCAST_ENABLE 0x01 403 403 - #define C_C_MCAST_DISABLE 0x02 404 404 - 405 405 - #define C_CLEAR_STATS 0x0f 406 406 - #define C_SET_RX_JUMBO_PRD_IDX 0x10 407 407 - #define C_REFRESH_STATS 0x11 408 408 - 409 409 - 410 410 - /* 411 411 - * Descriptor flags 412 412 - */ 413 413 - #define BD_FLG_TCP_UDP_SUM 0x01 414 414 - #define BD_FLG_IP_SUM 0x02 415 415 - #define BD_FLG_END 0x04 416 416 - #define BD_FLG_MORE 0x08 417 417 - #define BD_FLG_JUMBO 0x10 418 418 - #define BD_FLG_UCAST 0x20 419 419 - #define BD_FLG_MCAST 0x40 420 420 - #define BD_FLG_BCAST 0x60 421 421 - #define BD_FLG_TYP_MASK 0x60 422 422 - #define BD_FLG_IP_FRAG 0x80 423 423 - #define BD_FLG_IP_FRAG_END 0x100 424 424 - #define BD_FLG_VLAN_TAG 0x200 425 425 - #define BD_FLG_FRAME_ERROR 0x400 426 426 - #define BD_FLG_COAL_NOW 0x800 427 427 - #define BD_FLG_MINI 0x1000 428 428 - 429 429 - 430 430 - /* 431 431 - * Ring Control block flags 432 432 - */ 433 433 - #define RCB_FLG_TCP_UDP_SUM 0x01 434 434 - #define RCB_FLG_IP_SUM 0x02 435 435 - #define RCB_FLG_NO_PSEUDO_HDR 0x08 436 436 - #define RCB_FLG_VLAN_ASSIST 0x10 437 437 - #define RCB_FLG_COAL_INT_ONLY 0x20 438 438 - #define RCB_FLG_TX_HOST_RING 0x40 439 439 - #define RCB_FLG_IEEE_SNAP_SUM 0x80 440 440 - #define RCB_FLG_EXT_RX_BD 0x100 441 441 - #define RCB_FLG_RNG_DISABLE 0x200 442 442 - 443 443 - 444 444 - /* 445 445 - * TX ring - maximum TX ring entries for Tigon I's is 128 446 446 - */ 447 447 - #define MAX_TX_RING_ENTRIES 256 448 448 - #define TIGON_I_TX_RING_ENTRIES 128 449 449 - #define TX_RING_SIZE (MAX_TX_RING_ENTRIES * sizeof(struct tx_desc)) 450 450 - #define TX_RING_BASE 0x3800 451 451 - 452 452 - struct tx_desc{ 453 453 - aceaddr addr; 454 454 - u32 flagsize; 455 455 - #if 0 456 456 - /* 457 457 - * This is in PCI shared mem and must be accessed with readl/writel 458 458 - * real layout is: 459 459 - */ 460 460 - #if __LITTLE_ENDIAN 461 461 - u16 flags; 462 462 - u16 size; 463 463 - u16 vlan; 464 464 - u16 reserved; 465 465 - #else 466 466 - u16 size; 467 467 - u16 flags; 468 468 - u16 reserved; 469 469 - u16 vlan; 470 470 - #endif 471 471 - #endif 472 472 - u32 vlanres; 473 473 - }; 474 474 - 475 475 - 476 476 - #define RX_STD_RING_ENTRIES 512 477 477 - #define RX_STD_RING_SIZE (RX_STD_RING_ENTRIES * sizeof(struct rx_desc)) 478 478 - 479 479 - #define RX_JUMBO_RING_ENTRIES 256 480 480 - #define RX_JUMBO_RING_SIZE (RX_JUMBO_RING_ENTRIES *sizeof(struct rx_desc)) 481 481 - 482 482 - #define RX_MINI_RING_ENTRIES 1024 483 483 - #define RX_MINI_RING_SIZE (RX_MINI_RING_ENTRIES *sizeof(struct rx_desc)) 484 484 - 485 485 - #define RX_RETURN_RING_ENTRIES 2048 486 486 - #define RX_RETURN_RING_SIZE (RX_MAX_RETURN_RING_ENTRIES * \ 487 487 - sizeof(struct rx_desc)) 488 488 - 489 489 - struct rx_desc{ 490 490 - aceaddr addr; 491 491 - #ifdef __LITTLE_ENDIAN 492 492 - u16 size; 493 493 - u16 idx; 494 494 - #else 495 495 - u16 idx; 496 496 - u16 size; 497 497 - #endif 498 498 - #ifdef __LITTLE_ENDIAN 499 499 - u16 flags; 500 500 - u16 type; 501 501 - #else 502 502 - u16 type; 503 503 - u16 flags; 504 504 - #endif 505 505 - #ifdef __LITTLE_ENDIAN 506 506 - u16 tcp_udp_csum; 507 507 - u16 ip_csum; 508 508 - #else 509 509 - u16 ip_csum; 510 510 - u16 tcp_udp_csum; 511 511 - #endif 512 512 - #ifdef __LITTLE_ENDIAN 513 513 - u16 vlan; 514 514 - u16 err_flags; 515 515 - #else 516 516 - u16 err_flags; 517 517 - u16 vlan; 518 518 - #endif 519 519 - u32 reserved; 520 520 - u32 opague; 521 521 - }; 522 522 - 523 523 - 524 524 - /* 525 525 - * This struct is shared with the NIC firmware. 526 526 - */ 527 527 - struct ring_ctrl { 528 528 - aceaddr rngptr; 529 529 - #ifdef __LITTLE_ENDIAN 530 530 - u16 flags; 531 531 - u16 max_len; 532 532 - #else 533 533 - u16 max_len; 534 534 - u16 flags; 535 535 - #endif 536 536 - u32 pad; 537 537 - }; 538 538 - 539 539 - 540 540 - struct ace_mac_stats { 541 541 - u32 excess_colls; 542 542 - u32 coll_1; 543 543 - u32 coll_2; 544 544 - u32 coll_3; 545 545 - u32 coll_4; 546 546 - u32 coll_5; 547 547 - u32 coll_6; 548 548 - u32 coll_7; 549 549 - u32 coll_8; 550 550 - u32 coll_9; 551 551 - u32 coll_10; 552 552 - u32 coll_11; 553 553 - u32 coll_12; 554 554 - u32 coll_13; 555 555 - u32 coll_14; 556 556 - u32 coll_15; 557 557 - u32 late_coll; 558 558 - u32 defers; 559 559 - u32 crc_err; 560 560 - u32 underrun; 561 561 - u32 crs_err; 562 562 - u32 pad[3]; 563 563 - u32 drop_ula; 564 564 - u32 drop_mc; 565 565 - u32 drop_fc; 566 566 - u32 drop_space; 567 567 - u32 coll; 568 568 - u32 kept_bc; 569 569 - u32 kept_mc; 570 570 - u32 kept_uc; 571 571 - }; 572 572 - 573 573 - 574 574 - struct ace_info { 575 575 - union { 576 576 - u32 stats[256]; 577 577 - } s; 578 578 - struct ring_ctrl evt_ctrl; 579 579 - struct ring_ctrl cmd_ctrl; 580 580 - struct ring_ctrl tx_ctrl; 581 581 - struct ring_ctrl rx_std_ctrl; 582 582 - struct ring_ctrl rx_jumbo_ctrl; 583 583 - struct ring_ctrl rx_mini_ctrl; 584 584 - struct ring_ctrl rx_return_ctrl; 585 585 - aceaddr evt_prd_ptr; 586 586 - aceaddr rx_ret_prd_ptr; 587 587 - aceaddr tx_csm_ptr; 588 588 - aceaddr stats2_ptr; 589 589 - }; 590 590 - 591 591 - 592 592 - struct ring_info { 593 593 - struct sk_buff *skb; 594 594 - DEFINE_DMA_UNMAP_ADDR(mapping); 595 595 - }; 596 596 - 597 597 - 598 598 - /* 599 599 - * Funny... As soon as we add maplen on alpha, it starts to work 600 600 - * much slower. Hmm... is it because struct does not fit to one cacheline? 601 601 - * So, split tx_ring_info. 602 602 - */ 603 603 - struct tx_ring_info { 604 604 - struct sk_buff *skb; 605 605 - DEFINE_DMA_UNMAP_ADDR(mapping); 606 606 - DEFINE_DMA_UNMAP_LEN(maplen); 607 607 - }; 608 608 - 609 609 - 610 610 - /* 611 611 - * struct ace_skb holding the rings of skb's. This is an awful lot of 612 612 - * pointers, but I don't see any other smart mode to do this in an 613 613 - * efficient manner ;-( 614 614 - */ 615 615 - struct ace_skb 616 616 - { 617 617 - struct tx_ring_info tx_skbuff[MAX_TX_RING_ENTRIES]; 618 618 - struct ring_info rx_std_skbuff[RX_STD_RING_ENTRIES]; 619 619 - struct ring_info rx_mini_skbuff[RX_MINI_RING_ENTRIES]; 620 620 - struct ring_info rx_jumbo_skbuff[RX_JUMBO_RING_ENTRIES]; 621 621 - }; 622 622 - 623 623 - 624 624 - /* 625 625 - * Struct private for the AceNIC. 626 626 - * 627 627 - * Elements are grouped so variables used by the tx handling goes 628 628 - * together, and will go into the same cache lines etc. in order to 629 629 - * avoid cache line contention between the rx and tx handling on SMP. 630 630 - * 631 631 - * Frequently accessed variables are put at the beginning of the 632 632 - * struct to help the compiler generate better/shorter code. 633 633 - */ 634 634 - struct ace_private 635 635 - { 636 636 - struct net_device *ndev; /* backpointer */ 637 637 - struct ace_info *info; 638 638 - struct ace_regs __iomem *regs; /* register base */ 639 639 - struct ace_skb *skb; 640 640 - dma_addr_t info_dma; /* 32/64 bit */ 641 641 - 642 642 - int version, link; 643 643 - int promisc, mcast_all; 644 644 - 645 645 - /* 646 646 - * TX elements 647 647 - */ 648 648 - struct tx_desc *tx_ring; 649 649 - u32 tx_prd; 650 650 - volatile u32 tx_ret_csm; 651 651 - int tx_ring_entries; 652 652 - 653 653 - /* 654 654 - * RX elements 655 655 - */ 656 656 - unsigned long std_refill_busy 657 657 - __attribute__ ((aligned (SMP_CACHE_BYTES))); 658 658 - unsigned long mini_refill_busy, jumbo_refill_busy; 659 659 - atomic_t cur_rx_bufs; 660 660 - atomic_t cur_mini_bufs; 661 661 - atomic_t cur_jumbo_bufs; 662 662 - u32 rx_std_skbprd, rx_mini_skbprd, rx_jumbo_skbprd; 663 663 - u32 cur_rx; 664 664 - 665 665 - struct rx_desc *rx_std_ring; 666 666 - struct rx_desc *rx_jumbo_ring; 667 667 - struct rx_desc *rx_mini_ring; 668 668 - struct rx_desc *rx_return_ring; 669 669 - 670 670 - int bh_work_pending, jumbo; 671 671 - struct work_struct ace_bh_work; 672 672 - 673 673 - struct event *evt_ring; 674 674 - 675 675 - volatile u32 *evt_prd, *rx_ret_prd, *tx_csm; 676 676 - 677 677 - dma_addr_t tx_ring_dma; /* 32/64 bit */ 678 678 - dma_addr_t rx_ring_base_dma; 679 679 - dma_addr_t evt_ring_dma; 680 680 - dma_addr_t evt_prd_dma, rx_ret_prd_dma, tx_csm_dma; 681 681 - 682 682 - unsigned char *trace_buf; 683 683 - struct pci_dev *pdev; 684 684 - struct net_device *next; 685 685 - volatile int fw_running; 686 686 - int board_idx; 687 687 - u16 pci_command; 688 688 - u8 pci_latency; 689 689 - const char *name; 690 690 - #ifdef INDEX_DEBUG 691 691 - spinlock_t debug_lock 692 692 - __attribute__ ((aligned (SMP_CACHE_BYTES))); 693 693 - u32 last_tx, last_std_rx, last_mini_rx; 694 694 - #endif 695 695 - u8 firmware_major; 696 696 - u8 firmware_minor; 697 697 - u8 firmware_fix; 698 698 - u32 firmware_start; 699 699 - }; 700 700 - 701 701 - 702 702 - #define TX_RESERVED MAX_SKB_FRAGS 703 703 - 704 704 - static inline int tx_space (struct ace_private *ap, u32 csm, u32 prd) 705 705 - { 706 706 - return (csm - prd - 1) & (ACE_TX_RING_ENTRIES(ap) - 1); 707 707 - } 708 708 - 709 709 - #define tx_free(ap) tx_space((ap)->tx_ret_csm, (ap)->tx_prd, ap) 710 710 - #define tx_ring_full(ap, csm, prd) (tx_space(ap, csm, prd) <= TX_RESERVED) 711 711 - 712 712 - static inline void set_aceaddr(aceaddr *aa, dma_addr_t addr) 713 713 - { 714 714 - u64 baddr = (u64) addr; 715 715 - aa->addrlo = baddr & 0xffffffff; 716 716 - aa->addrhi = baddr >> 32; 717 717 - wmb(); 718 718 - } 719 719 - 720 720 - 721 721 - static inline void ace_set_txprd(struct ace_regs __iomem *regs, 722 722 - struct ace_private *ap, u32 value) 723 723 - { 724 724 - #ifdef INDEX_DEBUG 725 725 - unsigned long flags; 726 726 - spin_lock_irqsave(&ap->debug_lock, flags); 727 727 - writel(value, &regs->TxPrd); 728 728 - if (value == ap->last_tx) 729 729 - printk(KERN_ERR "AceNIC RACE ALERT! writing identical value " 730 730 - "to tx producer (%i)\n", value); 731 731 - ap->last_tx = value; 732 732 - spin_unlock_irqrestore(&ap->debug_lock, flags); 733 733 - #else 734 734 - writel(value, &regs->TxPrd); 735 735 - #endif 736 736 - wmb(); 737 737 - } 738 738 - 739 739 - 740 740 - static inline void ace_mask_irq(struct net_device *dev) 741 741 - { 742 742 - struct ace_private *ap = netdev_priv(dev); 743 743 - struct ace_regs __iomem *regs = ap->regs; 744 744 - 745 745 - if (ACE_IS_TIGON_I(ap)) 746 746 - writel(1, &regs->MaskInt); 747 747 - else 748 748 - writel(readl(&regs->HostCtrl) | MASK_INTS, &regs->HostCtrl); 749 749 - 750 750 - ace_sync_irq(dev->irq); 751 751 - } 752 752 - 753 753 - 754 754 - static inline void ace_unmask_irq(struct net_device *dev) 755 755 - { 756 756 - struct ace_private *ap = netdev_priv(dev); 757 757 - struct ace_regs __iomem *regs = ap->regs; 758 758 - 759 759 - if (ACE_IS_TIGON_I(ap)) 760 760 - writel(0, &regs->MaskInt); 761 761 - else 762 762 - writel(readl(&regs->HostCtrl) & ~MASK_INTS, &regs->HostCtrl); 763 763 - } 764 764 - 765 765 - 766 766 - /* 767 767 - * Prototypes 768 768 - */ 769 769 - static int ace_init(struct net_device *dev); 770 770 - static void ace_load_std_rx_ring(struct net_device *dev, int nr_bufs); 771 771 - static void ace_load_mini_rx_ring(struct net_device *dev, int nr_bufs); 772 772 - static void ace_load_jumbo_rx_ring(struct net_device *dev, int nr_bufs); 773 773 - static irqreturn_t ace_interrupt(int irq, void *dev_id); 774 774 - static int ace_load_firmware(struct net_device *dev); 775 775 - static int ace_open(struct net_device *dev); 776 776 - static netdev_tx_t ace_start_xmit(struct sk_buff *skb, 777 777 - struct net_device *dev); 778 778 - static int ace_close(struct net_device *dev); 779 779 - static void ace_bh_work(struct work_struct *work); 780 780 - static void ace_dump_trace(struct ace_private *ap); 781 781 - static void ace_set_multicast_list(struct net_device *dev); 782 782 - static int ace_change_mtu(struct net_device *dev, int new_mtu); 783 783 - static int ace_set_mac_addr(struct net_device *dev, void *p); 784 784 - static void ace_set_rxtx_parms(struct net_device *dev, int jumbo); 785 785 - static int ace_allocate_descriptors(struct net_device *dev); 786 786 - static void ace_free_descriptors(struct net_device *dev); 787 787 - static void ace_init_cleanup(struct net_device *dev); 788 788 - static struct net_device_stats *ace_get_stats(struct net_device *dev); 789 789 - static int read_eeprom_byte(struct net_device *dev, unsigned long offset); 790 790 - 791 791 - #endif /* _ACENIC_H_ */