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net: phy: Add MDIO_PMA_CTRL1_SPEED for 2.5G and 5G to reflect PMA values

The 2.5G and 5G values are not consistent between the PCS CTRL1 and PMA
CTRL1 values. In order to avoid confusion between the two I am updating the
values to include "PMA" in the name similar to values used in similar
places.

To avoid breaking UAPI I have retained the original macros and just defined
them as the new PMA based defines.

Signed-off-by: Alexander Duyck <alexanderduyck@fb.com>
Link: https://patch.msgid.link/176374319569.959489.6610469879021800710.stgit@ahduyck-xeon-server.home.arpa
Signed-off-by: Paolo Abeni <pabeni@redhat.com>

authored by

Alexander Duyck and committed by
Paolo Abeni e6c43c95 f93505f3

+14 -6
+4 -4
drivers/net/phy/phy-c45.c
··· 148 148 ctrl2 |= MDIO_PMA_CTRL2_1000BT; 149 149 break; 150 150 case SPEED_2500: 151 - ctrl1 |= MDIO_CTRL1_SPEED2_5G; 151 + ctrl1 |= MDIO_PMA_CTRL1_SPEED2_5G; 152 152 /* Assume 2.5Gbase-T */ 153 153 ctrl2 |= MDIO_PMA_CTRL2_2_5GBT; 154 154 break; 155 155 case SPEED_5000: 156 - ctrl1 |= MDIO_CTRL1_SPEED5G; 156 + ctrl1 |= MDIO_PMA_CTRL1_SPEED5G; 157 157 /* Assume 5Gbase-T */ 158 158 ctrl2 |= MDIO_PMA_CTRL2_5GBT; 159 159 break; ··· 618 618 case MDIO_PMA_CTRL1_SPEED1000: 619 619 phydev->speed = SPEED_1000; 620 620 break; 621 - case MDIO_CTRL1_SPEED2_5G: 621 + case MDIO_PMA_CTRL1_SPEED2_5G: 622 622 phydev->speed = SPEED_2500; 623 623 break; 624 - case MDIO_CTRL1_SPEED5G: 624 + case MDIO_PMA_CTRL1_SPEED5G: 625 625 phydev->speed = SPEED_5000; 626 626 break; 627 627 case MDIO_CTRL1_SPEED10G:
+10 -2
include/uapi/linux/mdio.h
··· 116 116 #define MDIO_CTRL1_SPEED10G (MDIO_CTRL1_SPEEDSELEXT | 0x00) 117 117 /* 10PASS-TS/2BASE-TL */ 118 118 #define MDIO_CTRL1_SPEED10P2B (MDIO_CTRL1_SPEEDSELEXT | 0x04) 119 + /* Note: the MDIO_CTRL1_SPEED_XXX values for everything past 10PASS-TS/2BASE-TL 120 + * do not match between the PCS and PMA values. Any additions past this point 121 + * should be PMA or PCS specific. The following 2 defines are workarounds for 122 + * values added before this was caught. They should be considered deprecated. 123 + */ 124 + #define MDIO_CTRL1_SPEED2_5G MDIO_PMA_CTRL1_SPEED2_5G 125 + #define MDIO_CTRL1_SPEED5G MDIO_PMA_CTRL1_SPEED5G 119 126 /* 2.5 Gb/s */ 120 - #define MDIO_CTRL1_SPEED2_5G (MDIO_CTRL1_SPEEDSELEXT | 0x18) 127 + #define MDIO_PMA_CTRL1_SPEED2_5G (MDIO_CTRL1_SPEEDSELEXT | 0x18) 121 128 /* 5 Gb/s */ 122 - #define MDIO_CTRL1_SPEED5G (MDIO_CTRL1_SPEEDSELEXT | 0x1c) 129 + #define MDIO_PMA_CTRL1_SPEED5G (MDIO_CTRL1_SPEEDSELEXT | 0x1c) 130 + 123 131 124 132 /* Status register 1. */ 125 133 #define MDIO_STAT1_LPOWERABLE 0x0002 /* Low-power ability */