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dt-bindings: pinctrl: airoha: Document AN7583 Pin Controller

Document Airoha AN7583 Pin Controller based on Airoha EN7581 with some
minor difference on some function group (PCM and LED gpio).

To not bloat the EN7581 schema with massive if condition, use a
dedicated YAML schema for Airoha AN7583.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

authored by

Christian Marangi and committed by
Linus Walleij
e6e47d31 1552ad5d

+402
+402
Documentation/devicetree/bindings/pinctrl/airoha,an7583-pinctrl.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/pinctrl/airoha,an7583-pinctrl.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Airoha AN7583 Pin Controller 8 + 9 + maintainers: 10 + - Lorenzo Bianconi <lorenzo@kernel.org> 11 + 12 + description: 13 + The Airoha's AN7583 Pin controller is used to control SoC pins. 14 + 15 + properties: 16 + compatible: 17 + const: airoha,an7583-pinctrl 18 + 19 + interrupts: 20 + maxItems: 1 21 + 22 + gpio-controller: true 23 + 24 + '#gpio-cells': 25 + const: 2 26 + 27 + gpio-ranges: 28 + maxItems: 1 29 + 30 + interrupt-controller: true 31 + 32 + '#interrupt-cells': 33 + const: 2 34 + 35 + allOf: 36 + - $ref: pinctrl.yaml# 37 + 38 + required: 39 + - compatible 40 + - interrupts 41 + - gpio-controller 42 + - "#gpio-cells" 43 + - interrupt-controller 44 + - "#interrupt-cells" 45 + 46 + patternProperties: 47 + '-pins$': 48 + type: object 49 + 50 + patternProperties: 51 + '^mux(-|$)': 52 + type: object 53 + 54 + description: 55 + pinmux configuration nodes. 56 + 57 + $ref: /schemas/pinctrl/pinmux-node.yaml 58 + 59 + properties: 60 + function: 61 + description: 62 + A string containing the name of the function to mux to the group. 63 + enum: [pon, tod_1pps, sipo, mdio, uart, i2c, jtag, pcm, spi, 64 + pcm_spi, i2s, emmc, pnand, pcie_reset, pwm, phy1_led0, 65 + phy2_led0, phy3_led0, phy4_led0, phy1_led1, phy2_led1, 66 + phy3_led1, phy4_led1] 67 + 68 + groups: 69 + description: 70 + An array of strings. Each string contains the name of a group. 71 + 72 + required: 73 + - function 74 + - groups 75 + 76 + allOf: 77 + - if: 78 + properties: 79 + function: 80 + const: pon 81 + then: 82 + properties: 83 + groups: 84 + enum: [pon] 85 + - if: 86 + properties: 87 + function: 88 + const: tod_1pps 89 + then: 90 + properties: 91 + groups: 92 + enum: [pon_tod_1pps, gsw_tod_1pps] 93 + - if: 94 + properties: 95 + function: 96 + const: sipo 97 + then: 98 + properties: 99 + groups: 100 + enum: [sipo, sipo_rclk] 101 + - if: 102 + properties: 103 + function: 104 + const: mdio 105 + then: 106 + properties: 107 + groups: 108 + enum: [mdio] 109 + - if: 110 + properties: 111 + function: 112 + const: uart 113 + then: 114 + properties: 115 + groups: 116 + items: 117 + enum: [uart2, uart2_cts_rts, hsuart, hsuart_cts_rts, 118 + uart4, uart5] 119 + maxItems: 2 120 + - if: 121 + properties: 122 + function: 123 + const: i2c 124 + then: 125 + properties: 126 + groups: 127 + enum: [i2c1] 128 + - if: 129 + properties: 130 + function: 131 + const: jtag 132 + then: 133 + properties: 134 + groups: 135 + enum: [jtag_udi, jtag_dfd] 136 + - if: 137 + properties: 138 + function: 139 + const: pcm 140 + then: 141 + properties: 142 + groups: 143 + enum: [pcm1, pcm2] 144 + - if: 145 + properties: 146 + function: 147 + const: spi 148 + then: 149 + properties: 150 + groups: 151 + items: 152 + enum: [spi_quad, spi_cs1] 153 + maxItems: 2 154 + - if: 155 + properties: 156 + function: 157 + const: pcm_spi 158 + then: 159 + properties: 160 + groups: 161 + items: 162 + enum: [pcm_spi, pcm_spi_int, pcm_spi_rst, pcm_spi_cs1, 163 + pcm_spi_cs2, pcm_spi_cs3, pcm_spi_cs4] 164 + maxItems: 7 165 + - if: 166 + properties: 167 + function: 168 + const: i2c 169 + then: 170 + properties: 171 + groups: 172 + enum: [i2s] 173 + - if: 174 + properties: 175 + function: 176 + const: emmc 177 + then: 178 + properties: 179 + groups: 180 + enum: [emmc] 181 + - if: 182 + properties: 183 + function: 184 + const: pnand 185 + then: 186 + properties: 187 + groups: 188 + enum: [pnand] 189 + - if: 190 + properties: 191 + function: 192 + const: pcie_reset 193 + then: 194 + properties: 195 + groups: 196 + enum: [pcie_reset0, pcie_reset1] 197 + - if: 198 + properties: 199 + function: 200 + const: pwm 201 + then: 202 + properties: 203 + groups: 204 + enum: [gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6, 205 + gpio7, gpio8, gpio9, gpio10, gpio11, gpio12, gpio13, 206 + gpio14, gpio15, gpio16, gpio17, gpio18, gpio19, 207 + gpio20, gpio21, gpio22, gpio23, gpio24, gpio25, 208 + gpio26, gpio27, gpio28, gpio29, gpio30, gpio31, 209 + gpio36, gpio37, gpio38, gpio39, gpio40, gpio41, 210 + gpio42, gpio43, gpio44, gpio45, gpio46, gpio47] 211 + - if: 212 + properties: 213 + function: 214 + const: phy1_led0 215 + then: 216 + properties: 217 + groups: 218 + enum: [gpio1, gpio2, gpio3, gpio4] 219 + - if: 220 + properties: 221 + function: 222 + const: phy2_led0 223 + then: 224 + properties: 225 + groups: 226 + enum: [gpio1, gpio2, gpio3, gpio4] 227 + - if: 228 + properties: 229 + function: 230 + const: phy3_led0 231 + then: 232 + properties: 233 + groups: 234 + enum: [gpio1, gpio2, gpio3, gpio4] 235 + - if: 236 + properties: 237 + function: 238 + const: phy4_led0 239 + then: 240 + properties: 241 + groups: 242 + enum: [gpio1, gpio2, gpio3, gpio4] 243 + - if: 244 + properties: 245 + function: 246 + const: phy1_led1 247 + then: 248 + properties: 249 + groups: 250 + enum: [gpio8, gpio9, gpio10, gpio11] 251 + - if: 252 + properties: 253 + function: 254 + const: phy2_led1 255 + then: 256 + properties: 257 + groups: 258 + enum: [gpio8, gpio9, gpio10, gpio11] 259 + - if: 260 + properties: 261 + function: 262 + const: phy3_led1 263 + then: 264 + properties: 265 + groups: 266 + enum: [gpio8, gpio9, gpio10, gpio11] 267 + - if: 268 + properties: 269 + function: 270 + const: phy4_led1 271 + then: 272 + properties: 273 + groups: 274 + enum: [gpio8, gpio9, gpio10, gpio11] 275 + 276 + additionalProperties: false 277 + 278 + '^conf(-|$)': 279 + type: object 280 + 281 + description: 282 + pinconf configuration nodes. 283 + 284 + $ref: /schemas/pinctrl/pincfg-node.yaml 285 + 286 + properties: 287 + pins: 288 + description: 289 + An array of strings. Each string contains the name of a pin. 290 + items: 291 + enum: [uart1_txd, uart1_rxd, i2c_scl, i2c_sda, spi_cs0, spi_clk, 292 + spi_mosi, spi_miso, gpio0, gpio1, gpio2, gpio3, gpio4, 293 + gpio5, gpio6, gpio7, gpio8, gpio9, gpio10, gpio11, gpio12, 294 + gpio13, gpio14, gpio15, gpio16, gpio17, gpio18, gpio19, 295 + gpio20, gpio21, gpio22, gpio23, gpio24, gpio25, gpio26, 296 + gpio27, gpio28, gpio29, gpio30, gpio31, gpio32, gpio33, 297 + gpio34, gpio35, gpio36, gpio37, gpio38, gpio39, gpio40, 298 + gpio41, gpio42, gpio43, gpio44, gpio45, gpio46, 299 + pcie_reset0, pcie_reset1, pcie_reset2] 300 + minItems: 1 301 + maxItems: 58 302 + 303 + bias-disable: true 304 + 305 + bias-pull-up: true 306 + 307 + bias-pull-down: true 308 + 309 + input-enable: true 310 + 311 + output-enable: true 312 + 313 + output-low: true 314 + 315 + output-high: true 316 + 317 + drive-open-drain: true 318 + 319 + drive-strength: 320 + description: 321 + Selects the drive strength for MIO pins, in mA. 322 + enum: [2, 4, 6, 8] 323 + 324 + required: 325 + - pins 326 + 327 + additionalProperties: false 328 + 329 + additionalProperties: false 330 + 331 + additionalProperties: false 332 + 333 + examples: 334 + - | 335 + #include <dt-bindings/interrupt-controller/arm-gic.h> 336 + 337 + pinctrl { 338 + compatible = "airoha,an7583-pinctrl"; 339 + 340 + interrupt-parent = <&gic>; 341 + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 342 + 343 + gpio-controller; 344 + #gpio-cells = <2>; 345 + 346 + interrupt-controller; 347 + #interrupt-cells = <2>; 348 + 349 + pcie1-rst-pins { 350 + conf { 351 + pins = "pcie_reset1"; 352 + drive-open-drain = <1>; 353 + }; 354 + }; 355 + 356 + pwm-pins { 357 + mux { 358 + function = "pwm"; 359 + groups = "gpio18"; 360 + }; 361 + }; 362 + 363 + spi-pins { 364 + mux { 365 + function = "spi"; 366 + groups = "spi_quad", "spi_cs1"; 367 + }; 368 + }; 369 + 370 + uart2-pins { 371 + mux { 372 + function = "uart"; 373 + groups = "uart2", "uart2_cts_rts"; 374 + }; 375 + }; 376 + 377 + uar5-pins { 378 + mux { 379 + function = "uart"; 380 + groups = "uart5"; 381 + }; 382 + }; 383 + 384 + mmc-pins { 385 + mux { 386 + function = "emmc"; 387 + groups = "emmc"; 388 + }; 389 + }; 390 + 391 + mdio-pins { 392 + mux { 393 + function = "mdio"; 394 + groups = "mdio"; 395 + }; 396 + 397 + conf { 398 + pins = "gpio2"; 399 + output-enable; 400 + }; 401 + }; 402 + };