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drm/bridge: imx8*-ldb: convert to devm_drm_bridge_alloc() API

This is the new API for allocating DRM bridges.

These two drivers are tangled together by the ldb_add_bridge_helper(), so
they are converted at once.

They also have a similar design, each embedding an array of channels in
their main struct, and each channel embeds a drm_bridge. This prevents
dynamic, refcount-based deallocation of the bridges.

To make the new, dynamic bridge allocation possible:

* change the array of channels into an array of channel pointers
* allocate each channel using devm_drm_bridge_alloc()
* adapt ldb_add_bridge_helper() to not set the funcs pointer
(now done by devm_drm_bridge_alloc())
* adapt the code wherever using the channels

Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Acked-by: Liu Ying <victor.liu@nxp.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250424-drm-bridge-convert-to-alloc-api-v2-31-8f91a404d86b@bootlin.com
Signed-off-by: Louis Chauvet <louis.chauvet@bootlin.com>

authored by

Luca Ceresoli and committed by
Louis Chauvet
e74b84cd 9545c91e

+36 -23
+1 -3
drivers/gpu/drm/bridge/imx/imx-ldb-helper.c
··· 190 190 } 191 191 EXPORT_SYMBOL_GPL(ldb_find_next_bridge_helper); 192 192 193 - void ldb_add_bridge_helper(struct ldb *ldb, 194 - const struct drm_bridge_funcs *bridge_funcs) 193 + void ldb_add_bridge_helper(struct ldb *ldb) 195 194 { 196 195 struct ldb_channel *ldb_ch; 197 196 int i; ··· 202 203 continue; 203 204 204 205 ldb_ch->bridge.driver_private = ldb_ch; 205 - ldb_ch->bridge.funcs = bridge_funcs; 206 206 ldb_ch->bridge.of_node = ldb_ch->np; 207 207 208 208 drm_bridge_add(&ldb_ch->bridge);
+1 -2
drivers/gpu/drm/bridge/imx/imx-ldb-helper.h
··· 88 88 89 89 int ldb_find_next_bridge_helper(struct ldb *ldb); 90 90 91 - void ldb_add_bridge_helper(struct ldb *ldb, 92 - const struct drm_bridge_funcs *bridge_funcs); 91 + void ldb_add_bridge_helper(struct ldb *ldb); 93 92 94 93 void ldb_remove_bridge_helper(struct ldb *ldb); 95 94
+20 -12
drivers/gpu/drm/bridge/imx/imx8qm-ldb.c
··· 47 47 struct imx8qm_ldb { 48 48 struct ldb base; 49 49 struct device *dev; 50 - struct imx8qm_ldb_channel channel[MAX_LDB_CHAN_NUM]; 50 + struct imx8qm_ldb_channel *channel[MAX_LDB_CHAN_NUM]; 51 51 struct clk *clk_pixel; 52 52 struct clk *clk_bypass; 53 53 int active_chno; ··· 107 107 108 108 if (is_split) { 109 109 imx8qm_ldb_ch = 110 - &imx8qm_ldb->channel[imx8qm_ldb->active_chno ^ 1]; 110 + imx8qm_ldb->channel[imx8qm_ldb->active_chno ^ 1]; 111 111 imx8qm_ldb_set_phy_cfg(imx8qm_ldb, di_clk, is_split, true, 112 112 phy_cfg); 113 113 ret = phy_validate(imx8qm_ldb_ch->phy, PHY_MODE_LVDS, 0, &opts); ··· 158 158 159 159 if (is_split) { 160 160 imx8qm_ldb_ch = 161 - &imx8qm_ldb->channel[imx8qm_ldb->active_chno ^ 1]; 161 + imx8qm_ldb->channel[imx8qm_ldb->active_chno ^ 1]; 162 162 imx8qm_ldb_set_phy_cfg(imx8qm_ldb, di_clk, is_split, true, 163 163 phy_cfg); 164 164 ret = phy_configure(imx8qm_ldb_ch->phy, &opts); ··· 226 226 } 227 227 228 228 if (is_split) { 229 - ret = phy_power_on(imx8qm_ldb->channel[0].phy); 229 + ret = phy_power_on(imx8qm_ldb->channel[0]->phy); 230 230 if (ret) 231 231 DRM_DEV_ERROR(dev, 232 232 "failed to power on channel0 PHY: %d\n", 233 233 ret); 234 234 235 - ret = phy_power_on(imx8qm_ldb->channel[1].phy); 235 + ret = phy_power_on(imx8qm_ldb->channel[1]->phy); 236 236 if (ret) 237 237 DRM_DEV_ERROR(dev, 238 238 "failed to power on channel1 PHY: %d\n", ··· 261 261 ldb_bridge_disable_helper(bridge); 262 262 263 263 if (is_split) { 264 - ret = phy_power_off(imx8qm_ldb->channel[0].phy); 264 + ret = phy_power_off(imx8qm_ldb->channel[0]->phy); 265 265 if (ret) 266 266 DRM_DEV_ERROR(dev, 267 267 "failed to power off channel0 PHY: %d\n", 268 268 ret); 269 - ret = phy_power_off(imx8qm_ldb->channel[1].phy); 269 + ret = phy_power_off(imx8qm_ldb->channel[1]->phy); 270 270 if (ret) 271 271 DRM_DEV_ERROR(dev, 272 272 "failed to power off channel1 PHY: %d\n", ··· 412 412 int i, ret; 413 413 414 414 for (i = 0; i < MAX_LDB_CHAN_NUM; i++) { 415 - imx8qm_ldb_ch = &imx8qm_ldb->channel[i]; 415 + imx8qm_ldb_ch = imx8qm_ldb->channel[i]; 416 416 ldb_ch = &imx8qm_ldb_ch->base; 417 417 418 418 if (!ldb_ch->is_available) ··· 448 448 if (!imx8qm_ldb) 449 449 return -ENOMEM; 450 450 451 + for (i = 0; i < MAX_LDB_CHAN_NUM; i++) { 452 + imx8qm_ldb->channel[i] = 453 + devm_drm_bridge_alloc(dev, struct imx8qm_ldb_channel, base.bridge, 454 + &imx8qm_ldb_bridge_funcs); 455 + if (IS_ERR(imx8qm_ldb->channel[i])) 456 + return PTR_ERR(imx8qm_ldb->channel[i]); 457 + } 458 + 451 459 imx8qm_ldb->clk_pixel = devm_clk_get(dev, "pixel"); 452 460 if (IS_ERR(imx8qm_ldb->clk_pixel)) { 453 461 ret = PTR_ERR(imx8qm_ldb->clk_pixel); ··· 481 473 ldb->ctrl_reg = 0xe0; 482 474 483 475 for (i = 0; i < MAX_LDB_CHAN_NUM; i++) 484 - ldb->channel[i] = &imx8qm_ldb->channel[i].base; 476 + ldb->channel[i] = &imx8qm_ldb->channel[i]->base; 485 477 486 478 ret = ldb_init_helper(ldb); 487 479 if (ret) ··· 507 499 } 508 500 509 501 imx8qm_ldb->active_chno = 0; 510 - imx8qm_ldb_ch = &imx8qm_ldb->channel[0]; 502 + imx8qm_ldb_ch = imx8qm_ldb->channel[0]; 511 503 ldb_ch = &imx8qm_ldb_ch->base; 512 504 ldb_ch->link_type = pixel_order; 513 505 } else { 514 506 for (i = 0; i < MAX_LDB_CHAN_NUM; i++) { 515 - imx8qm_ldb_ch = &imx8qm_ldb->channel[i]; 507 + imx8qm_ldb_ch = imx8qm_ldb->channel[i]; 516 508 ldb_ch = &imx8qm_ldb_ch->base; 517 509 518 510 if (ldb_ch->is_available) { ··· 533 525 platform_set_drvdata(pdev, imx8qm_ldb); 534 526 pm_runtime_enable(dev); 535 527 536 - ldb_add_bridge_helper(ldb, &imx8qm_ldb_bridge_funcs); 528 + ldb_add_bridge_helper(ldb); 537 529 538 530 return ret; 539 531 }
+14 -6
drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c
··· 44 44 struct imx8qxp_ldb { 45 45 struct ldb base; 46 46 struct device *dev; 47 - struct imx8qxp_ldb_channel channel[MAX_LDB_CHAN_NUM]; 47 + struct imx8qxp_ldb_channel *channel[MAX_LDB_CHAN_NUM]; 48 48 struct clk *clk_pixel; 49 49 struct clk *clk_bypass; 50 50 struct drm_bridge *companion; ··· 410 410 static int imx8qxp_ldb_set_di_id(struct imx8qxp_ldb *imx8qxp_ldb) 411 411 { 412 412 struct imx8qxp_ldb_channel *imx8qxp_ldb_ch = 413 - &imx8qxp_ldb->channel[imx8qxp_ldb->active_chno]; 413 + imx8qxp_ldb->channel[imx8qxp_ldb->active_chno]; 414 414 struct ldb_channel *ldb_ch = &imx8qxp_ldb_ch->base; 415 415 struct device_node *ep, *remote; 416 416 struct device *dev = imx8qxp_ldb->dev; ··· 456 456 static int imx8qxp_ldb_parse_dt_companion(struct imx8qxp_ldb *imx8qxp_ldb) 457 457 { 458 458 struct imx8qxp_ldb_channel *imx8qxp_ldb_ch = 459 - &imx8qxp_ldb->channel[imx8qxp_ldb->active_chno]; 459 + imx8qxp_ldb->channel[imx8qxp_ldb->active_chno]; 460 460 struct ldb_channel *ldb_ch = &imx8qxp_ldb_ch->base; 461 461 struct ldb_channel *companion_ldb_ch; 462 462 struct device_node *companion; ··· 586 586 if (!imx8qxp_ldb) 587 587 return -ENOMEM; 588 588 589 + for (i = 0; i < MAX_LDB_CHAN_NUM; i++) { 590 + imx8qxp_ldb->channel[i] = 591 + devm_drm_bridge_alloc(dev, struct imx8qxp_ldb_channel, base.bridge, 592 + &imx8qxp_ldb_bridge_funcs); 593 + if (IS_ERR(imx8qxp_ldb->channel[i])) 594 + return PTR_ERR(imx8qxp_ldb->channel[i]); 595 + } 596 + 589 597 imx8qxp_ldb->clk_pixel = devm_clk_get(dev, "pixel"); 590 598 if (IS_ERR(imx8qxp_ldb->clk_pixel)) { 591 599 ret = PTR_ERR(imx8qxp_ldb->clk_pixel); ··· 619 611 ldb->ctrl_reg = 0xe0; 620 612 621 613 for (i = 0; i < MAX_LDB_CHAN_NUM; i++) 622 - ldb->channel[i] = &imx8qxp_ldb->channel[i].base; 614 + ldb->channel[i] = &imx8qxp_ldb->channel[i]->base; 623 615 624 616 ret = ldb_init_helper(ldb); 625 617 if (ret) ··· 635 627 } 636 628 637 629 for (i = 0; i < MAX_LDB_CHAN_NUM; i++) { 638 - imx8qxp_ldb_ch = &imx8qxp_ldb->channel[i]; 630 + imx8qxp_ldb_ch = imx8qxp_ldb->channel[i]; 639 631 ldb_ch = &imx8qxp_ldb_ch->base; 640 632 641 633 if (ldb_ch->is_available) { ··· 668 660 platform_set_drvdata(pdev, imx8qxp_ldb); 669 661 pm_runtime_enable(dev); 670 662 671 - ldb_add_bridge_helper(ldb, &imx8qxp_ldb_bridge_funcs); 663 + ldb_add_bridge_helper(ldb); 672 664 673 665 return 0; 674 666 }