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x86/cpuid: Rename cpuid_get_leaf_0x2_regs() to cpuid_leaf_0x2()

Rename the CPUID(0x2) register accessor function:

cpuid_get_leaf_0x2_regs(regs)

to:

cpuid_leaf_0x2(regs)

for consistency with other <cpuid/api.h> accessors that return full CPUID
registers outputs like:

cpuid_leaf(regs)
cpuid_subleaf(regs)

In the same vein, rename the CPUID(0x2) iteration macro:

for_each_leaf_0x2_entry()

to:

for_each_cpuid_0x2_desc()

to include "cpuid" in the macro name, and since what is iterated upon is
CPUID(0x2) cache and TLB "descriptos", not "entries". Prefix an
underscore to that iterator macro parameters, so that the newly renamed
'desc' parameter do not get mixed with "union leaf_0x2_regs :: desc[]" in
the macro's implementation.

Adjust all the affected call-sites accordingly.

While at it, use "CPUID(0x2)" instead of "CPUID leaf 0x2" as this is the
recommended style.

No change in functionality intended.

Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: John Ogness <john.ogness@linutronix.de>
Cc: x86-cpuid@lists.linux.dev
Link: https://lore.kernel.org/r/20250508150240.172915-6-darwi@linutronix.de

authored by

Ahmed S. Darwish and committed by
Ingo Molnar e7df7289 2f924ca3

+24 -24
+20 -20
arch/x86/include/asm/cpuid/api.h
··· 216 216 */ 217 217 218 218 /** 219 - * cpuid_get_leaf_0x2_regs() - Return sanitized leaf 0x2 register output 219 + * cpuid_leaf_0x2() - Return sanitized CPUID(0x2) register output 220 220 * @regs: Output parameter 221 221 * 222 - * Query CPUID leaf 0x2 and store its output in @regs. Force set any 222 + * Query CPUID(0x2) and store its output in @regs. Force set any 223 223 * invalid 1-byte descriptor returned by the hardware to zero (the NULL 224 224 * cache/TLB descriptor) before returning it to the caller. 225 225 * 226 - * Use for_each_leaf_0x2_entry() to iterate over the register output in 226 + * Use for_each_cpuid_0x2_desc() to iterate over the register output in 227 227 * parsed form. 228 228 */ 229 - static inline void cpuid_get_leaf_0x2_regs(union leaf_0x2_regs *regs) 229 + static inline void cpuid_leaf_0x2(union leaf_0x2_regs *regs) 230 230 { 231 231 cpuid_leaf(0x2, regs); 232 232 ··· 251 251 } 252 252 253 253 /** 254 - * for_each_leaf_0x2_entry() - Iterator for parsed leaf 0x2 descriptors 255 - * @regs: Leaf 0x2 register output, returned by cpuid_get_leaf_0x2_regs() 256 - * @__ptr: u8 pointer, for macro internal use only 257 - * @entry: Pointer to parsed descriptor information at each iteration 254 + * for_each_cpuid_0x2_desc() - Iterator for parsed CPUID(0x2) descriptors 255 + * @_regs: CPUID(0x2) register output, as returned by cpuid_leaf_0x2() 256 + * @_ptr: u8 pointer, for macro internal use only 257 + * @_desc: Pointer to the parsed CPUID(0x2) descriptor at each iteration 258 258 * 259 - * Loop over the 1-byte descriptors in the passed leaf 0x2 output registers 260 - * @regs. Provide the parsed information for each descriptor through @entry. 259 + * Loop over the 1-byte descriptors in the passed CPUID(0x2) output registers 260 + * @_regs. Provide the parsed information for each descriptor through @_desc. 261 261 * 262 - * To handle cache-specific descriptors, switch on @entry->c_type. For TLB 263 - * descriptors, switch on @entry->t_type. 262 + * To handle cache-specific descriptors, switch on @_desc->c_type. For TLB 263 + * descriptors, switch on @_desc->t_type. 264 264 * 265 265 * Example usage for cache descriptors:: 266 266 * 267 - * const struct leaf_0x2_table *entry; 267 + * const struct leaf_0x2_table *desc; 268 268 * union leaf_0x2_regs regs; 269 269 * u8 *ptr; 270 270 * 271 - * cpuid_get_leaf_0x2_regs(&regs); 272 - * for_each_leaf_0x2_entry(regs, ptr, entry) { 273 - * switch (entry->c_type) { 271 + * cpuid_leaf_0x2(&regs); 272 + * for_each_cpuid_0x2_desc(regs, ptr, desc) { 273 + * switch (desc->c_type) { 274 274 * ... 275 275 * } 276 276 * } 277 277 */ 278 - #define for_each_leaf_0x2_entry(regs, __ptr, entry) \ 279 - for (__ptr = &(regs).desc[1]; \ 280 - __ptr < &(regs).desc[16] && (entry = &cpuid_0x2_table[*__ptr]); \ 281 - __ptr++) 278 + #define for_each_cpuid_0x2_desc(_regs, _ptr, _desc) \ 279 + for (_ptr = &(_regs).desc[1]; \ 280 + _ptr < &(_regs).desc[16] && (_desc = &cpuid_0x2_table[*_ptr]); \ 281 + _ptr++) 282 282 283 283 /* 284 284 * CPUID(0x80000006) parsing:
+2 -2
arch/x86/kernel/cpu/cacheinfo.c
··· 388 388 if (c->cpuid_level < 2) 389 389 return; 390 390 391 - cpuid_get_leaf_0x2_regs(&regs); 392 - for_each_leaf_0x2_entry(regs, ptr, entry) { 391 + cpuid_leaf_0x2(&regs); 392 + for_each_cpuid_0x2_desc(regs, ptr, entry) { 393 393 switch (entry->c_type) { 394 394 case CACHE_L1_INST: l1i += entry->c_size; break; 395 395 case CACHE_L1_DATA: l1d += entry->c_size; break;
+2 -2
arch/x86/kernel/cpu/intel.c
··· 716 716 if (c->cpuid_level < 2) 717 717 return; 718 718 719 - cpuid_get_leaf_0x2_regs(&regs); 720 - for_each_leaf_0x2_entry(regs, ptr, entry) 719 + cpuid_leaf_0x2(&regs); 720 + for_each_cpuid_0x2_desc(regs, ptr, entry) 721 721 intel_tlb_lookup(entry); 722 722 } 723 723