+2 -4

drivers/gpu/drm/amd/amdgpu/amdgpu.h

reviewed

··· 904 904 struct amdgpu_reg_access reg; 905 905 /* protects concurrent PCIE register access */ 906 906 spinlock_t pcie_idx_lock; 907 907 - amdgpu_rreg_t pcie_rreg; 908 908 - amdgpu_wreg_t pcie_wreg; 909 907 amdgpu_rreg_ext_t pcie_rreg_ext; 910 908 amdgpu_wreg_ext_t pcie_wreg_ext; 911 909 amdgpu_rreg64_t pcie_rreg64; ··· 1304 1306 #define REG_GET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK) 1305 1307 #define RREG32_XCC(reg, inst) amdgpu_device_xcc_rreg(adev, (reg), 0, inst) 1306 1308 #define WREG32_XCC(reg, v, inst) amdgpu_device_xcc_wreg(adev, (reg), (v), 0, inst) 1307 1307 - #define RREG32_PCIE(reg) adev->pcie_rreg(adev, (reg)) 1308 1308 - #define WREG32_PCIE(reg, v) adev->pcie_wreg(adev, (reg), (v)) 1309 1309 + #define RREG32_PCIE(reg) amdgpu_reg_pcie_rd32(adev, (reg)) 1310 1310 + #define WREG32_PCIE(reg, v) amdgpu_reg_pcie_wr32(adev, (reg), (v)) 1309 1311 #define RREG32_PCIE_PORT(reg) amdgpu_reg_pciep_rd32(adev, (reg)) 1310 1312 #define WREG32_PCIE_PORT(reg, v) amdgpu_reg_pciep_wr32(adev, (reg), (v)) 1311 1313 #define RREG32_PCIE_EXT(reg) adev->pcie_rreg_ext(adev, (reg))

-37

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

reviewed

··· 858 858 return adev->nbio.funcs->get_rev_id(adev); 859 859 } 860 860 861 861 - /** 862 862 - * amdgpu_invalid_rreg - dummy reg read function 863 863 - * 864 864 - * @adev: amdgpu_device pointer 865 865 - * @reg: offset of register 866 866 - * 867 867 - * Dummy register read function. Used for register blocks 868 868 - * that certain asics don't have (all asics). 869 869 - * Returns the value in the register. 870 870 - */ 871 871 - static uint32_t amdgpu_invalid_rreg(struct amdgpu_device *adev, uint32_t reg) 872 872 - { 873 873 - dev_err(adev->dev, "Invalid callback to read register 0x%04X\n", reg); 874 874 - BUG(); 875 875 - return 0; 876 876 - } 877 877 - 878 861 static uint32_t amdgpu_invalid_rreg_ext(struct amdgpu_device *adev, uint64_t reg) 879 862 { 880 863 dev_err(adev->dev, "Invalid callback to read register 0x%llX\n", reg); 881 864 BUG(); 882 865 return 0; 883 883 - } 884 884 - 885 885 - /** 886 886 - * amdgpu_invalid_wreg - dummy reg write function 887 887 - * 888 888 - * @adev: amdgpu_device pointer 889 889 - * @reg: offset of register 890 890 - * @v: value to write to the register 891 891 - * 892 892 - * Dummy register read function. Used for register blocks 893 893 - * that certain asics don't have (all asics). 894 894 - */ 895 895 - static void amdgpu_invalid_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v) 896 896 - { 897 897 - dev_err(adev->dev, 898 898 - "Invalid callback to write register 0x%04X with 0x%08X\n", reg, 899 899 - v); 900 900 - BUG(); 901 866 } 902 867 903 868 static void amdgpu_invalid_wreg_ext(struct amdgpu_device *adev, uint64_t reg, uint32_t v) ··· 3755 3790 3756 3791 amdgpu_reg_access_init(adev); 3757 3792 3758 3758 - adev->pcie_rreg = &amdgpu_invalid_rreg; 3759 3759 - adev->pcie_wreg = &amdgpu_invalid_wreg; 3760 3793 adev->pcie_rreg_ext = &amdgpu_invalid_rreg_ext; 3761 3794 adev->pcie_wreg_ext = &amdgpu_invalid_wreg_ext; 3762 3795 adev->pcie_rreg64 = &amdgpu_invalid_rreg64;

+25 -5

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

reviewed

··· 59 59 adev->reg.audio_endpt.rreg = NULL; 60 60 adev->reg.audio_endpt.wreg = NULL; 61 61 62 62 + adev->reg.pcie.rreg = NULL; 63 63 + adev->reg.pcie.wreg = NULL; 62 64 adev->reg.pcie.port_rreg = NULL; 63 65 adev->reg.pcie.port_wreg = NULL; 64 66 } ··· 184 182 adev->reg.audio_endpt.wreg(adev, block, reg, v); 185 183 } 186 184 185 185 + uint32_t amdgpu_reg_pcie_rd32(struct amdgpu_device *adev, uint32_t reg) 186 186 + { 187 187 + if (!adev->reg.pcie.rreg) { 188 188 + dev_err_once(adev->dev, "PCIE register read not supported\n"); 189 189 + return 0; 190 190 + } 191 191 + return adev->reg.pcie.rreg(adev, reg); 192 192 + } 193 193 + 194 194 + void amdgpu_reg_pcie_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v) 195 195 + { 196 196 + if (!adev->reg.pcie.wreg) { 197 197 + dev_err_once(adev->dev, "PCIE register write not supported\n"); 198 198 + return; 199 199 + } 200 200 + adev->reg.pcie.wreg(adev, reg, v); 201 201 + } 202 202 + 187 203 uint32_t amdgpu_reg_pciep_rd32(struct amdgpu_device *adev, uint32_t reg) 188 204 { 189 205 if (!adev->reg.pcie.port_rreg) { ··· 251 231 ret = readl(((void __iomem *)adev->rmmio) + (reg * 4)); 252 232 } 253 233 } else { 254 254 - ret = adev->pcie_rreg(adev, reg * 4); 234 234 + ret = amdgpu_reg_pcie_rd32(adev, reg * 4); 255 235 } 256 236 257 237 trace_amdgpu_device_rreg(adev->pdev->device, reg, ret); ··· 316 296 ret = readl(((void __iomem *)adev->rmmio) + (reg * 4)); 317 297 } 318 298 } else { 319 319 - ret = adev->pcie_rreg(adev, reg * 4); 299 299 + ret = amdgpu_reg_pcie_rd32(adev, reg * 4); 320 300 } 321 301 322 302 return ret; ··· 374 354 writel(v, ((void __iomem *)adev->rmmio) + (reg * 4)); 375 355 } 376 356 } else { 377 377 - adev->pcie_wreg(adev, reg * 4, v); 357 357 + amdgpu_reg_pcie_wr32(adev, reg * 4, v); 378 358 } 379 359 380 360 trace_amdgpu_device_wreg(adev->pdev->device, reg, v); ··· 401 381 if (adev->gfx.rlc.funcs->is_rlcg_access_range(adev, reg)) 402 382 return amdgpu_sriov_wreg(adev, reg, v, 0, 0, xcc_id); 403 383 } else if ((reg * 4) >= adev->rmmio_size) { 404 404 - adev->pcie_wreg(adev, reg * 4, v); 384 384 + amdgpu_reg_pcie_wr32(adev, reg * 4, v); 405 385 } else { 406 386 writel(v, ((void __iomem *)adev->rmmio) + (reg * 4)); 407 387 } ··· 442 422 writel(v, ((void __iomem *)adev->rmmio) + (reg * 4)); 443 423 } 444 424 } else { 445 445 - adev->pcie_wreg(adev, reg * 4, v); 425 425 + amdgpu_reg_pcie_wr32(adev, reg * 4, v); 446 426 } 447 427 } 448 428

+4

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.h

reviewed

··· 50 50 }; 51 51 52 52 struct amdgpu_reg_pcie_ind { 53 53 + amdgpu_rreg_t rreg; 54 54 + amdgpu_wreg_t wreg; 53 55 amdgpu_rreg_t port_rreg; 54 56 amdgpu_wreg_t port_wreg; 55 57 }; ··· 83 81 uint32_t reg); 84 82 void amdgpu_reg_audio_endpt_wr32(struct amdgpu_device *adev, uint32_t block, 85 83 uint32_t reg, uint32_t v); 84 84 + uint32_t amdgpu_reg_pcie_rd32(struct amdgpu_device *adev, uint32_t reg); 85 85 + void amdgpu_reg_pcie_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v); 86 86 uint32_t amdgpu_reg_pciep_rd32(struct amdgpu_device *adev, uint32_t reg); 87 87 void amdgpu_reg_pciep_wr32(struct amdgpu_device *adev, uint32_t reg, 88 88 uint32_t v);

+2 -2

drivers/gpu/drm/amd/amdgpu/cik.c

reviewed

··· 1986 1986 1987 1987 adev->reg.smc.rreg = cik_smc_rreg; 1988 1988 adev->reg.smc.wreg = cik_smc_wreg; 1989 1989 - adev->pcie_rreg = &cik_pcie_rreg; 1990 1990 - adev->pcie_wreg = &cik_pcie_wreg; 1989 1989 + adev->reg.pcie.rreg = &cik_pcie_rreg; 1990 1990 + adev->reg.pcie.wreg = &cik_pcie_wreg; 1991 1991 adev->reg.uvd_ctx.rreg = &cik_uvd_ctx_rreg; 1992 1992 adev->reg.uvd_ctx.wreg = &cik_uvd_ctx_wreg; 1993 1993 adev->reg.didt.rreg = &cik_didt_rreg;

+2 -2

drivers/gpu/drm/amd/amdgpu/nv.c

reviewed

··· 635 635 struct amdgpu_device *adev = ip_block->adev; 636 636 637 637 adev->nbio.funcs->set_reg_remap(adev); 638 638 - adev->pcie_rreg = &amdgpu_device_indirect_rreg; 639 639 - adev->pcie_wreg = &amdgpu_device_indirect_wreg; 638 638 + adev->reg.pcie.rreg = &amdgpu_device_indirect_rreg; 639 639 + adev->reg.pcie.wreg = &amdgpu_device_indirect_wreg; 640 640 adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64; 641 641 adev->pcie_wreg64 = &amdgpu_device_indirect_wreg64; 642 642 adev->reg.pcie.port_rreg = &amdgpu_device_pcie_port_rreg;

+2 -2

drivers/gpu/drm/amd/amdgpu/si.c

reviewed

··· 2039 2039 2040 2040 adev->reg.smc.rreg = si_smc_rreg; 2041 2041 adev->reg.smc.wreg = si_smc_wreg; 2042 2042 - adev->pcie_rreg = &si_pcie_rreg; 2043 2043 - adev->pcie_wreg = &si_pcie_wreg; 2042 2042 + adev->reg.pcie.rreg = &si_pcie_rreg; 2043 2043 + adev->reg.pcie.wreg = &si_pcie_wreg; 2044 2044 adev->reg.pcie.port_rreg = &si_pciep_rreg; 2045 2045 adev->reg.pcie.port_wreg = &si_pciep_wreg; 2046 2046 adev->reg.uvd_ctx.rreg = &si_uvd_ctx_rreg;

+2 -2

drivers/gpu/drm/amd/amdgpu/soc15.c

reviewed

··· 961 961 struct amdgpu_device *adev = ip_block->adev; 962 962 963 963 adev->nbio.funcs->set_reg_remap(adev); 964 964 - adev->pcie_rreg = &amdgpu_device_indirect_rreg; 965 965 - adev->pcie_wreg = &amdgpu_device_indirect_wreg; 964 964 + adev->reg.pcie.rreg = &amdgpu_device_indirect_rreg; 965 965 + adev->reg.pcie.wreg = &amdgpu_device_indirect_wreg; 966 966 adev->pcie_rreg_ext = &amdgpu_device_indirect_rreg_ext; 967 967 adev->pcie_wreg_ext = &amdgpu_device_indirect_wreg_ext; 968 968 adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64;

+2 -2

drivers/gpu/drm/amd/amdgpu/soc21.c

reviewed

··· 589 589 struct amdgpu_device *adev = ip_block->adev; 590 590 591 591 adev->nbio.funcs->set_reg_remap(adev); 592 592 - adev->pcie_rreg = &amdgpu_device_indirect_rreg; 593 593 - adev->pcie_wreg = &amdgpu_device_indirect_wreg; 592 592 + adev->reg.pcie.rreg = &amdgpu_device_indirect_rreg; 593 593 + adev->reg.pcie.wreg = &amdgpu_device_indirect_wreg; 594 594 adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64; 595 595 adev->pcie_wreg64 = &amdgpu_device_indirect_wreg64; 596 596 adev->reg.pcie.port_rreg = &amdgpu_device_pcie_port_rreg;

+2 -2

drivers/gpu/drm/amd/amdgpu/soc24.c

reviewed

··· 362 362 struct amdgpu_device *adev = ip_block->adev; 363 363 364 364 adev->nbio.funcs->set_reg_remap(adev); 365 365 - adev->pcie_rreg = &amdgpu_device_indirect_rreg; 366 366 - adev->pcie_wreg = &amdgpu_device_indirect_wreg; 365 365 + adev->reg.pcie.rreg = &amdgpu_device_indirect_rreg; 366 366 + adev->reg.pcie.wreg = &amdgpu_device_indirect_wreg; 367 367 adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64; 368 368 adev->pcie_wreg64 = &amdgpu_device_indirect_wreg64; 369 369 adev->reg.pcie.port_rreg = &amdgpu_device_pcie_port_rreg;

+2 -2

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

reviewed

··· 250 250 { 251 251 struct amdgpu_device *adev = ip_block->adev; 252 252 253 253 - adev->pcie_rreg = &amdgpu_device_indirect_rreg; 254 254 - adev->pcie_wreg = &amdgpu_device_indirect_wreg; 253 253 + adev->reg.pcie.rreg = &amdgpu_device_indirect_rreg; 254 254 + adev->reg.pcie.wreg = &amdgpu_device_indirect_wreg; 255 255 adev->pcie_rreg_ext = &amdgpu_device_indirect_rreg_ext; 256 256 adev->pcie_wreg_ext = &amdgpu_device_indirect_wreg_ext; 257 257 adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64;

+2 -2

drivers/gpu/drm/amd/amdgpu/vi.c

reviewed

··· 1460 1460 adev->reg.smc.rreg = vi_smc_rreg; 1461 1461 adev->reg.smc.wreg = vi_smc_wreg; 1462 1462 } 1463 1463 - adev->pcie_rreg = &vi_pcie_rreg; 1464 1464 - adev->pcie_wreg = &vi_pcie_wreg; 1463 1463 + adev->reg.pcie.rreg = &vi_pcie_rreg; 1464 1464 + adev->reg.pcie.wreg = &vi_pcie_wreg; 1465 1465 adev->reg.uvd_ctx.rreg = &vi_uvd_ctx_rreg; 1466 1466 adev->reg.uvd_ctx.wreg = &vi_uvd_ctx_wreg; 1467 1467 adev->reg.didt.rreg = &vi_didt_rreg;