dmaengine: imx-sdma: support hdmi in sdma

The hdmi script already supported in sdma firmware. So add support hdmi
in sdma driver.

The design of hdmi script is different from common script such as sai.
There is no need to config buffer descriptor for HDMI. The cyclic
capability is achieved by the hdmi script. The slave config is so simple,
only config src_addr, dts_addr and direction DMA_TRANS_NONE.

Signed-off-by: Joy Zou <joy.zou@nxp.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.kernel.org/r/20221115093823.2879128-3-joy.zou@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Joy Zou and committed by

Vinod Koul 3 years ago e873d432 7bdbd87d

+31 -8

2 changed files

expand all

drivers

dma

imx-sdma.c

include

linux

dma

imx-dma.h

+30 -8

drivers/dma/imx-sdma.c

··· 954 954 desc = sdmac->desc; 955 955 if (desc) { 956 956 if (sdmac->flags & IMX_DMA_SG_LOOP) { 957 - sdma_update_channel_loop(sdmac); 957 + if (sdmac->peripheral_type != IMX_DMATYPE_HDMI) 958 + sdma_update_channel_loop(sdmac); 959 + else 960 + vchan_cyclic_callback(&desc->vd); 958 961 } else { 959 962 mxc_sdma_handle_channel_normal(sdmac); 960 963 vchan_cookie_complete(&desc->vd); ··· 1077 1074 per_2_emi = sdma->script_addrs->sai_2_mcu_addr; 1078 1075 emi_2_per = sdma->script_addrs->mcu_2_sai_addr; 1079 1076 break; 1077 + case IMX_DMATYPE_HDMI: 1078 + emi_2_per = sdma->script_addrs->hdmi_dma_addr; 1079 + sdmac->is_ram_script = true; 1080 + break; 1080 1081 default: 1081 1082 dev_err(sdma->dev, "Unsupported transfer type %d\n", 1082 1083 peripheral_type); ··· 1132 1125 /* Send by context the event mask,base address for peripheral 1133 1126 * and watermark level 1134 1127 */ 1135 - context->gReg[0] = sdmac->event_mask[1]; 1136 - context->gReg[1] = sdmac->event_mask[0]; 1137 - context->gReg[2] = sdmac->per_addr; 1138 - context->gReg[6] = sdmac->shp_addr; 1139 - context->gReg[7] = sdmac->watermark_level; 1128 + if (sdmac->peripheral_type == IMX_DMATYPE_HDMI) { 1129 + context->gReg[4] = sdmac->per_addr; 1130 + context->gReg[6] = sdmac->shp_addr; 1131 + } else { 1132 + context->gReg[0] = sdmac->event_mask[1]; 1133 + context->gReg[1] = sdmac->event_mask[0]; 1134 + context->gReg[2] = sdmac->per_addr; 1135 + context->gReg[6] = sdmac->shp_addr; 1136 + context->gReg[7] = sdmac->watermark_level; 1137 + } 1140 1138 1141 1139 bd0->mode.command = C0_SETDM; 1142 1140 bd0->mode.status = BD_DONE | BD_WRAP | BD_EXTD; ··· 1525 1513 desc->sdmac = sdmac; 1526 1514 desc->num_bd = bds; 1527 1515 1528 - if (sdma_alloc_bd(desc)) 1516 + if (bds && sdma_alloc_bd(desc)) 1529 1517 goto err_desc_out; 1530 1518 1531 1519 /* No slave_config called in MEMCPY case, so do here */ ··· 1690 1678 { 1691 1679 struct sdma_channel *sdmac = to_sdma_chan(chan); 1692 1680 struct sdma_engine *sdma = sdmac->sdma; 1693 - int num_periods = buf_len / period_len; 1681 + int num_periods = 0; 1694 1682 int channel = sdmac->channel; 1695 1683 int i = 0, buf = 0; 1696 1684 struct sdma_desc *desc; 1697 1685 1698 1686 dev_dbg(sdma->dev, "%s channel: %d\n", __func__, channel); 1687 + 1688 + if (sdmac->peripheral_type != IMX_DMATYPE_HDMI) 1689 + num_periods = buf_len / period_len; 1699 1690 1700 1691 sdma_config_write(chan, &sdmac->slave_config, direction); 1701 1692 ··· 1715 1700 channel, period_len, SDMA_BD_MAX_CNT); 1716 1701 goto err_bd_out; 1717 1702 } 1703 + 1704 + if (sdmac->peripheral_type == IMX_DMATYPE_HDMI) 1705 + return vchan_tx_prep(&sdmac->vc, &desc->vd, flags); 1718 1706 1719 1707 while (buf < buf_len) { 1720 1708 struct sdma_buffer_descriptor *bd = &desc->bd[i]; ··· 1779 1761 sdmac->watermark_level |= (dmaengine_cfg->dst_maxburst << 16) & 1780 1762 SDMA_WATERMARK_LEVEL_HWML; 1781 1763 sdmac->word_size = dmaengine_cfg->dst_addr_width; 1764 + } else if (sdmac->peripheral_type == IMX_DMATYPE_HDMI) { 1765 + sdmac->per_address = dmaengine_cfg->dst_addr; 1766 + sdmac->per_address2 = dmaengine_cfg->src_addr; 1767 + sdmac->watermark_level = 0; 1782 1768 } else { 1783 1769 sdmac->per_address = dmaengine_cfg->dst_addr; 1784 1770 sdmac->watermark_level = dmaengine_cfg->dst_maxburst *

include/linux/dma/imx-dma.h

··· 40 40 IMX_DMATYPE_ASRC_SP, /* Shared ASRC */ 41 41 IMX_DMATYPE_SAI, /* SAI */ 42 42 IMX_DMATYPE_MULTI_SAI, /* MULTI FIFOs For Audio */ 43 + IMX_DMATYPE_HDMI, /* HDMI Audio */ 43 44 }; 44 45 45 46 enum imx_dma_prio {

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