Merge tag 'ntb-5.1' of git://github.com/jonmason/ntb

+19 -6

drivers/ntb/hw/intel/ntb_hw_gen1.c

··· 180 180 return ndev->reg->mw_bar[idx]; 181 181 } 182 182 183 - static inline int ndev_db_addr(struct intel_ntb_dev *ndev, 183 + void ndev_db_addr(struct intel_ntb_dev *ndev, 184 184 phys_addr_t *db_addr, resource_size_t *db_size, 185 185 phys_addr_t reg_addr, unsigned long reg) 186 186 { ··· 196 196 *db_size = ndev->reg->db_size; 197 197 dev_dbg(&ndev->ntb.pdev->dev, "Peer db size %llx\n", *db_size); 198 198 } 199 - 200 - return 0; 201 199 } 202 200 203 201 u64 ndev_db_read(struct intel_ntb_dev *ndev, ··· 1109 1111 ndev->self_reg->db_mask); 1110 1112 } 1111 1113 1112 - int intel_ntb_peer_db_addr(struct ntb_dev *ntb, phys_addr_t *db_addr, 1113 - resource_size_t *db_size) 1114 + static int intel_ntb_peer_db_addr(struct ntb_dev *ntb, phys_addr_t *db_addr, 1115 + resource_size_t *db_size, u64 *db_data, int db_bit) 1114 1116 { 1117 + u64 db_bits; 1115 1118 struct intel_ntb_dev *ndev = ntb_ndev(ntb); 1116 1119 1117 - return ndev_db_addr(ndev, db_addr, db_size, ndev->peer_addr, 1120 + if (unlikely(db_bit >= BITS_PER_LONG_LONG)) 1121 + return -EINVAL; 1122 + 1123 + db_bits = BIT_ULL(db_bit); 1124 + 1125 + if (unlikely(db_bits & ~ntb_ndev(ntb)->db_valid_mask)) 1126 + return -EINVAL; 1127 + 1128 + ndev_db_addr(ndev, db_addr, db_size, ndev->peer_addr, 1118 1129 ndev->peer_reg->db_bell); 1130 + 1131 + if (db_data) 1132 + *db_data = db_bits; 1133 + 1134 + 1135 + return 0; 1119 1136 } 1120 1137 1121 1138 static int intel_ntb_peer_db_set(struct ntb_dev *ntb, u64 db_bits)

+3 -2

drivers/ntb/hw/intel/ntb_hw_gen1.h

··· 147 147 int ndev_init_isr(struct intel_ntb_dev *ndev, int msix_min, int msix_max, 148 148 int msix_shift, int total_shift); 149 149 enum ntb_topo xeon_ppd_topo(struct intel_ntb_dev *ndev, u8 ppd); 150 + void ndev_db_addr(struct intel_ntb_dev *ndev, 151 + phys_addr_t *db_addr, resource_size_t *db_size, 152 + phys_addr_t reg_addr, unsigned long reg); 150 153 u64 ndev_db_read(struct intel_ntb_dev *ndev, void __iomem *mmio); 151 154 int ndev_db_write(struct intel_ntb_dev *ndev, u64 db_bits, 152 155 void __iomem *mmio); ··· 169 166 u64 intel_ntb_db_vector_mask(struct ntb_dev *ntb, int db_vector); 170 167 int intel_ntb_db_set_mask(struct ntb_dev *ntb, u64 db_bits); 171 168 int intel_ntb_db_clear_mask(struct ntb_dev *ntb, u64 db_bits); 172 - int intel_ntb_peer_db_addr(struct ntb_dev *ntb, phys_addr_t *db_addr, 173 - resource_size_t *db_size); 174 169 int intel_ntb_spad_is_unsafe(struct ntb_dev *ntb); 175 170 int intel_ntb_spad_count(struct ntb_dev *ntb); 176 171 u32 intel_ntb_spad_read(struct ntb_dev *ntb, int idx);

+32 -1

drivers/ntb/hw/intel/ntb_hw_gen3.c

··· 532 532 return 0; 533 533 } 534 534 535 + int intel_ntb3_peer_db_addr(struct ntb_dev *ntb, phys_addr_t *db_addr, 536 + resource_size_t *db_size, 537 + u64 *db_data, int db_bit) 538 + { 539 + phys_addr_t db_addr_base; 540 + struct intel_ntb_dev *ndev = ntb_ndev(ntb); 541 + 542 + if (unlikely(db_bit >= BITS_PER_LONG_LONG)) 543 + return -EINVAL; 544 + 545 + if (unlikely(BIT_ULL(db_bit) & ~ntb_ndev(ntb)->db_valid_mask)) 546 + return -EINVAL; 547 + 548 + ndev_db_addr(ndev, &db_addr_base, db_size, ndev->peer_addr, 549 + ndev->peer_reg->db_bell); 550 + 551 + if (db_addr) { 552 + *db_addr = db_addr_base + (db_bit * 4); 553 + dev_dbg(&ndev->ntb.pdev->dev, "Peer db addr %llx db bit %d\n", 554 + *db_addr, db_bit); 555 + } 556 + 557 + if (db_data) { 558 + *db_data = 1; 559 + dev_dbg(&ndev->ntb.pdev->dev, "Peer db data %llx db bit %d\n", 560 + *db_data, db_bit); 561 + } 562 + 563 + return 0; 564 + } 565 + 535 566 static int intel_ntb3_peer_db_set(struct ntb_dev *ntb, u64 db_bits) 536 567 { 537 568 struct intel_ntb_dev *ndev = ntb_ndev(ntb); ··· 615 584 .db_clear = intel_ntb3_db_clear, 616 585 .db_set_mask = intel_ntb_db_set_mask, 617 586 .db_clear_mask = intel_ntb_db_clear_mask, 618 - .peer_db_addr = intel_ntb_peer_db_addr, 587 + .peer_db_addr = intel_ntb3_peer_db_addr, 619 588 .peer_db_set = intel_ntb3_peer_db_set, 620 589 .spad_is_unsafe = intel_ntb_spad_is_unsafe, 621 590 .spad_count = intel_ntb_spad_count,

+16 -4

drivers/ntb/hw/mscc/ntb_hw_switchtec.c

··· 236 236 ctl_val &= ~NTB_CTRL_BAR_DIR_WIN_EN; 237 237 iowrite32(ctl_val, &ctl->bar_entry[bar].ctl); 238 238 iowrite32(0, &ctl->bar_entry[bar].win_size); 239 + iowrite32(0, &ctl->bar_ext_entry[bar].win_size); 239 240 iowrite64(sndev->self_partition, &ctl->bar_entry[bar].xlate_addr); 240 241 } 241 242 ··· 259 258 ctl_val |= NTB_CTRL_BAR_DIR_WIN_EN; 260 259 261 260 iowrite32(ctl_val, &ctl->bar_entry[bar].ctl); 262 - iowrite32(xlate_pos | size, &ctl->bar_entry[bar].win_size); 261 + iowrite32(xlate_pos | (lower_32_bits(size) & 0xFFFFF000), 262 + &ctl->bar_entry[bar].win_size); 263 + iowrite32(upper_32_bits(size), &ctl->bar_ext_entry[bar].win_size); 263 264 iowrite64(sndev->self_partition | addr, 264 265 &ctl->bar_entry[bar].xlate_addr); 265 266 } ··· 682 679 683 680 static int switchtec_ntb_peer_db_addr(struct ntb_dev *ntb, 684 681 phys_addr_t *db_addr, 685 - resource_size_t *db_size) 682 + resource_size_t *db_size, 683 + u64 *db_data, 684 + int db_bit) 686 685 { 687 686 struct switchtec_ntb *sndev = ntb_sndev(ntb); 688 687 unsigned long offset; 688 + 689 + if (unlikely(db_bit >= BITS_PER_LONG_LONG)) 690 + return -EINVAL; 689 691 690 692 offset = (unsigned long)sndev->mmio_peer_dbmsg->odb - 691 693 (unsigned long)sndev->stdev->mmio; ··· 701 693 *db_addr = pci_resource_start(ntb->pdev, 0) + offset; 702 694 if (db_size) 703 695 *db_size = sizeof(u32); 696 + if (db_data) 697 + *db_data = BIT_ULL(db_bit) << sndev->db_peer_shift; 704 698 705 699 return 0; 706 700 } ··· 1035 1025 ctl_val |= NTB_CTRL_BAR_DIR_WIN_EN; 1036 1026 1037 1027 iowrite32(ctl_val, &ctl->bar_entry[bar].ctl); 1038 - iowrite32(xlate_pos | size, &ctl->bar_entry[bar].win_size); 1028 + iowrite32(xlate_pos | (lower_32_bits(size) & 0xFFFFF000), 1029 + &ctl->bar_entry[bar].win_size); 1030 + iowrite32(upper_32_bits(size), &ctl->bar_ext_entry[bar].win_size); 1039 1031 iowrite64(sndev->peer_partition | addr, 1040 1032 &ctl->bar_entry[bar].xlate_addr); 1041 1033 } ··· 1104 1092 1105 1093 dev_dbg(&sndev->stdev->dev, 1106 1094 "Crosslink BAR%d addr: %llx\n", 1107 - i, bar_addr); 1095 + i*2, bar_addr); 1108 1096 1109 1097 if (bar_addr != bar_space * i) 1110 1098 continue;

+29 -2

drivers/ntb/ntb_transport.c

··· 144 144 struct list_head tx_free_q; 145 145 spinlock_t ntb_tx_free_q_lock; 146 146 void __iomem *tx_mw; 147 - dma_addr_t tx_mw_phys; 147 + phys_addr_t tx_mw_phys; 148 + size_t tx_mw_size; 149 + dma_addr_t tx_mw_dma_addr; 148 150 unsigned int tx_index; 149 151 unsigned int tx_max_entry; 150 152 unsigned int tx_max_frame; ··· 864 862 if (!nt->link_is_up) 865 863 cancel_delayed_work_sync(&nt->link_work); 866 864 865 + for (i = 0; i < nt->mw_count; i++) 866 + ntb_free_mw(nt, i); 867 + 867 868 /* The scratchpad registers keep the values if the remote side 868 869 * goes down, blast them now to give them a sane value the next 869 870 * time they are accessed ··· 1054 1049 tx_size = (unsigned int)mw_size / num_qps_mw; 1055 1050 qp_offset = tx_size * (qp_num / mw_count); 1056 1051 1052 + qp->tx_mw_size = tx_size; 1057 1053 qp->tx_mw = nt->mw_vec[mw_num].vbase + qp_offset; 1058 1054 if (!qp->tx_mw) 1059 1055 return -EINVAL; ··· 1650 1644 dma_cookie_t cookie; 1651 1645 1652 1646 device = chan->device; 1653 - dest = qp->tx_mw_phys + qp->tx_max_frame * entry->tx_index; 1647 + dest = qp->tx_mw_dma_addr + qp->tx_max_frame * entry->tx_index; 1654 1648 buff_off = (size_t)buf & ~PAGE_MASK; 1655 1649 dest_off = (size_t)dest & ~PAGE_MASK; 1656 1650 ··· 1869 1863 qp->rx_dma_chan = NULL; 1870 1864 } 1871 1865 1866 + if (qp->tx_dma_chan) { 1867 + qp->tx_mw_dma_addr = 1868 + dma_map_resource(qp->tx_dma_chan->device->dev, 1869 + qp->tx_mw_phys, qp->tx_mw_size, 1870 + DMA_FROM_DEVICE, 0); 1871 + if (dma_mapping_error(qp->tx_dma_chan->device->dev, 1872 + qp->tx_mw_dma_addr)) { 1873 + qp->tx_mw_dma_addr = 0; 1874 + goto err1; 1875 + } 1876 + } 1877 + 1872 1878 dev_dbg(&pdev->dev, "Using %s memcpy for TX\n", 1873 1879 qp->tx_dma_chan ? "DMA" : "CPU"); 1874 1880 ··· 1922 1904 qp->rx_alloc_entry = 0; 1923 1905 while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q))) 1924 1906 kfree(entry); 1907 + if (qp->tx_mw_dma_addr) 1908 + dma_unmap_resource(qp->tx_dma_chan->device->dev, 1909 + qp->tx_mw_dma_addr, qp->tx_mw_size, 1910 + DMA_FROM_DEVICE, 0); 1925 1911 if (qp->tx_dma_chan) 1926 1912 dma_release_channel(qp->tx_dma_chan); 1927 1913 if (qp->rx_dma_chan) ··· 1967 1945 */ 1968 1946 dma_sync_wait(chan, qp->last_cookie); 1969 1947 dmaengine_terminate_all(chan); 1948 + 1949 + dma_unmap_resource(chan->device->dev, 1950 + qp->tx_mw_dma_addr, qp->tx_mw_size, 1951 + DMA_FROM_DEVICE, 0); 1952 + 1970 1953 dma_release_channel(chan); 1971 1954 } 1972 1955

+7 -3

include/linux/ntb.h

··· 296 296 int (*db_clear_mask)(struct ntb_dev *ntb, u64 db_bits); 297 297 298 298 int (*peer_db_addr)(struct ntb_dev *ntb, 299 - phys_addr_t *db_addr, resource_size_t *db_size); 299 + phys_addr_t *db_addr, resource_size_t *db_size, 300 + u64 *db_data, int db_bit); 300 301 u64 (*peer_db_read)(struct ntb_dev *ntb); 301 302 int (*peer_db_set)(struct ntb_dev *ntb, u64 db_bits); 302 303 int (*peer_db_clear)(struct ntb_dev *ntb, u64 db_bits); ··· 1079 1078 * @ntb: NTB device context. 1080 1079 * @db_addr: OUT - The address of the peer doorbell register. 1081 1080 * @db_size: OUT - The number of bytes to write the peer doorbell register. 1081 + * @db_data: OUT - The data of peer doorbell register 1082 + * @db_bit: door bell bit number 1082 1083 * 1083 1084 * Return the address of the peer doorbell register. This may be used, for 1084 1085 * example, by drivers that offload memory copy operations to a dma engine. ··· 1094 1091 */ 1095 1092 static inline int ntb_peer_db_addr(struct ntb_dev *ntb, 1096 1093 phys_addr_t *db_addr, 1097 - resource_size_t *db_size) 1094 + resource_size_t *db_size, 1095 + u64 *db_data, int db_bit) 1098 1096 { 1099 1097 if (!ntb->ops->peer_db_addr) 1100 1098 return -EINVAL; 1101 1099 1102 - return ntb->ops->peer_db_addr(ntb, db_addr, db_size); 1100 + return ntb->ops->peer_db_addr(ntb, db_addr, db_size, db_data, db_bit); 1103 1101 } 1104 1102 1105 1103 /**

+7 -3

include/linux/switchtec.h

··· 248 248 u32 win_size; 249 249 u64 xlate_addr; 250 250 } bar_entry[6]; 251 - u32 reserved2[216]; 252 - u32 req_id_table[256]; 253 - u32 reserved3[512]; 251 + struct { 252 + u32 win_size; 253 + u32 reserved[3]; 254 + } bar_ext_entry[6]; 255 + u32 reserved2[192]; 256 + u32 req_id_table[512]; 257 + u32 reserved3[256]; 254 258 u64 lut_entry[512]; 255 259 } __packed; 256 260

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