tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/i915/dsi: Place clock into LP during LPM if requested

TGL/ADL DSI can be configured to place the clock lane into
LP state during LPM, if otherwise configured for continuous
HS clock.

Hook that up. VBT tells us whether this should be done.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260326111814.9800-6-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>

Ville Syrjälä e8a7efa8 765a2635

+10
+6
drivers/gpu/drm/i915/display/icl_dsi.c
··· 729 729 else 730 730 tmp |= CLK_HS_CONTINUOUS; 731 731 732 + if (DISPLAY_VER(display) >= 12 && 733 + intel_dsi->lp_clock_during_lpm) 734 + tmp |= LP_CLK_DURING_LPM; 735 + else 736 + tmp &= ~LP_CLK_DURING_LPM; 737 + 732 738 /* configure buffer threshold limit to minimum */ 733 739 tmp &= ~PIX_BUF_THRESHOLD_MASK; 734 740 tmp |= PIX_BUF_THRESHOLD_1_4;
+1
drivers/gpu/drm/i915/display/icl_dsi_regs.h
··· 227 227 #define CLK_ENTER_LP_AFTER_DATA (0x0 << 8) 228 228 #define CLK_HS_OR_LP (0x2 << 8) 229 229 #define CLK_HS_CONTINUOUS (0x3 << 8) 230 + #define LP_CLK_DURING_LPM (1 << 7) /* tgl+ */ 230 231 #define LINK_CALIBRATION_MASK (0x3 << 4) 231 232 #define LINK_CALIBRATION_SHIFT 4 232 233 #define CALIBRATION_DISABLED (0x0 << 4)
+1
drivers/gpu/drm/i915/display/intel_dsi.h
··· 80 80 /* NON_BURST_SYNC_PULSE, NON_BURST_SYNC_EVENTS, or BURST_MODE */ 81 81 int video_mode; 82 82 83 + bool lp_clock_during_lpm; 83 84 bool blanking_pkt; 84 85 bool eot_pkt; 85 86 bool clock_stop;
+2
drivers/gpu/drm/i915/display/intel_dsi_vbt.c
··· 718 718 "burst" : "<unknown>"); 719 719 drm_printf(&p, "Burst mode ratio %d\n", intel_dsi->burst_mode_ratio); 720 720 drm_printf(&p, "Reset timer %d\n", intel_dsi->rst_timer_val); 721 + drm_printf(&p, "LP clock during LPM %s\n", str_enabled_disabled(intel_dsi->lp_clock_during_lpm)); 721 722 drm_printf(&p, "Blanking packets during BLLP %s\n", str_enabled_disabled(intel_dsi->blanking_pkt)); 722 723 drm_printf(&p, "EoT packet %s\n", str_enabled_disabled(intel_dsi->eot_pkt)); 723 724 drm_printf(&p, "Clock stop during BLLP %s\n", str_enabled_disabled(intel_dsi->clock_stop)); ··· 772 771 773 772 drm_dbg_kms(display->drm, "\n"); 774 773 774 + intel_dsi->lp_clock_during_lpm = mipi_config->lp_clock_during_lpm; 775 775 intel_dsi->blanking_pkt = mipi_config->blanking_packets_during_bllp; 776 776 intel_dsi->eot_pkt = !mipi_config->eot_pkt_disabled; 777 777 intel_dsi->clock_stop = mipi_config->enable_clk_stop;