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dt-bindings: phy: qcom,qmp-usb: fix sc8280xp binding

The current QMP USB PHY bindings are based on the original MSM8996 PCIe
PHY binding which provided multiple PHYs per IP block and these in turn
were described by child nodes.

The QMP USB PHY block only provide a single PHY and the remnant child
node does not really reflect the hardware.

The original MSM8996 binding also ended up describing the individual
register blocks as belonging to either the wrapper node or the PHY child
nodes.

This is an unnecessary level of detail which has lead to problems when
later IP blocks using different register layouts have been forced to fit
the original mould rather than updating the binding. The bindings are
arguable also incomplete as they only the describe register blocks used
by the current Linux drivers (e.g. does not include the per lane PCS
registers).

Note that PCS_USB region is also not described by the current bindings
despite being used by the driver and this has led to people increasing
the size of the PCS region in the devicetree so that it includes PCS_USB
registers even though other regions like TX and RX may lie in between.

Add a new binding for the QMP USB PHYs found on SC8280XP which further
bindings can be based on.

Note that this also fixes the SC8280XP "phy_phy" reset name.

Also note that the current binding is simply removed instead of being
deprecated as it was only recently merged and support for SC8280XP is
still under development. And, specifically, there is no support in
mainline for the multiport controller that uses these PHYs.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221028160435.26948-12-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Johan Hovold and committed by
Vinod Koul
e8e58e29 500e9d37

+105 -13
-13
Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml
··· 26 26 - qcom,qcm2290-qmp-usb3-phy 27 27 - qcom,sc7180-qmp-usb3-phy 28 28 - qcom,sc8180x-qmp-usb3-phy 29 - - qcom,sc8280xp-qmp-usb3-uni-phy 30 29 - qcom,sdm845-qmp-usb3-phy 31 30 - qcom,sdm845-qmp-usb3-uni-phy 32 31 - qcom,sdx55-qmp-usb3-uni-phy ··· 203 204 compatible: 204 205 contains: 205 206 enum: 206 - - qcom,sc8280xp-qmp-usb3-uni-phy 207 207 - qcom,sm8150-qmp-usb3-phy 208 208 - qcom,sm8150-qmp-usb3-uni-phy 209 209 - qcom,sm8250-qmp-usb3-uni-phy ··· 268 270 items: 269 271 - const: phy_phy 270 272 - const: phy 271 - 272 - - if: 273 - properties: 274 - compatible: 275 - contains: 276 - enum: 277 - - qcom,sc8280xp-qmp-usb3-uni-phy 278 - then: 279 - required: 280 - - power-domains 281 273 282 274 - if: 283 275 properties: ··· 340 352 contains: 341 353 enum: 342 354 - qcom,msm8996-qmp-usb3-phy 343 - - qcom,sc8280xp-qmp-usb3-uni-phy 344 355 - qcom,sm8250-qmp-usb3-uni-phy 345 356 - qcom,sm8350-qmp-usb3-uni-phy 346 357 then:
+105
Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Qualcomm QMP PHY controller (USB, SC8280XP) 8 + 9 + maintainers: 10 + - Vinod Koul <vkoul@kernel.org> 11 + 12 + description: 13 + The QMP PHY controller supports physical layer functionality for a number of 14 + controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB. 15 + 16 + properties: 17 + compatible: 18 + enum: 19 + - qcom,sc8280xp-qmp-usb3-uni-phy 20 + 21 + reg: 22 + maxItems: 1 23 + 24 + clocks: 25 + maxItems: 5 26 + 27 + clock-names: 28 + items: 29 + - const: aux 30 + - const: ref_clk_src 31 + - const: ref 32 + - const: com_aux 33 + - const: pipe 34 + 35 + power-domains: 36 + maxItems: 1 37 + 38 + resets: 39 + maxItems: 2 40 + 41 + reset-names: 42 + items: 43 + - const: phy 44 + - const: phy_phy 45 + 46 + vdda-phy-supply: true 47 + 48 + vdda-pll-supply: true 49 + 50 + "#clock-cells": 51 + const: 0 52 + 53 + clock-output-names: 54 + maxItems: 1 55 + 56 + "#phy-cells": 57 + const: 0 58 + 59 + required: 60 + - compatible 61 + - reg 62 + - clocks 63 + - clock-names 64 + - power-domains 65 + - resets 66 + - reset-names 67 + - vdda-phy-supply 68 + - vdda-pll-supply 69 + - "#clock-cells" 70 + - clock-output-names 71 + - "#phy-cells" 72 + 73 + additionalProperties: false 74 + 75 + examples: 76 + - | 77 + #include <dt-bindings/clock/qcom,gcc-sc8280xp.h> 78 + #include <dt-bindings/clock/qcom,rpmh.h> 79 + 80 + phy@88ef000 { 81 + compatible = "qcom,sc8280xp-qmp-usb3-uni-phy"; 82 + reg = <0x088ef000 0x2000>; 83 + 84 + clocks = <&gcc GCC_USB3_MP_PHY_AUX_CLK>, 85 + <&rpmhcc RPMH_CXO_CLK>, 86 + <&gcc GCC_USB3_MP0_CLKREF_CLK>, 87 + <&gcc GCC_USB3_MP_PHY_COM_AUX_CLK>, 88 + <&gcc GCC_USB3_MP_PHY_PIPE_0_CLK>; 89 + clock-names = "aux", "ref_clk_src", "ref", "com_aux", 90 + "pipe"; 91 + 92 + power-domains = <&gcc USB30_MP_GDSC>; 93 + 94 + resets = <&gcc GCC_USB3_UNIPHY_MP0_BCR>, 95 + <&gcc GCC_USB3UNIPHY_PHY_MP0_BCR>; 96 + reset-names = "phy", "phy_phy"; 97 + 98 + vdda-phy-supply = <&vreg_l3a>; 99 + vdda-pll-supply = <&vreg_l5a>; 100 + 101 + #clock-cells = <0>; 102 + clock-output-names = "usb2_phy0_pipe_clk"; 103 + 104 + #phy-cells = <0>; 105 + };