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drm/amd/dc: Use atombios api directly in DC

In order to remove the cgs wrapper functions for atombios api.

Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Rex Zhu and committed by
Alex Deucher
e8ee21d2 d32d6617

+28 -20
+12 -10
drivers/gpu/drm/amd/display/dc/bios/command_table.c
··· 24 24 */ 25 25 26 26 #include "dm_services.h" 27 - 27 + #include "amdgpu.h" 28 28 #include "atom.h" 29 29 30 30 #include "include/bios_parser_interface.h" ··· 35 35 #include "bios_parser_types_internal.h" 36 36 37 37 #define EXEC_BIOS_CMD_TABLE(command, params)\ 38 - (cgs_atom_exec_cmd_table(bp->base.ctx->cgs_device, \ 38 + (amdgpu_atom_execute_table(((struct amdgpu_device *)bp->base.ctx->driver_context)->mode_info.atom_context, \ 39 39 GetIndexIntoMasterTable(COMMAND, command), \ 40 - &params) == 0) 40 + (uint32_t *)&params) == 0) 41 41 42 42 #define BIOS_CMD_TABLE_REVISION(command, frev, crev)\ 43 - cgs_atom_get_cmd_table_revs(bp->base.ctx->cgs_device, \ 43 + amdgpu_atom_parse_cmd_header(((struct amdgpu_device *)bp->base.ctx->driver_context)->mode_info.atom_context, \ 44 44 GetIndexIntoMasterTable(COMMAND, command), &frev, &crev) 45 45 46 46 #define BIOS_CMD_TABLE_PARA_REVISION(command)\ 47 - bios_cmd_table_para_revision(bp->base.ctx->cgs_device, \ 47 + bios_cmd_table_para_revision(bp->base.ctx->driver_context, \ 48 48 GetIndexIntoMasterTable(COMMAND, command)) 49 49 50 50 static void init_dig_encoder_control(struct bios_parser *bp); ··· 82 82 init_set_dce_clock(bp); 83 83 } 84 84 85 - static uint32_t bios_cmd_table_para_revision(void *cgs_device, 85 + static uint32_t bios_cmd_table_para_revision(void *dev, 86 86 uint32_t index) 87 87 { 88 + struct amdgpu_device *adev = dev; 88 89 uint8_t frev, crev; 89 90 90 - if (cgs_atom_get_cmd_table_revs(cgs_device, 91 + if (amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, 91 92 index, 92 - &frev, &crev) != 0) 93 + &frev, &crev)) 94 + return crev; 95 + else 93 96 return 0; 94 - return crev; 95 97 } 96 98 97 99 /******************************************************************************* ··· 370 368 uint8_t crev; 371 369 372 370 if (BIOS_CMD_TABLE_REVISION(UNIPHYTransmitterControl, 373 - frev, crev) != 0) 371 + frev, crev) == false) 374 372 BREAK_TO_DEBUGGER(); 375 373 switch (crev) { 376 374 case 2:
+16 -10
drivers/gpu/drm/amd/display/dc/bios/command_table2.c
··· 26 26 #include "dm_services.h" 27 27 28 28 #include "ObjectID.h" 29 - #include "atomfirmware.h" 30 29 30 + #include "atomfirmware.h" 31 + #include "atom.h" 31 32 #include "include/bios_parser_interface.h" 32 33 33 34 #include "command_table2.h" 34 35 #include "command_table_helper2.h" 35 36 #include "bios_parser_helper.h" 36 37 #include "bios_parser_types_internal2.h" 38 + #include "amdgpu.h" 39 + 40 + 37 41 #define DC_LOGGER \ 38 42 bp->base.ctx->logger 39 43 ··· 47 43 ->FieldName)-(char *)0)/sizeof(uint16_t)) 48 44 49 45 #define EXEC_BIOS_CMD_TABLE(fname, params)\ 50 - (cgs_atom_exec_cmd_table(bp->base.ctx->cgs_device, \ 46 + (amdgpu_atom_execute_table(((struct amdgpu_device *)bp->base.ctx->driver_context)->mode_info.atom_context, \ 51 47 GET_INDEX_INTO_MASTER_TABLE(command, fname), \ 52 - &params) == 0) 48 + (uint32_t *)&params) == 0) 53 49 54 50 #define BIOS_CMD_TABLE_REVISION(fname, frev, crev)\ 55 - cgs_atom_get_cmd_table_revs(bp->base.ctx->cgs_device, \ 51 + amdgpu_atom_parse_cmd_header(((struct amdgpu_device *)bp->base.ctx->driver_context)->mode_info.atom_context, \ 56 52 GET_INDEX_INTO_MASTER_TABLE(command, fname), &frev, &crev) 57 53 58 54 #define BIOS_CMD_TABLE_PARA_REVISION(fname)\ 59 - bios_cmd_table_para_revision(bp->base.ctx->cgs_device, \ 55 + bios_cmd_table_para_revision(bp->base.ctx->driver_context, \ 60 56 GET_INDEX_INTO_MASTER_TABLE(command, fname)) 61 57 62 58 static void init_dig_encoder_control(struct bios_parser *bp); ··· 90 86 init_get_smu_clock_info(bp); 91 87 } 92 88 93 - static uint32_t bios_cmd_table_para_revision(void *cgs_device, 89 + static uint32_t bios_cmd_table_para_revision(void *dev, 94 90 uint32_t index) 95 91 { 92 + struct amdgpu_device *adev = dev; 96 93 uint8_t frev, crev; 97 94 98 - if (cgs_atom_get_cmd_table_revs(cgs_device, 95 + if (amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, 99 96 index, 100 - &frev, &crev) != 0) 97 + &frev, &crev)) 98 + return crev; 99 + else 101 100 return 0; 102 - return crev; 103 101 } 104 102 105 103 /****************************************************************************** ··· 207 201 uint8_t frev; 208 202 uint8_t crev; 209 203 210 - if (BIOS_CMD_TABLE_REVISION(dig1transmittercontrol, frev, crev) != 0) 204 + if (BIOS_CMD_TABLE_REVISION(dig1transmittercontrol, frev, crev) == false) 211 205 BREAK_TO_DEBUGGER(); 212 206 switch (crev) { 213 207 case 6: