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KVM: arm64: Fix Trace Buffer trap polarity for protected VMs

The E2TB bits in MDCR_EL2 control trapping of Trace Buffer system
register accesses. These accesses are trapped to EL2 when the bits are
clear.

The trap initialization logic for protected VMs in pvm_init_traps_mdcr()
had the polarity inverted. When a guest did not support the Trace Buffer
feature, the code was setting E2TB. This incorrectly disabled the trap,
potentially allowing a protected guest to access registers for a feature
it was not given.

Fix this by inverting the operation.

Fixes: f50758260bff ("KVM: arm64: Group setting traps for protected VMs by control register")
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Fuad Tabba <tabba@google.com>
Link: https://patch.msgid.link/20251211104710.151771-3-tabba@google.com
Signed-off-by: Marc Zyngier <maz@kernel.org>

authored by

Fuad Tabba and committed by
Marc Zyngier
e913c7ce 288eb554

+1 -1
+1 -1
arch/arm64/kvm/hyp/nvhe/pkvm.c
··· 118 118 val |= MDCR_EL2_TTRF; 119 119 120 120 if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, TraceBuffer, IMP)) 121 - val |= MDCR_EL2_E2TB_MASK; 121 + val &= ~MDCR_EL2_E2TB_MASK; 122 122 123 123 /* Trap Debug Communications Channel registers */ 124 124 if (!kvm_has_feat(kvm, ID_AA64MMFR0_EL1, FGT, IMP))