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Merge branch 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Pull i2c updates from Wolfram Sang:
"Usual driver bugfixes for the I2C subsystem"

* 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: algo: pca: Reapply i2c bus settings after reset
i2c: npcm7xx: Fix timeout calculation
misc: eeprom: at24: register nvmem only after eeprom is ready to use

+51 -18
+23 -12
drivers/i2c/algos/i2c-algo-pca.c
··· 41 41 pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET); 42 42 pca_outw(adap, I2C_PCA_IND, 0xA5); 43 43 pca_outw(adap, I2C_PCA_IND, 0x5A); 44 + 45 + /* 46 + * After a reset we need to re-apply any configuration 47 + * (calculated in pca_init) to get the bus in a working state. 48 + */ 49 + pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IMODE); 50 + pca_outw(adap, I2C_PCA_IND, adap->bus_settings.mode); 51 + pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_ISCLL); 52 + pca_outw(adap, I2C_PCA_IND, adap->bus_settings.tlow); 53 + pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_ISCLH); 54 + pca_outw(adap, I2C_PCA_IND, adap->bus_settings.thi); 55 + 56 + pca_set_con(adap, I2C_PCA_CON_ENSIO); 44 57 } else { 45 58 adap->reset_chip(adap->data); 59 + pca_set_con(adap, I2C_PCA_CON_ENSIO | adap->bus_settings.clock_freq); 46 60 } 47 61 } 48 62 ··· 437 423 " Use the nominal frequency.\n", adap->name); 438 424 } 439 425 440 - pca_reset(pca_data); 441 - 442 426 clock = pca_clock(pca_data); 443 427 printk(KERN_INFO "%s: Clock frequency is %dkHz\n", 444 428 adap->name, freqs[clock]); 445 429 446 - pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock); 430 + /* Store settings as these will be needed when the PCA chip is reset */ 431 + pca_data->bus_settings.clock_freq = clock; 432 + 433 + pca_reset(pca_data); 447 434 } else { 448 435 int clock; 449 436 int mode; ··· 511 496 thi = tlow * min_thi / min_tlow; 512 497 } 513 498 499 + /* Store settings as these will be needed when the PCA chip is reset */ 500 + pca_data->bus_settings.mode = mode; 501 + pca_data->bus_settings.tlow = tlow; 502 + pca_data->bus_settings.thi = thi; 503 + 514 504 pca_reset(pca_data); 515 505 516 506 printk(KERN_INFO 517 507 "%s: Clock frequency is %dHz\n", adap->name, clock * 100); 518 - 519 - pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE); 520 - pca_outw(pca_data, I2C_PCA_IND, mode); 521 - pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL); 522 - pca_outw(pca_data, I2C_PCA_IND, tlow); 523 - pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH); 524 - pca_outw(pca_data, I2C_PCA_IND, thi); 525 - 526 - pca_set_con(pca_data, I2C_PCA_CON_ENSIO); 527 508 } 528 509 udelay(500); /* 500 us for oscillator to stabilise */ 529 510
+6 -2
drivers/i2c/busses/i2c-npcm7xx.c
··· 2093 2093 } 2094 2094 } 2095 2095 2096 - /* Adaptive TimeOut: astimated time in usec + 100% margin */ 2097 - timeout_usec = (2 * 10000 / bus->bus_freq) * (2 + nread + nwrite); 2096 + /* 2097 + * Adaptive TimeOut: estimated time in usec + 100% margin: 2098 + * 2: double the timeout for clock stretching case 2099 + * 9: bits per transaction (including the ack/nack) 2100 + */ 2101 + timeout_usec = (2 * 9 * USEC_PER_SEC / bus->bus_freq) * (2 + nread + nwrite); 2098 2102 timeout = max(msecs_to_jiffies(35), usecs_to_jiffies(timeout_usec)); 2099 2103 if (nwrite >= 32 * 1024 || nread >= 32 * 1024) { 2100 2104 dev_err(bus->dev, "i2c%d buffer too big\n", bus->num);
+7 -4
drivers/misc/eeprom/at24.c
··· 692 692 nvmem_config.word_size = 1; 693 693 nvmem_config.size = byte_len; 694 694 695 - at24->nvmem = devm_nvmem_register(dev, &nvmem_config); 696 - if (IS_ERR(at24->nvmem)) 697 - return PTR_ERR(at24->nvmem); 698 - 699 695 i2c_set_clientdata(client, at24); 700 696 701 697 err = regulator_enable(at24->vcc_reg); ··· 703 707 /* enable runtime pm */ 704 708 pm_runtime_set_active(dev); 705 709 pm_runtime_enable(dev); 710 + 711 + at24->nvmem = devm_nvmem_register(dev, &nvmem_config); 712 + if (IS_ERR(at24->nvmem)) { 713 + pm_runtime_disable(dev); 714 + regulator_disable(at24->vcc_reg); 715 + return PTR_ERR(at24->nvmem); 716 + } 706 717 707 718 /* 708 719 * Perform a one-byte test read to verify that the
+15
include/linux/i2c-algo-pca.h
··· 53 53 #define I2C_PCA_CON_SI 0x08 /* Serial Interrupt */ 54 54 #define I2C_PCA_CON_CR 0x07 /* Clock Rate (MASK) */ 55 55 56 + /** 57 + * struct pca_i2c_bus_settings - The configured PCA i2c bus settings 58 + * @mode: Configured i2c bus mode 59 + * @tlow: Configured SCL LOW period 60 + * @thi: Configured SCL HIGH period 61 + * @clock_freq: The configured clock frequency 62 + */ 63 + struct pca_i2c_bus_settings { 64 + int mode; 65 + int tlow; 66 + int thi; 67 + int clock_freq; 68 + }; 69 + 56 70 struct i2c_algo_pca_data { 57 71 void *data; /* private low level data */ 58 72 void (*write_byte) (void *data, int reg, int val); ··· 78 64 * For PCA9665, use the frequency you want here. */ 79 65 unsigned int i2c_clock; 80 66 unsigned int chip; 67 + struct pca_i2c_bus_settings bus_settings; 81 68 }; 82 69 83 70 int i2c_pca_add_bus(struct i2c_adapter *);