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iommu/riscv: Disable SADE

In terms of the iommu subystem the SADE/GADE feature "3.4. IOMMU updating
of PTE accessed (A) and dirty (D) updates" is called dirty tracking.

There is no reason to enable HW support for this, and the HW cost
associated with it, unless dirty tracking is actually enabled through
iommufd. It should be a dynamic feature linked to user request.

Further, without implementing the read dirty ops the whole thing is
pointless.

Do not set DC.tc.SADE just because the HW has support for dirty tracking.

Tested-by: Vincent Chen <vincent.chen@sifive.com>
Acked-by: Paul Walmsley <pjw@kernel.org> # arch/riscv
Reviewed-by: Tomasz Jeznach <tjeznach@rivosinc.com>
Tested-by: Tomasz Jeznach <tjeznach@rivosinc.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>

authored by

Jason Gunthorpe and committed by
Joerg Roedel e93e4a63 e71e0012

-6
-6
drivers/iommu/riscv/iommu.c
··· 810 810 struct list_head bonds; 811 811 spinlock_t lock; /* protect bonds list updates. */ 812 812 int pscid; 813 - bool amo_enabled; 814 813 int numa_node; 815 814 unsigned int pgd_mode; 816 815 unsigned long *pgd_root; ··· 1200 1201 1201 1202 if (!(prot & IOMMU_WRITE)) 1202 1203 pte_prot = _PAGE_BASE | _PAGE_READ; 1203 - else if (domain->amo_enabled) 1204 - pte_prot = _PAGE_BASE | _PAGE_READ | _PAGE_WRITE; 1205 1204 else 1206 1205 pte_prot = _PAGE_BASE | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY; 1207 1206 ··· 1384 1387 INIT_LIST_HEAD_RCU(&domain->bonds); 1385 1388 spin_lock_init(&domain->lock); 1386 1389 domain->numa_node = dev_to_node(iommu->dev); 1387 - domain->amo_enabled = !!(iommu->caps & RISCV_IOMMU_CAPABILITIES_AMO_HWAD); 1388 1390 domain->pgd_mode = pgd_mode; 1389 1391 domain->pgd_root = iommu_alloc_pages_node_sz(domain->numa_node, 1390 1392 GFP_KERNEL_ACCOUNT, SZ_4K); ··· 1508 1512 * the device directory. Do not mark the context valid yet. 1509 1513 */ 1510 1514 tc = 0; 1511 - if (iommu->caps & RISCV_IOMMU_CAPABILITIES_AMO_HWAD) 1512 - tc |= RISCV_IOMMU_DC_TC_SADE; 1513 1515 for (i = 0; i < fwspec->num_ids; i++) { 1514 1516 dc = riscv_iommu_get_dc(iommu, fwspec->ids[i]); 1515 1517 if (!dc) {