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Merge branch 'fix-ptp-packet-drops-with-ocelot-8021q-dsa-tag-protocol'
Vladimir Oltean says:
====================
Fix PTP packet drops with ocelot-8021q DSA tag protocol
Changes in v2:
- Distinguish between L2 and L4 PTP packets
v1 at:
https://lore.kernel.org/netdev/20230626154003.3153076-1-vladimir.oltean@nxp.com/
Patch 3/3 fixes an issue with the ocelot/felix driver, where it would
drop PTP traffic on RX unless hardware timestamping for that packet type
was enabled.
Fixing that requires the driver to know whether it had previously
configured the hardware to timestamp PTP packets on that port. But it
cannot correctly determine that today using the existing code structure,
so patches 1/3 and 2/3 fix the control path of the code such that
ocelot->ports[port]->trap_proto faithfully reflects whether that
configuration took place.
====================
Link: https://lore.kernel.org/r/20230627163114.3561597-1-vladimir.oltean@nxp.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+60
-29
+12
drivers/net/dsa/ocelot/felix.c
+12
drivers/net/dsa/ocelot/felix.c
···
1725
1725
u32 tstamp_hi;
1726
1726
u64 tstamp;
1727
1727
1728
+
switch (type & PTP_CLASS_PMASK) {
1729
+
case PTP_CLASS_L2:
1730
+
if (!(ocelot->ports[port]->trap_proto & OCELOT_PROTO_PTP_L2))
1731
+
return false;
1732
+
break;
1733
+
case PTP_CLASS_IPV4:
1734
+
case PTP_CLASS_IPV6:
1735
+
if (!(ocelot->ports[port]->trap_proto & OCELOT_PROTO_PTP_L4))
1736
+
return false;
1737
+
break;
1738
+
}
1739
+
1728
1740
/* If the "no XTR IRQ" workaround is in use, tell DSA to defer this skb
1729
1741
* for RX timestamping. Then free it, and poll for its copy through
1730
1742
* MMIO in the CPU port module, and inject that into the stack from
-1
drivers/net/ethernet/mscc/ocelot.c
-1
drivers/net/ethernet/mscc/ocelot.c
+41
-25
drivers/net/ethernet/mscc/ocelot_ptp.c
+41
-25
drivers/net/ethernet/mscc/ocelot_ptp.c
···
439
439
static int ocelot_setup_ptp_traps(struct ocelot *ocelot, int port,
440
440
bool l2, bool l4)
441
441
{
442
+
struct ocelot_port *ocelot_port = ocelot->ports[port];
442
443
int err;
444
+
445
+
ocelot_port->trap_proto &= ~(OCELOT_PROTO_PTP_L2 |
446
+
OCELOT_PROTO_PTP_L4);
443
447
444
448
if (l2)
445
449
err = ocelot_l2_ptp_trap_add(ocelot, port);
···
468
464
if (err)
469
465
return err;
470
466
467
+
if (l2)
468
+
ocelot_port->trap_proto |= OCELOT_PROTO_PTP_L2;
469
+
if (l4)
470
+
ocelot_port->trap_proto |= OCELOT_PROTO_PTP_L4;
471
+
471
472
return 0;
472
473
473
474
err_ipv6:
···
483
474
return err;
484
475
}
485
476
477
+
static int ocelot_traps_to_ptp_rx_filter(unsigned int proto)
478
+
{
479
+
if ((proto & OCELOT_PROTO_PTP_L2) && (proto & OCELOT_PROTO_PTP_L4))
480
+
return HWTSTAMP_FILTER_PTP_V2_EVENT;
481
+
else if (proto & OCELOT_PROTO_PTP_L2)
482
+
return HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
483
+
else if (proto & OCELOT_PROTO_PTP_L4)
484
+
return HWTSTAMP_FILTER_PTP_V2_L4_EVENT;
485
+
486
+
return HWTSTAMP_FILTER_NONE;
487
+
}
488
+
486
489
int ocelot_hwstamp_get(struct ocelot *ocelot, int port, struct ifreq *ifr)
487
490
{
488
-
return copy_to_user(ifr->ifr_data, &ocelot->hwtstamp_config,
489
-
sizeof(ocelot->hwtstamp_config)) ? -EFAULT : 0;
491
+
struct ocelot_port *ocelot_port = ocelot->ports[port];
492
+
struct hwtstamp_config cfg = {};
493
+
494
+
switch (ocelot_port->ptp_cmd) {
495
+
case IFH_REW_OP_TWO_STEP_PTP:
496
+
cfg.tx_type = HWTSTAMP_TX_ON;
497
+
break;
498
+
case IFH_REW_OP_ORIGIN_PTP:
499
+
cfg.tx_type = HWTSTAMP_TX_ONESTEP_SYNC;
500
+
break;
501
+
default:
502
+
cfg.tx_type = HWTSTAMP_TX_OFF;
503
+
break;
504
+
}
505
+
506
+
cfg.rx_filter = ocelot_traps_to_ptp_rx_filter(ocelot_port->trap_proto);
507
+
508
+
return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
490
509
}
491
510
EXPORT_SYMBOL(ocelot_hwstamp_get);
492
511
···
546
509
return -ERANGE;
547
510
}
548
511
549
-
mutex_lock(&ocelot->ptp_lock);
550
-
551
512
switch (cfg.rx_filter) {
552
513
case HWTSTAMP_FILTER_NONE:
553
514
break;
···
566
531
l4 = true;
567
532
break;
568
533
default:
569
-
mutex_unlock(&ocelot->ptp_lock);
570
534
return -ERANGE;
571
535
}
572
536
573
537
err = ocelot_setup_ptp_traps(ocelot, port, l2, l4);
574
-
if (err) {
575
-
mutex_unlock(&ocelot->ptp_lock);
538
+
if (err)
576
539
return err;
577
-
}
578
540
579
-
if (l2 && l4)
580
-
cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
581
-
else if (l2)
582
-
cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
583
-
else if (l4)
584
-
cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;
585
-
else
586
-
cfg.rx_filter = HWTSTAMP_FILTER_NONE;
587
-
588
-
/* Commit back the result & save it */
589
-
memcpy(&ocelot->hwtstamp_config, &cfg, sizeof(cfg));
590
-
mutex_unlock(&ocelot->ptp_lock);
541
+
cfg.rx_filter = ocelot_traps_to_ptp_rx_filter(ocelot_port->trap_proto);
591
542
592
543
return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
593
544
}
···
844
823
ocelot_write(ocelot, 0xffffffff, ANA_TABLES_PTP_ID_HIGH);
845
824
846
825
ocelot_write(ocelot, PTP_CFG_MISC_PTP_EN, PTP_CFG_MISC);
847
-
848
-
/* There is no device reconfiguration, PTP Rx stamping is always
849
-
* enabled.
850
-
*/
851
-
ocelot->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
852
826
853
827
return 0;
854
828
}
+7
-3
include/soc/mscc/ocelot.h
+7
-3
include/soc/mscc/ocelot.h
···
730
730
ENTRYTYPE_MACv6,
731
731
};
732
732
733
+
enum ocelot_proto {
734
+
OCELOT_PROTO_PTP_L2 = BIT(0),
735
+
OCELOT_PROTO_PTP_L4 = BIT(1),
736
+
};
737
+
733
738
#define OCELOT_QUIRK_PCS_PERFORMS_RATE_ADAPTATION BIT(0)
734
739
#define OCELOT_QUIRK_QSGMII_PORTS_MUST_BE_UP BIT(1)
735
740
···
779
774
780
775
unsigned int ptp_skbs_in_flight;
781
776
struct sk_buff_head tx_skbs;
777
+
778
+
unsigned int trap_proto;
782
779
783
780
u16 mrp_ring_id;
784
781
···
875
868
u8 mm_supported:1;
876
869
struct ptp_clock *ptp_clock;
877
870
struct ptp_clock_info ptp_info;
878
-
struct hwtstamp_config hwtstamp_config;
879
871
unsigned int ptp_skbs_in_flight;
880
872
/* Protects the 2-step TX timestamp ID logic */
881
873
spinlock_t ts_id_lock;
882
-
/* Protects the PTP interface state */
883
-
struct mutex ptp_lock;
884
874
/* Protects the PTP clock */
885
875
spinlock_t ptp_clock_lock;
886
876
struct ptp_pin_desc ptp_pins[OCELOT_PTP_PINS_NUM];