Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
firmware: xilinx: Add firmware API's to support aes-gcm in Versal device
Add aes-gcm crypto API's for AMD/Xilinx Versal device.
Signed-off-by: Harsh Jain <h.jain@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
authored by
Harsh Jain
and committed by
Herbert Xu
e9f6870b
c315cb00
+223
-3
+149
-1
drivers/firmware/xilinx/zynqmp-crypto.c
+149
-1
drivers/firmware/xilinx/zynqmp-crypto.c
···
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/**
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* xlnx_get_crypto_dev_data() - Get crypto dev data of platform
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* @feature_map: List of available feature map of all platform
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* @feature_map: List of available feature map of all platform
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*
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* Return: Returns crypto dev data, either address crypto dev or ERR PTR
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*/
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return ERR_PTR(-ENODEV);
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}
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EXPORT_SYMBOL_GPL(xlnx_get_crypto_dev_data);
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/**
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* versal_pm_aes_key_write - Write AES key registers
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* @keylen: Size of the input key to be written
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* @keysrc: Key Source to be selected to which provided
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* key should be updated
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* @keyaddr: Address of a buffer which should contain the key
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* to be written
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*
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* This function provides support to write AES volatile user keys.
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*
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* Return: Returns status, either success or error+reason
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*/
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int versal_pm_aes_key_write(const u32 keylen,
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const u32 keysrc, const u64 keyaddr)
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{
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return zynqmp_pm_invoke_fn(XSECURE_API_AES_WRITE_KEY, NULL, 4,
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keylen, keysrc,
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lower_32_bits(keyaddr),
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upper_32_bits(keyaddr));
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}
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EXPORT_SYMBOL_GPL(versal_pm_aes_key_write);
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/**
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* versal_pm_aes_key_zero - Zeroise AES User key registers
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* @keysrc: Key Source to be selected to which provided
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* key should be updated
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*
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* This function provides support to zeroise AES volatile user keys.
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*
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* Return: Returns status, either success or error+reason
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*/
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int versal_pm_aes_key_zero(const u32 keysrc)
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{
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return zynqmp_pm_invoke_fn(XSECURE_API_AES_KEY_ZERO, NULL, 1, keysrc);
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}
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EXPORT_SYMBOL_GPL(versal_pm_aes_key_zero);
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+
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/**
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* versal_pm_aes_op_init - Init AES operation
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* @hw_req: AES op init structure address
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*
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* This function provides support to init AES operation.
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*
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* Return: Returns status, either success or error+reason
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*/
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int versal_pm_aes_op_init(const u64 hw_req)
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{
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return zynqmp_pm_invoke_fn(XSECURE_API_AES_OP_INIT, NULL, 2,
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lower_32_bits(hw_req),
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upper_32_bits(hw_req));
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}
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EXPORT_SYMBOL_GPL(versal_pm_aes_op_init);
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/**
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* versal_pm_aes_update_aad - AES update aad
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* @aad_addr: AES aad address
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* @aad_len: AES aad data length
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*
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* This function provides support to update AAD data.
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*
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* Return: Returns status, either success or error+reason
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*/
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int versal_pm_aes_update_aad(const u64 aad_addr, const u32 aad_len)
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{
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return zynqmp_pm_invoke_fn(XSECURE_API_AES_UPDATE_AAD, NULL, 3,
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lower_32_bits(aad_addr),
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upper_32_bits(aad_addr),
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aad_len);
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}
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EXPORT_SYMBOL_GPL(versal_pm_aes_update_aad);
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/**
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* versal_pm_aes_enc_update - Access AES hardware to encrypt the data using
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* AES-GCM core.
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* @in_params: Address of the AesParams structure
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* @in_addr: Address of input buffer
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*
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* Return: Returns status, either success or error code.
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*/
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int versal_pm_aes_enc_update(const u64 in_params, const u64 in_addr)
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{
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return zynqmp_pm_invoke_fn(XSECURE_API_AES_ENCRYPT_UPDATE, NULL, 4,
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lower_32_bits(in_params),
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upper_32_bits(in_params),
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lower_32_bits(in_addr),
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upper_32_bits(in_addr));
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}
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EXPORT_SYMBOL_GPL(versal_pm_aes_enc_update);
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/**
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* versal_pm_aes_enc_final - Access AES hardware to store the GCM tag
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* @gcm_addr: Address of the gcm tag
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*
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* Return: Returns status, either success or error code.
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*/
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int versal_pm_aes_enc_final(const u64 gcm_addr)
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{
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return zynqmp_pm_invoke_fn(XSECURE_API_AES_ENCRYPT_FINAL, NULL, 2,
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lower_32_bits(gcm_addr),
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upper_32_bits(gcm_addr));
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}
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EXPORT_SYMBOL_GPL(versal_pm_aes_enc_final);
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/**
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* versal_pm_aes_dec_update - Access AES hardware to decrypt the data using
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* AES-GCM core.
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* @in_params: Address of the AesParams structure
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* @in_addr: Address of input buffer
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*
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* Return: Returns status, either success or error code.
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*/
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int versal_pm_aes_dec_update(const u64 in_params, const u64 in_addr)
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{
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return zynqmp_pm_invoke_fn(XSECURE_API_AES_DECRYPT_UPDATE, NULL, 4,
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lower_32_bits(in_params),
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upper_32_bits(in_params),
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lower_32_bits(in_addr),
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upper_32_bits(in_addr));
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}
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EXPORT_SYMBOL_GPL(versal_pm_aes_dec_update);
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/**
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* versal_pm_aes_dec_final - Access AES hardware to get the GCM tag
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* @gcm_addr: Address of the gcm tag
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*
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* Return: Returns status, either success or error code.
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*/
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int versal_pm_aes_dec_final(const u64 gcm_addr)
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{
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return zynqmp_pm_invoke_fn(XSECURE_API_AES_DECRYPT_FINAL, NULL, 2,
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lower_32_bits(gcm_addr),
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upper_32_bits(gcm_addr));
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}
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EXPORT_SYMBOL_GPL(versal_pm_aes_dec_final);
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/**
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* versal_pm_aes_init - Init AES block
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*
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* This function initialise AES block.
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*
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* Return: Returns status, either success or error+reason
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*/
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int versal_pm_aes_init(void)
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{
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return zynqmp_pm_invoke_fn(XSECURE_API_AES_INIT, NULL, 0);
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}
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EXPORT_SYMBOL_GPL(versal_pm_aes_init);
+74
-2
include/linux/firmware/xlnx-zynqmp-crypto.h
+74
-2
include/linux/firmware/xlnx-zynqmp-crypto.h
···
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/*
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* Firmware layer for XilSECURE APIs.
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*
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* Copyright (C) 2014-2022 Xilinx, Inc.
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* Copyright (C) 2022-2025 Advanced Micro Devices, Inc.
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* Copyright (C) 2014-2022 Xilinx, Inc.
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* Copyright (C) 2022-2025 Advanced Micro Devices, Inc.
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*/
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#ifndef __FIRMWARE_XLNX_ZYNQMP_CRYPTO_H__
···
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void *data;
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};
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/* xilSecure API commands module id + api id */
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#define XSECURE_API_AES_INIT 0x509
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#define XSECURE_API_AES_OP_INIT 0x50a
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#define XSECURE_API_AES_UPDATE_AAD 0x50b
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#define XSECURE_API_AES_ENCRYPT_UPDATE 0x50c
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#define XSECURE_API_AES_ENCRYPT_FINAL 0x50d
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#define XSECURE_API_AES_DECRYPT_UPDATE 0x50e
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#define XSECURE_API_AES_DECRYPT_FINAL 0x50f
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#define XSECURE_API_AES_KEY_ZERO 0x510
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#define XSECURE_API_AES_WRITE_KEY 0x511
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#if IS_REACHABLE(CONFIG_ZYNQMP_FIRMWARE)
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int zynqmp_pm_aes_engine(const u64 address, u32 *out);
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int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags);
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void *xlnx_get_crypto_dev_data(struct xlnx_feature *feature_map);
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int versal_pm_aes_key_write(const u32 keylen,
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const u32 keysrc, const u64 keyaddr);
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int versal_pm_aes_key_zero(const u32 keysrc);
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int versal_pm_aes_op_init(const u64 hw_req);
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int versal_pm_aes_update_aad(const u64 aad_addr, const u32 aad_len);
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int versal_pm_aes_enc_update(const u64 in_params, const u64 in_addr);
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int versal_pm_aes_dec_update(const u64 in_params, const u64 in_addr);
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int versal_pm_aes_dec_final(const u64 gcm_addr);
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int versal_pm_aes_enc_final(const u64 gcm_addr);
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int versal_pm_aes_init(void);
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#else
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static inline int zynqmp_pm_aes_engine(const u64 address, u32 *out)
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{
···
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{
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return ERR_PTR(-ENODEV);
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}
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static inline int versal_pm_aes_key_write(const u32 keylen,
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const u32 keysrc, const u64 keyaddr)
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{
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return -ENODEV;
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}
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static inline int versal_pm_aes_key_zero(const u32 keysrc)
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{
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return -ENODEV;
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}
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static inline int versal_pm_aes_op_init(const u64 hw_req)
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{
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return -ENODEV;
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}
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static inline int versal_pm_aes_update_aad(const u64 aad_addr,
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const u32 aad_len)
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{
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return -ENODEV;
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}
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static inline int versal_pm_aes_enc_update(const u64 in_params,
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const u64 in_addr)
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{
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return -ENODEV;
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}
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static inline int versal_pm_aes_dec_update(const u64 in_params,
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const u64 in_addr)
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{
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return -ENODEV;
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}
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static inline int versal_pm_aes_enc_final(const u64 gcm_addr)
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{
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return -ENODEV;
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}
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static inline int versal_pm_aes_dec_final(const u64 gcm_addr)
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{
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return -ENODEV;
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}
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static inline int versal_pm_aes_init(void)
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{
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return -ENODEV;
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}
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#endif
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#endif /* __FIRMWARE_XLNX_ZYNQMP_CRYPTO_H__ */