tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/amdgpu: detect current GPU memory partition mode

- Add helpers to detect the current GPU memory partition.
- Add current memory partition mode sysfs node.

Tested-by: Ori Messinger <Ori.Messinger@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Rajneesh Bhardwaj and committed by
Alex Deucher ea2d2f8e 6b7ec18b

+60
+25
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
··· 1200 1200 return sysfs_emit(buf, "%s\n", partition_mode); 1201 1201 } 1202 1202 1203 + static ssize_t amdgpu_gfx_get_current_memory_partition(struct device *dev, 1204 + struct device_attribute *addr, 1205 + char *buf) 1206 + { 1207 + struct drm_device *ddev = dev_get_drvdata(dev); 1208 + struct amdgpu_device *adev = drm_to_adev(ddev); 1209 + enum amdgpu_memory_partition mode; 1210 + static const char *partition_modes[] = { 1211 + "UNKNOWN", "NPS1", "NPS2", "NPS4", "NPS8" 1212 + }; 1213 + BUILD_BUG_ON(ARRAY_SIZE(partition_modes) <= AMDGPU_NPS8_PARTITION_MODE); 1214 + 1215 + mode = min((int)adev->gfx.funcs->query_mem_partition_mode(adev), 1216 + AMDGPU_NPS8_PARTITION_MODE); 1217 + 1218 + return sysfs_emit(buf, "%s\n", partition_modes[mode]); 1219 + } 1220 + 1203 1221 static ssize_t amdgpu_gfx_set_compute_partition(struct device *dev, 1204 1222 struct device_attribute *addr, 1205 1223 const char *buf, size_t count) ··· 1325 1307 static DEVICE_ATTR(available_compute_partition, S_IRUGO, 1326 1308 amdgpu_gfx_get_available_compute_partition, NULL); 1327 1309 1310 + static DEVICE_ATTR(current_memory_partition, S_IRUGO, 1311 + amdgpu_gfx_get_current_memory_partition, NULL); 1312 + 1328 1313 int amdgpu_gfx_sysfs_init(struct amdgpu_device *adev) 1329 1314 { 1330 1315 int r; ··· 1337 1316 return r; 1338 1317 1339 1318 r = device_create_file(adev->dev, &dev_attr_available_compute_partition); 1319 + if (r) 1320 + return r; 1321 + 1322 + r = device_create_file(adev->dev, &dev_attr_current_memory_partition); 1340 1323 if (r) 1341 1324 return r; 1342 1325
+11
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
··· 71 71 AMDGPU_PKG_TYPE_UNKNOWN, 72 72 }; 73 73 74 + enum amdgpu_memory_partition { 75 + UNKNOWN_MEMORY_PARTITION_MODE = 0, 76 + AMDGPU_NPS1_PARTITION_MODE = 1, 77 + AMDGPU_NPS2_PARTITION_MODE = 2, 78 + AMDGPU_NPS4_PARTITION_MODE = 3, 79 + AMDGPU_NPS8_PARTITION_MODE = 4, 80 + }; 81 + 74 82 struct amdgpu_mec { 75 83 struct amdgpu_bo *hpd_eop_obj; 76 84 u64 hpd_eop_gpu_addr; ··· 276 268 struct amdgpu_gfx_shadow_info *shadow_info); 277 269 enum amdgpu_gfx_partition 278 270 (*query_partition_mode)(struct amdgpu_device *adev); 271 + enum amdgpu_memory_partition 272 + (*query_mem_partition_mode)(struct amdgpu_device *adev); 279 273 int (*switch_partition_mode)(struct amdgpu_device *adev, 280 274 enum amdgpu_gfx_partition mode); 281 275 }; ··· 414 404 415 405 enum amdgpu_gfx_partition partition_mode; 416 406 uint16_t xcc_mask; 407 + enum amdgpu_memory_partition mem_partition_mode; 417 408 uint32_t num_xcc_per_xcp; 418 409 struct mutex partition_mutex; 419 410 };
+1
drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h
··· 97 97 void (*clear_doorbell_interrupt)(struct amdgpu_device *adev); 98 98 u32 (*get_rom_offset)(struct amdgpu_device *adev); 99 99 u32 (*get_compute_partition_mode)(struct amdgpu_device *adev); 100 + u32 (*get_memory_partition_mode)(struct amdgpu_device *adev); 100 101 void (*set_compute_partition_mode)(struct amdgpu_device *adev, 101 102 enum amdgpu_gfx_partition mode); 102 103 };
+11
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
··· 606 606 { 607 607 soc15_grbm_select(adev, me, pipe, q, vm, GET_INST(GC, xcc_id)); 608 608 } 609 + static enum amdgpu_memory_partition 610 + gfx_v9_4_3_query_memory_partition(struct amdgpu_device *adev) 611 + { 612 + enum amdgpu_memory_partition mode = UNKNOWN_MEMORY_PARTITION_MODE; 613 + 614 + if (adev->nbio.funcs->get_memory_partition_mode) 615 + mode = adev->nbio.funcs->get_memory_partition_mode(adev); 616 + 617 + return mode; 618 + } 609 619 610 620 static enum amdgpu_gfx_partition 611 621 gfx_v9_4_3_query_compute_partition(struct amdgpu_device *adev) ··· 685 675 .select_me_pipe_q = &gfx_v9_4_3_select_me_pipe_q, 686 676 .query_partition_mode = &gfx_v9_4_3_query_compute_partition, 687 677 .switch_partition_mode = &gfx_v9_4_3_switch_compute_partition, 678 + .query_mem_partition_mode = &gfx_v9_4_3_query_memory_partition, 688 679 }; 689 680 690 681 static int gfx_v9_4_3_gpu_early_init(struct amdgpu_device *adev)
+12
drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
··· 30 30 #include "ivsrcid/nbio/irqsrcs_nbif_7_4.h" 31 31 #include <uapi/linux/kfd_ioctl.h> 32 32 33 + #define NPS_MODE_MASK 0x000000FFL 34 + 33 35 static void nbio_v7_9_remap_hdp_registers(struct amdgpu_device *adev) 34 36 { 35 37 WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_MEM_FLUSH_CNTL, ··· 408 406 WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_PARTITION_COMPUTE_STATUS, tmp); 409 407 } 410 408 409 + static enum amdgpu_memory_partition nbio_v7_9_get_memory_partition_mode(struct amdgpu_device *adev) 410 + { 411 + u32 tmp; 412 + tmp = RREG32_SOC15(NBIO, 0, regBIF_BX_PF0_PARTITION_MEM_STATUS); 413 + tmp = REG_GET_FIELD(tmp, BIF_BX_PF0_PARTITION_MEM_STATUS, NPS_MODE); 414 + 415 + return ffs(tmp); 416 + } 417 + 411 418 const struct amdgpu_nbio_funcs nbio_v7_9_funcs = { 412 419 .get_hdp_flush_req_offset = nbio_v7_9_get_hdp_flush_req_offset, 413 420 .get_hdp_flush_done_offset = nbio_v7_9_get_hdp_flush_done_offset, ··· 439 428 .remap_hdp_registers = nbio_v7_9_remap_hdp_registers, 440 429 .get_compute_partition_mode = nbio_v7_9_get_compute_partition_mode, 441 430 .set_compute_partition_mode = nbio_v7_9_set_compute_partition_mode, 431 + .get_memory_partition_mode = nbio_v7_9_get_memory_partition_mode, 442 432 };