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crypto: hisilicon/zip - add lz4 algorithm for hisi_zip

Add the "hisi-lz4-acomp" algorithm by the crypto acomp. When the
8th bit of the capability register is 1, the lz4 algorithm will
register to crypto acomp, and the window length is configured to
16K by default.

Since the "hisi-lz4-acomp" currently only support compression
direction, decompression is completed by the soft lz4 algorithm.

Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

authored by

Chenghai Huang and committed by
Herbert Xu
ea377793 9d58d22f

+84 -8
+1
drivers/crypto/hisilicon/Kconfig
··· 58 58 depends on ACPI 59 59 select CRYPTO_DEV_HISI_QM 60 60 select CRYPTO_DEFLATE 61 + select CRYPTO_LZ4 61 62 help 62 63 Support for HiSilicon ZIP Driver 63 64
+83 -8
drivers/crypto/hisilicon/zip/zip_crypto.c
··· 17 17 /* hisi_zip_sqe dw9 */ 18 18 #define HZIP_REQ_TYPE_M GENMASK(7, 0) 19 19 #define HZIP_ALG_TYPE_DEFLATE 0x01 20 + #define HZIP_ALG_TYPE_LZ4 0x04 20 21 #define HZIP_BUF_TYPE_M GENMASK(11, 8) 21 22 #define HZIP_SGL 0x1 23 + #define HZIP_WIN_SIZE_M GENMASK(15, 12) 24 + #define HZIP_16K_WINSZ 0x2 22 25 23 26 #define HZIP_ALG_PRIORITY 300 24 27 #define HZIP_SGL_SGE_NR 10 25 28 26 29 #define HZIP_ALG_DEFLATE GENMASK(5, 4) 30 + #define HZIP_ALG_LZ4 BIT(8) 27 31 28 32 static DEFINE_MUTEX(zip_algs_lock); 29 33 static unsigned int zip_available_devs; ··· 45 41 46 42 #define GET_REQ_FROM_SQE(sqe) ((u64)(sqe)->dw26 | (u64)(sqe)->dw27 << 32) 47 43 #define COMP_NAME_TO_TYPE(alg_name) \ 48 - (!strcmp((alg_name), "deflate") ? HZIP_ALG_TYPE_DEFLATE : 0) 44 + (!strcmp((alg_name), "deflate") ? HZIP_ALG_TYPE_DEFLATE : \ 45 + (!strcmp((alg_name), "lz4") ? HZIP_ALG_TYPE_LZ4 : 0)) 49 46 50 47 struct hisi_zip_req { 51 48 struct acomp_req *req; ··· 80 75 void (*fill_buf_size)(struct hisi_zip_sqe *sqe, struct hisi_zip_req *req); 81 76 void (*fill_buf_type)(struct hisi_zip_sqe *sqe, u8 buf_type); 82 77 void (*fill_req_type)(struct hisi_zip_sqe *sqe, u8 req_type); 78 + void (*fill_win_size)(struct hisi_zip_sqe *sqe, u8 win_size); 83 79 void (*fill_tag)(struct hisi_zip_sqe *sqe, struct hisi_zip_req *req); 84 80 void (*fill_sqe_type)(struct hisi_zip_sqe *sqe, u8 sqe_type); 85 81 u32 (*get_status)(struct hisi_zip_sqe *sqe); ··· 207 201 sqe->dw9 = val; 208 202 } 209 203 204 + static void hisi_zip_fill_win_size(struct hisi_zip_sqe *sqe, u8 win_size) 205 + { 206 + u32 val; 207 + 208 + val = sqe->dw9 & ~HZIP_WIN_SIZE_M; 209 + val |= FIELD_PREP(HZIP_WIN_SIZE_M, win_size); 210 + sqe->dw9 = val; 211 + } 212 + 210 213 static void hisi_zip_fill_tag(struct hisi_zip_sqe *sqe, struct hisi_zip_req *req) 211 214 { 212 215 sqe->dw26 = lower_32_bits((u64)req); ··· 242 227 ops->fill_buf_size(sqe, req); 243 228 ops->fill_buf_type(sqe, HZIP_SGL); 244 229 ops->fill_req_type(sqe, req_type); 230 + ops->fill_win_size(sqe, HZIP_16K_WINSZ); 245 231 ops->fill_tag(sqe, req); 246 232 ops->fill_sqe_type(sqe, ops->sqe_type); 247 233 } ··· 397 381 return ret; 398 382 } 399 383 384 + static int hisi_zip_decompress(struct acomp_req *acomp_req) 385 + { 386 + return hisi_zip_fallback_do_work(acomp_req, 1); 387 + } 388 + 400 389 static const struct hisi_zip_sqe_ops hisi_zip_ops = { 401 390 .sqe_type = 0x3, 402 391 .fill_addr = hisi_zip_fill_addr, 403 392 .fill_buf_size = hisi_zip_fill_buf_size, 404 393 .fill_buf_type = hisi_zip_fill_buf_type, 405 394 .fill_req_type = hisi_zip_fill_req_type, 395 + .fill_win_size = hisi_zip_fill_win_size, 406 396 .fill_tag = hisi_zip_fill_tag, 407 397 .fill_sqe_type = hisi_zip_fill_sqe_type, 408 398 .get_status = hisi_zip_get_status, ··· 600 578 { 601 579 struct hisi_zip_ctx *ctx = crypto_tfm_ctx(&tfm->base); 602 580 603 - if (!ctx->fallback) { 604 - hisi_zip_release_sgl_pool(ctx); 605 - hisi_zip_release_req_q(ctx); 606 - hisi_zip_ctx_exit(ctx); 607 - } 581 + if (ctx->fallback) 582 + return; 583 + 584 + hisi_zip_release_sgl_pool(ctx); 585 + hisi_zip_release_req_q(ctx); 586 + hisi_zip_ctx_exit(ctx); 608 587 } 609 588 610 589 static struct acomp_alg hisi_zip_acomp_deflate = { ··· 646 623 crypto_unregister_acomp(&hisi_zip_acomp_deflate); 647 624 } 648 625 626 + static struct acomp_alg hisi_zip_acomp_lz4 = { 627 + .init = hisi_zip_acomp_init, 628 + .exit = hisi_zip_acomp_exit, 629 + .compress = hisi_zip_acompress, 630 + .decompress = hisi_zip_decompress, 631 + .base = { 632 + .cra_name = "lz4", 633 + .cra_driver_name = "hisi-lz4-acomp", 634 + .cra_flags = CRYPTO_ALG_ASYNC | 635 + CRYPTO_ALG_NEED_FALLBACK, 636 + .cra_module = THIS_MODULE, 637 + .cra_priority = HZIP_ALG_PRIORITY, 638 + .cra_ctxsize = sizeof(struct hisi_zip_ctx), 639 + } 640 + }; 641 + 642 + static int hisi_zip_register_lz4(struct hisi_qm *qm) 643 + { 644 + int ret; 645 + 646 + if (!hisi_zip_alg_support(qm, HZIP_ALG_LZ4)) 647 + return 0; 648 + 649 + ret = crypto_register_acomp(&hisi_zip_acomp_lz4); 650 + if (ret) 651 + dev_err(&qm->pdev->dev, "failed to register to LZ4 (%d)!\n", ret); 652 + 653 + return ret; 654 + } 655 + 656 + static void hisi_zip_unregister_lz4(struct hisi_qm *qm) 657 + { 658 + if (!hisi_zip_alg_support(qm, HZIP_ALG_LZ4)) 659 + return; 660 + 661 + crypto_unregister_acomp(&hisi_zip_acomp_lz4); 662 + } 663 + 649 664 int hisi_zip_register_to_crypto(struct hisi_qm *qm) 650 665 { 651 666 int ret = 0; 652 667 653 668 mutex_lock(&zip_algs_lock); 654 - if (zip_available_devs++) 669 + if (zip_available_devs) { 670 + zip_available_devs++; 655 671 goto unlock; 672 + } 656 673 657 674 ret = hisi_zip_register_deflate(qm); 658 675 if (ret) 659 - zip_available_devs--; 676 + goto unlock; 660 677 678 + ret = hisi_zip_register_lz4(qm); 679 + if (ret) 680 + goto unreg_deflate; 681 + 682 + zip_available_devs++; 683 + mutex_unlock(&zip_algs_lock); 684 + 685 + return 0; 686 + 687 + unreg_deflate: 688 + hisi_zip_unregister_deflate(qm); 661 689 unlock: 662 690 mutex_unlock(&zip_algs_lock); 663 691 return ret; ··· 721 647 goto unlock; 722 648 723 649 hisi_zip_unregister_deflate(qm); 650 + hisi_zip_unregister_lz4(qm); 724 651 725 652 unlock: 726 653 mutex_unlock(&zip_algs_lock);