Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/amd: Add the capability to mark certain firmware as "required"
Some of the firmware that is loaded by amdgpu is not actually required.
For example the ISP firmware on some SoCs is optional, and if it's not
present the ISP IP block just won't be initialized.
The firmware loader core however will show a warning when this happens
like this:
```
Direct firmware load for amdgpu/isp_4_1_0.bin failed with error -2
```
To avoid confusion for non-required firmware, adjust the amd-ucode helper
to take an extra argument indicating if the firmware is required or
optional.
On optional firmware use firmware_request_nowarn() instead of
request_firmware() to avoid the warnings.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://lore.kernel.org/amd-gfx/df71d375-7abd-4b32-97ce-15e57846eed8@amd.com/T/#t
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
Mario Limonciello
and committed by
Alex Deucher
ea5d4934
5a7c8c57
+136
-34
+3
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
+3
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
···
414
414
return -EINVAL;
415
415
}
416
416
417
-
err = amdgpu_ucode_request(adev, &adev->pm.fw, "%s", fw_name);
417
+
err = amdgpu_ucode_request(adev, &adev->pm.fw,
418
+
AMDGPU_UCODE_REQUIRED,
419
+
"%s", fw_name);
418
420
if (err) {
419
421
DRM_ERROR("Failed to load firmware \"%s\"", fw_name);
420
422
amdgpu_ucode_release(&adev->pm.fw);
+1
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+1
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+2
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c
+2
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c
···
77
77
sizeof(ucode_prefix));
78
78
79
79
/* read isp fw */
80
-
r = amdgpu_ucode_request(adev, &adev->isp.fw, "amdgpu/%s.bin", ucode_prefix);
80
+
r = amdgpu_ucode_request(adev, &adev->isp.fw, AMDGPU_UCODE_OPTIONAL,
81
+
"amdgpu/%s.bin", ucode_prefix);
81
82
if (r) {
82
83
amdgpu_ucode_release(&adev->isp.fw);
83
84
return r;
+3
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
+3
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
···
1610
1610
pipe == AMDGPU_MES_SCHED_PIPE ? "" : "1");
1611
1611
}
1612
1612
1613
-
r = amdgpu_ucode_request(adev, &adev->mes.fw[pipe], "%s", fw_name);
1613
+
r = amdgpu_ucode_request(adev, &adev->mes.fw[pipe], AMDGPU_UCODE_REQUIRED,
1614
+
"%s", fw_name);
1614
1615
if (r && need_retry && pipe == AMDGPU_MES_SCHED_PIPE) {
1615
1616
dev_info(adev->dev, "try to fall back to %s_mes.bin\n", ucode_prefix);
1616
1617
r = amdgpu_ucode_request(adev, &adev->mes.fw[pipe],
1618
+
AMDGPU_UCODE_REQUIRED,
1617
1619
"amdgpu/%s_mes.bin", ucode_prefix);
1618
1620
}
1619
1621
+12
-6
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+12
-6
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
···
3290
3290
const struct psp_firmware_header_v1_0 *asd_hdr;
3291
3291
int err = 0;
3292
3292
3293
-
err = amdgpu_ucode_request(adev, &adev->psp.asd_fw, "amdgpu/%s_asd.bin", chip_name);
3293
+
err = amdgpu_ucode_request(adev, &adev->psp.asd_fw, AMDGPU_UCODE_REQUIRED,
3294
+
"amdgpu/%s_asd.bin", chip_name);
3294
3295
if (err)
3295
3296
goto out;
3296
3297
···
3313
3312
const struct psp_firmware_header_v1_0 *toc_hdr;
3314
3313
int err = 0;
3315
3314
3316
-
err = amdgpu_ucode_request(adev, &adev->psp.toc_fw, "amdgpu/%s_toc.bin", chip_name);
3315
+
err = amdgpu_ucode_request(adev, &adev->psp.toc_fw, AMDGPU_UCODE_REQUIRED,
3316
+
"amdgpu/%s_toc.bin", chip_name);
3317
3317
if (err)
3318
3318
goto out;
3319
3319
···
3477
3475
uint8_t *ucode_array_start_addr;
3478
3476
int err = 0;
3479
3477
3480
-
err = amdgpu_ucode_request(adev, &adev->psp.sos_fw, "amdgpu/%s_sos.bin", chip_name);
3478
+
err = amdgpu_ucode_request(adev, &adev->psp.sos_fw, AMDGPU_UCODE_REQUIRED,
3479
+
"amdgpu/%s_sos.bin", chip_name);
3481
3480
if (err)
3482
3481
goto out;
3483
3482
···
3754
3751
struct amdgpu_device *adev = psp->adev;
3755
3752
int err;
3756
3753
3757
-
err = amdgpu_ucode_request(adev, &adev->psp.ta_fw, "amdgpu/%s_ta.bin", chip_name);
3754
+
err = amdgpu_ucode_request(adev, &adev->psp.ta_fw, AMDGPU_UCODE_REQUIRED,
3755
+
"amdgpu/%s_ta.bin", chip_name);
3758
3756
if (err)
3759
3757
return err;
3760
3758
···
3790
3786
return -EINVAL;
3791
3787
}
3792
3788
3793
-
err = amdgpu_ucode_request(adev, &adev->psp.cap_fw, "amdgpu/%s_cap.bin", chip_name);
3789
+
err = amdgpu_ucode_request(adev, &adev->psp.cap_fw, AMDGPU_UCODE_OPTIONAL,
3790
+
"amdgpu/%s_cap.bin", chip_name);
3794
3791
if (err) {
3795
3792
if (err == -ENODEV) {
3796
3793
dev_warn(adev->dev, "cap microcode does not exist, skip\n");
···
3914
3909
if (!drm_dev_enter(ddev, &idx))
3915
3910
return -ENODEV;
3916
3911
3917
-
ret = amdgpu_ucode_request(adev, &usbc_pd_fw, "amdgpu/%s", buf);
3912
+
ret = amdgpu_ucode_request(adev, &usbc_pd_fw, AMDGPU_UCODE_REQUIRED,
3913
+
"amdgpu/%s", buf);
3918
3914
if (ret)
3919
3915
goto fail;
3920
3916
+2
drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
+2
drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
···
219
219
amdgpu_ucode_ip_version_decode(adev, SDMA0_HWIP, ucode_prefix, sizeof(ucode_prefix));
220
220
if (instance == 0)
221
221
err = amdgpu_ucode_request(adev, &adev->sdma.instance[instance].fw,
222
+
AMDGPU_UCODE_REQUIRED,
222
223
"amdgpu/%s.bin", ucode_prefix);
223
224
else
224
225
err = amdgpu_ucode_request(adev, &adev->sdma.instance[instance].fw,
226
+
AMDGPU_UCODE_REQUIRED,
225
227
"amdgpu/%s%d.bin", ucode_prefix, instance);
226
228
if (err)
227
229
goto out;
+6
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
+6
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
···
1434
1434
*
1435
1435
* @adev: amdgpu device
1436
1436
* @fw: pointer to load firmware to
1437
+
* @required: whether the firmware is required
1437
1438
* @fmt: firmware name format string
1438
1439
* @...: variable arguments
1439
1440
*
···
1443
1442
* the error code to -ENODEV, so that early_init functions will fail to load.
1444
1443
*/
1445
1444
int amdgpu_ucode_request(struct amdgpu_device *adev, const struct firmware **fw,
1446
-
const char *fmt, ...)
1445
+
enum amdgpu_ucode_required required, const char *fmt, ...)
1447
1446
{
1448
1447
char fname[AMDGPU_UCODE_NAME_MAX];
1449
1448
va_list ap;
···
1457
1456
return -EOVERFLOW;
1458
1457
}
1459
1458
1460
-
r = request_firmware(fw, fname, adev->dev);
1459
+
if (required == AMDGPU_UCODE_REQUIRED)
1460
+
r = request_firmware(fw, fname, adev->dev);
1461
+
else
1462
+
r = firmware_request_nowarn(fw, fname, adev->dev);
1461
1463
if (r)
1462
1464
return -ENODEV;
1463
1465
+7
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
+7
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
···
551
551
AMDGPU_FW_LOAD_RLC_BACKDOOR_AUTO,
552
552
};
553
553
554
+
enum amdgpu_ucode_required {
555
+
AMDGPU_UCODE_OPTIONAL,
556
+
AMDGPU_UCODE_REQUIRED,
557
+
};
558
+
554
559
/* conform to smu_ucode_xfer_cz.h */
555
560
#define AMDGPU_SDMA0_UCODE_LOADED 0x00000001
556
561
#define AMDGPU_SDMA1_UCODE_LOADED 0x00000002
···
609
604
void amdgpu_ucode_print_sdma_hdr(const struct common_firmware_header *hdr);
610
605
void amdgpu_ucode_print_psp_hdr(const struct common_firmware_header *hdr);
611
606
void amdgpu_ucode_print_gpu_info_hdr(const struct common_firmware_header *hdr);
612
-
__printf(3, 4)
607
+
__printf(4, 5)
613
608
int amdgpu_ucode_request(struct amdgpu_device *adev, const struct firmware **fw,
614
-
const char *fmt, ...);
609
+
enum amdgpu_ucode_required required, const char *fmt, ...);
615
610
void amdgpu_ucode_release(const struct firmware **fw);
616
611
bool amdgpu_ucode_hdr_version(union amdgpu_firmware_header *hdr,
617
612
uint16_t hdr_major, uint16_t hdr_minor);
+2
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c
+2
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c
···
587
587
break;
588
588
}
589
589
590
-
r = amdgpu_ucode_request(adev, &adev->umsch_mm.fw, "%s", fw_name);
590
+
r = amdgpu_ucode_request(adev, &adev->umsch_mm.fw, AMDGPU_UCODE_REQUIRED,
591
+
"%s", fw_name);
591
592
if (r) {
592
593
release_firmware(adev->umsch_mm.fw);
593
594
adev->umsch_mm.fw = NULL;
+1
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+1
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
···
260
260
return -EINVAL;
261
261
}
262
262
263
-
r = amdgpu_ucode_request(adev, &adev->uvd.fw, "%s", fw_name);
263
+
r = amdgpu_ucode_request(adev, &adev->uvd.fw, AMDGPU_UCODE_REQUIRED, "%s", fw_name);
264
264
if (r) {
265
265
dev_err(adev->dev, "amdgpu_uvd: Can't validate firmware \"%s\"\n",
266
266
fw_name);
+1
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+1
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
···
158
158
return -EINVAL;
159
159
}
160
160
161
-
r = amdgpu_ucode_request(adev, &adev->vce.fw, "%s", fw_name);
161
+
r = amdgpu_ucode_request(adev, &adev->vce.fw, AMDGPU_UCODE_REQUIRED, "%s", fw_name);
162
162
if (r) {
163
163
dev_err(adev->dev, "amdgpu_vce: Can't validate firmware \"%s\"\n",
164
164
fw_name);
+6
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
+6
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
···
99
99
amdgpu_ucode_ip_version_decode(adev, UVD_HWIP, ucode_prefix, sizeof(ucode_prefix));
100
100
for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
101
101
if (i == 1 && amdgpu_ip_version(adev, UVD_HWIP, 0) == IP_VERSION(4, 0, 6))
102
-
r = amdgpu_ucode_request(adev, &adev->vcn.inst[i].fw, "amdgpu/%s_%d.bin", ucode_prefix, i);
102
+
r = amdgpu_ucode_request(adev, &adev->vcn.inst[i].fw,
103
+
AMDGPU_UCODE_REQUIRED,
104
+
"amdgpu/%s_%d.bin", ucode_prefix, i);
103
105
else
104
-
r = amdgpu_ucode_request(adev, &adev->vcn.inst[i].fw, "amdgpu/%s.bin", ucode_prefix);
106
+
r = amdgpu_ucode_request(adev, &adev->vcn.inst[i].fw,
107
+
AMDGPU_UCODE_REQUIRED,
108
+
"amdgpu/%s.bin", ucode_prefix);
105
109
if (r) {
106
110
amdgpu_ucode_release(&adev->vcn.inst[i].fw);
107
111
return r;
+2
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
+2
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
···
236
236
int ret;
237
237
238
238
amdgpu_ucode_ip_version_decode(adev, VPE_HWIP, fw_prefix, sizeof(fw_prefix));
239
-
ret = amdgpu_ucode_request(adev, &adev->vpe.fw, "amdgpu/%s.bin", fw_prefix);
239
+
ret = amdgpu_ucode_request(adev, &adev->vpe.fw, AMDGPU_UCODE_REQUIRED,
240
+
"amdgpu/%s.bin", fw_prefix);
240
241
if (ret)
241
242
goto out;
242
243
+2
drivers/gpu/drm/amd/amdgpu/cik_sdma.c
+2
drivers/gpu/drm/amd/amdgpu/cik_sdma.c
···
133
133
for (i = 0; i < adev->sdma.num_instances; i++) {
134
134
if (i == 0)
135
135
err = amdgpu_ucode_request(adev, &adev->sdma.instance[i].fw,
136
+
AMDGPU_UCODE_REQUIRED,
136
137
"amdgpu/%s_sdma.bin", chip_name);
137
138
else
138
139
err = amdgpu_ucode_request(adev, &adev->sdma.instance[i].fw,
140
+
AMDGPU_UCODE_REQUIRED,
139
141
"amdgpu/%s_sdma1.bin", chip_name);
140
142
if (err)
141
143
goto out;
+5
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+5
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
···
4138
4138
amdgpu_ucode_ip_version_decode(adev, GC_HWIP, ucode_prefix, sizeof(ucode_prefix));
4139
4139
4140
4140
err = amdgpu_ucode_request(adev, &adev->gfx.pfp_fw,
4141
+
AMDGPU_UCODE_REQUIRED,
4141
4142
"amdgpu/%s_pfp%s.bin", ucode_prefix, wks);
4142
4143
if (err)
4143
4144
goto out;
4144
4145
amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_PFP);
4145
4146
4146
4147
err = amdgpu_ucode_request(adev, &adev->gfx.me_fw,
4148
+
AMDGPU_UCODE_REQUIRED,
4147
4149
"amdgpu/%s_me%s.bin", ucode_prefix, wks);
4148
4150
if (err)
4149
4151
goto out;
4150
4152
amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_ME);
4151
4153
4152
4154
err = amdgpu_ucode_request(adev, &adev->gfx.ce_fw,
4155
+
AMDGPU_UCODE_REQUIRED,
4153
4156
"amdgpu/%s_ce%s.bin", ucode_prefix, wks);
4154
4157
if (err)
4155
4158
goto out;
···
4176
4173
}
4177
4174
4178
4175
err = amdgpu_ucode_request(adev, &adev->gfx.mec_fw,
4176
+
AMDGPU_UCODE_REQUIRED,
4179
4177
"amdgpu/%s_mec%s.bin", ucode_prefix, wks);
4180
4178
if (err)
4181
4179
goto out;
···
4184
4180
amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC1_JT);
4185
4181
4186
4182
err = amdgpu_ucode_request(adev, &adev->gfx.mec2_fw,
4183
+
AMDGPU_UCODE_REQUIRED,
4187
4184
"amdgpu/%s_mec2%s.bin", ucode_prefix, wks);
4188
4185
if (!err) {
4189
4186
amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC2);
+6
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+6
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
···
639
639
int err = 0;
640
640
641
641
err = amdgpu_ucode_request(adev, &adev->psp.toc_fw,
642
+
AMDGPU_UCODE_REQUIRED,
642
643
"amdgpu/%s_toc.bin", ucode_prefix);
643
644
if (err)
644
645
goto out;
···
689
688
690
689
amdgpu_ucode_ip_version_decode(adev, GC_HWIP, ucode_prefix, sizeof(ucode_prefix));
691
690
err = amdgpu_ucode_request(adev, &adev->gfx.pfp_fw,
691
+
AMDGPU_UCODE_REQUIRED,
692
692
"amdgpu/%s_pfp.bin", ucode_prefix);
693
693
if (err)
694
694
goto out;
···
707
705
}
708
706
709
707
err = amdgpu_ucode_request(adev, &adev->gfx.me_fw,
708
+
AMDGPU_UCODE_REQUIRED,
710
709
"amdgpu/%s_me.bin", ucode_prefix);
711
710
if (err)
712
711
goto out;
···
723
720
if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(11, 0, 0) &&
724
721
adev->pdev->revision == 0xCE)
725
722
err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw,
723
+
AMDGPU_UCODE_REQUIRED,
726
724
"amdgpu/gc_11_0_0_rlc_1.bin");
727
725
else
728
726
err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw,
727
+
AMDGPU_UCODE_REQUIRED,
729
728
"amdgpu/%s_rlc.bin", ucode_prefix);
730
729
if (err)
731
730
goto out;
···
740
735
}
741
736
742
737
err = amdgpu_ucode_request(adev, &adev->gfx.mec_fw,
738
+
AMDGPU_UCODE_REQUIRED,
743
739
"amdgpu/%s_mec.bin", ucode_prefix);
744
740
if (err)
745
741
goto out;
+5
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
+5
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
···
537
537
int err = 0;
538
538
539
539
err = amdgpu_ucode_request(adev, &adev->psp.toc_fw,
540
+
AMDGPU_UCODE_REQUIRED,
540
541
"amdgpu/%s_toc.bin", ucode_prefix);
541
542
if (err)
542
543
goto out;
···
567
566
amdgpu_ucode_ip_version_decode(adev, GC_HWIP, ucode_prefix, sizeof(ucode_prefix));
568
567
569
568
err = amdgpu_ucode_request(adev, &adev->gfx.pfp_fw,
569
+
AMDGPU_UCODE_REQUIRED,
570
570
"amdgpu/%s_pfp.bin", ucode_prefix);
571
571
if (err)
572
572
goto out;
···
575
573
amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_RS64_PFP_P0_STACK);
576
574
577
575
err = amdgpu_ucode_request(adev, &adev->gfx.me_fw,
576
+
AMDGPU_UCODE_REQUIRED,
578
577
"amdgpu/%s_me.bin", ucode_prefix);
579
578
if (err)
580
579
goto out;
···
584
581
585
582
if (!amdgpu_sriov_vf(adev)) {
586
583
err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw,
584
+
AMDGPU_UCODE_REQUIRED,
587
585
"amdgpu/%s_rlc.bin", ucode_prefix);
588
586
if (err)
589
587
goto out;
···
597
593
}
598
594
599
595
err = amdgpu_ucode_request(adev, &adev->gfx.mec_fw,
596
+
AMDGPU_UCODE_REQUIRED,
600
597
"amdgpu/%s_mec.bin", ucode_prefix);
601
598
if (err)
602
599
goto out;
+4
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
+4
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
···
337
337
}
338
338
339
339
err = amdgpu_ucode_request(adev, &adev->gfx.pfp_fw,
340
+
AMDGPU_UCODE_REQUIRED,
340
341
"amdgpu/%s_pfp.bin", chip_name);
341
342
if (err)
342
343
goto out;
···
346
345
adev->gfx.pfp_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
347
346
348
347
err = amdgpu_ucode_request(adev, &adev->gfx.me_fw,
348
+
AMDGPU_UCODE_REQUIRED,
349
349
"amdgpu/%s_me.bin", chip_name);
350
350
if (err)
351
351
goto out;
···
355
353
adev->gfx.me_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
356
354
357
355
err = amdgpu_ucode_request(adev, &adev->gfx.ce_fw,
356
+
AMDGPU_UCODE_REQUIRED,
358
357
"amdgpu/%s_ce.bin", chip_name);
359
358
if (err)
360
359
goto out;
···
364
361
adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
365
362
366
363
err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw,
364
+
AMDGPU_UCODE_REQUIRED,
367
365
"amdgpu/%s_rlc.bin", chip_name);
368
366
if (err)
369
367
goto out;
+6
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+6
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
···
934
934
}
935
935
936
936
err = amdgpu_ucode_request(adev, &adev->gfx.pfp_fw,
937
+
AMDGPU_UCODE_REQUIRED,
937
938
"amdgpu/%s_pfp.bin", chip_name);
938
939
if (err)
939
940
goto out;
940
941
941
942
err = amdgpu_ucode_request(adev, &adev->gfx.me_fw,
943
+
AMDGPU_UCODE_REQUIRED,
942
944
"amdgpu/%s_me.bin", chip_name);
943
945
if (err)
944
946
goto out;
945
947
946
948
err = amdgpu_ucode_request(adev, &adev->gfx.ce_fw,
949
+
AMDGPU_UCODE_REQUIRED,
947
950
"amdgpu/%s_ce.bin", chip_name);
948
951
if (err)
949
952
goto out;
950
953
951
954
err = amdgpu_ucode_request(adev, &adev->gfx.mec_fw,
955
+
AMDGPU_UCODE_REQUIRED,
952
956
"amdgpu/%s_mec.bin", chip_name);
953
957
if (err)
954
958
goto out;
955
959
956
960
if (adev->asic_type == CHIP_KAVERI) {
957
961
err = amdgpu_ucode_request(adev, &adev->gfx.mec2_fw,
962
+
AMDGPU_UCODE_REQUIRED,
958
963
"amdgpu/%s_mec2.bin", chip_name);
959
964
if (err)
960
965
goto out;
961
966
}
962
967
963
968
err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw,
969
+
AMDGPU_UCODE_REQUIRED,
964
970
"amdgpu/%s_rlc.bin", chip_name);
965
971
out:
966
972
if (err) {
+16
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+16
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
···
982
982
983
983
if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) {
984
984
err = amdgpu_ucode_request(adev, &adev->gfx.pfp_fw,
985
+
AMDGPU_UCODE_OPTIONAL,
985
986
"amdgpu/%s_pfp_2.bin", chip_name);
986
987
if (err == -ENODEV) {
987
988
err = amdgpu_ucode_request(adev, &adev->gfx.pfp_fw,
989
+
AMDGPU_UCODE_REQUIRED,
988
990
"amdgpu/%s_pfp.bin", chip_name);
989
991
}
990
992
} else {
991
993
err = amdgpu_ucode_request(adev, &adev->gfx.pfp_fw,
994
+
AMDGPU_UCODE_REQUIRED,
992
995
"amdgpu/%s_pfp.bin", chip_name);
993
996
}
994
997
if (err)
···
1002
999
1003
1000
if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) {
1004
1001
err = amdgpu_ucode_request(adev, &adev->gfx.me_fw,
1002
+
AMDGPU_UCODE_OPTIONAL,
1005
1003
"amdgpu/%s_me_2.bin", chip_name);
1006
1004
if (err == -ENODEV) {
1007
1005
err = amdgpu_ucode_request(adev, &adev->gfx.me_fw,
1006
+
AMDGPU_UCODE_REQUIRED,
1008
1007
"amdgpu/%s_me.bin", chip_name);
1009
1008
}
1010
1009
} else {
1011
1010
err = amdgpu_ucode_request(adev, &adev->gfx.me_fw,
1011
+
AMDGPU_UCODE_REQUIRED,
1012
1012
"amdgpu/%s_me.bin", chip_name);
1013
1013
}
1014
1014
if (err)
···
1023
1017
1024
1018
if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) {
1025
1019
err = amdgpu_ucode_request(adev, &adev->gfx.ce_fw,
1020
+
AMDGPU_UCODE_OPTIONAL,
1026
1021
"amdgpu/%s_ce_2.bin", chip_name);
1027
1022
if (err == -ENODEV) {
1028
1023
err = amdgpu_ucode_request(adev, &adev->gfx.ce_fw,
1024
+
AMDGPU_UCODE_REQUIRED,
1029
1025
"amdgpu/%s_ce.bin", chip_name);
1030
1026
}
1031
1027
} else {
1032
1028
err = amdgpu_ucode_request(adev, &adev->gfx.ce_fw,
1029
+
AMDGPU_UCODE_REQUIRED,
1033
1030
"amdgpu/%s_ce.bin", chip_name);
1034
1031
}
1035
1032
if (err)
···
1053
1044
adev->virt.chained_ib_support = false;
1054
1045
1055
1046
err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw,
1047
+
AMDGPU_UCODE_REQUIRED,
1056
1048
"amdgpu/%s_rlc.bin", chip_name);
1057
1049
if (err)
1058
1050
goto out;
···
1103
1093
1104
1094
if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) {
1105
1095
err = amdgpu_ucode_request(adev, &adev->gfx.mec_fw,
1096
+
AMDGPU_UCODE_OPTIONAL,
1106
1097
"amdgpu/%s_mec_2.bin", chip_name);
1107
1098
if (err == -ENODEV) {
1108
1099
err = amdgpu_ucode_request(adev, &adev->gfx.mec_fw,
1100
+
AMDGPU_UCODE_REQUIRED,
1109
1101
"amdgpu/%s_mec.bin", chip_name);
1110
1102
}
1111
1103
} else {
1112
1104
err = amdgpu_ucode_request(adev, &adev->gfx.mec_fw,
1105
+
AMDGPU_UCODE_REQUIRED,
1113
1106
"amdgpu/%s_mec.bin", chip_name);
1114
1107
}
1115
1108
if (err)
···
1125
1112
(adev->asic_type != CHIP_TOPAZ)) {
1126
1113
if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) {
1127
1114
err = amdgpu_ucode_request(adev, &adev->gfx.mec2_fw,
1115
+
AMDGPU_UCODE_OPTIONAL,
1128
1116
"amdgpu/%s_mec2_2.bin", chip_name);
1129
1117
if (err == -ENODEV) {
1130
1118
err = amdgpu_ucode_request(adev, &adev->gfx.mec2_fw,
1119
+
AMDGPU_UCODE_REQUIRED,
1131
1120
"amdgpu/%s_mec2.bin", chip_name);
1132
1121
}
1133
1122
} else {
1134
1123
err = amdgpu_ucode_request(adev, &adev->gfx.mec2_fw,
1124
+
AMDGPU_UCODE_REQUIRED,
1135
1125
"amdgpu/%s_mec2.bin", chip_name);
1136
1126
}
1137
1127
if (!err) {
+11
-1
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+11
-1
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
···
1429
1429
int err;
1430
1430
1431
1431
err = amdgpu_ucode_request(adev, &adev->gfx.pfp_fw,
1432
+
AMDGPU_UCODE_REQUIRED,
1432
1433
"amdgpu/%s_pfp.bin", chip_name);
1433
1434
if (err)
1434
1435
goto out;
1435
1436
amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_PFP);
1436
1437
1437
1438
err = amdgpu_ucode_request(adev, &adev->gfx.me_fw,
1439
+
AMDGPU_UCODE_REQUIRED,
1438
1440
"amdgpu/%s_me.bin", chip_name);
1439
1441
if (err)
1440
1442
goto out;
1441
1443
amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_ME);
1442
1444
1443
1445
err = amdgpu_ucode_request(adev, &adev->gfx.ce_fw,
1446
+
AMDGPU_UCODE_REQUIRED,
1444
1447
"amdgpu/%s_ce.bin", chip_name);
1445
1448
if (err)
1446
1449
goto out;
···
1479
1476
(((adev->pdev->revision >= 0xC8) && (adev->pdev->revision <= 0xCF)) ||
1480
1477
((adev->pdev->revision >= 0xD8) && (adev->pdev->revision <= 0xDF))))
1481
1478
err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw,
1479
+
AMDGPU_UCODE_REQUIRED,
1482
1480
"amdgpu/%s_rlc_am4.bin", chip_name);
1483
1481
else if (!strcmp(chip_name, "raven") && (amdgpu_pm_load_smu_firmware(adev, &smu_version) == 0) &&
1484
1482
(smu_version >= 0x41e2b))
···
1487
1483
*SMC is loaded by SBIOS on APU and it's able to get the SMU version directly.
1488
1484
*/
1489
1485
err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw,
1486
+
AMDGPU_UCODE_REQUIRED,
1490
1487
"amdgpu/%s_kicker_rlc.bin", chip_name);
1491
1488
else
1492
1489
err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw,
1490
+
AMDGPU_UCODE_REQUIRED,
1493
1491
"amdgpu/%s_rlc.bin", chip_name);
1494
1492
if (err)
1495
1493
goto out;
···
1524
1518
1525
1519
if (amdgpu_sriov_vf(adev) && (adev->asic_type == CHIP_ALDEBARAN))
1526
1520
err = amdgpu_ucode_request(adev, &adev->gfx.mec_fw,
1527
-
"amdgpu/%s_sjt_mec.bin", chip_name);
1521
+
AMDGPU_UCODE_REQUIRED,
1522
+
"amdgpu/%s_sjt_mec.bin", chip_name);
1528
1523
else
1529
1524
err = amdgpu_ucode_request(adev, &adev->gfx.mec_fw,
1525
+
AMDGPU_UCODE_REQUIRED,
1530
1526
"amdgpu/%s_mec.bin", chip_name);
1531
1527
if (err)
1532
1528
goto out;
···
1539
1531
if (gfx_v9_0_load_mec2_fw_bin_support(adev)) {
1540
1532
if (amdgpu_sriov_vf(adev) && (adev->asic_type == CHIP_ALDEBARAN))
1541
1533
err = amdgpu_ucode_request(adev, &adev->gfx.mec2_fw,
1534
+
AMDGPU_UCODE_REQUIRED,
1542
1535
"amdgpu/%s_sjt_mec2.bin", chip_name);
1543
1536
else
1544
1537
err = amdgpu_ucode_request(adev, &adev->gfx.mec2_fw,
1538
+
AMDGPU_UCODE_REQUIRED,
1545
1539
"amdgpu/%s_mec2.bin", chip_name);
1546
1540
if (!err) {
1547
1541
amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC2);
+5
-2
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
+5
-2
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
···
551
551
552
552
553
553
err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw,
554
+
AMDGPU_UCODE_REQUIRED,
554
555
"amdgpu/%s_rlc.bin", chip_name);
555
556
if (err)
556
557
goto out;
···
585
584
586
585
if (amdgpu_sriov_vf(adev))
587
586
err = amdgpu_ucode_request(adev, &adev->gfx.mec_fw,
588
-
"amdgpu/%s_sjt_mec.bin", chip_name);
587
+
AMDGPU_UCODE_REQUIRED,
588
+
"amdgpu/%s_sjt_mec.bin", chip_name);
589
589
else
590
590
err = amdgpu_ucode_request(adev, &adev->gfx.mec_fw,
591
-
"amdgpu/%s_mec.bin", chip_name);
591
+
AMDGPU_UCODE_REQUIRED,
592
+
"amdgpu/%s_mec.bin", chip_name);
592
593
if (err)
593
594
goto out;
594
595
amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC1);
+2
-1
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+2
-1
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
···
131
131
if (((RREG32(mmMC_SEQ_MISC0) & 0xff000000) >> 24) == 0x58)
132
132
chip_name = "si58";
133
133
134
-
err = amdgpu_ucode_request(adev, &adev->gmc.fw, "amdgpu/%s_mc.bin", chip_name);
134
+
err = amdgpu_ucode_request(adev, &adev->gmc.fw, AMDGPU_UCODE_REQUIRED,
135
+
"amdgpu/%s_mc.bin", chip_name);
135
136
if (err) {
136
137
dev_err(adev->dev,
137
138
"si_mc: Failed to load firmware \"%s_mc.bin\"\n",
+2
-1
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+2
-1
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
···
157
157
return -EINVAL;
158
158
}
159
159
160
-
err = amdgpu_ucode_request(adev, &adev->gmc.fw, "amdgpu/%s_mc.bin", chip_name);
160
+
err = amdgpu_ucode_request(adev, &adev->gmc.fw, AMDGPU_UCODE_REQUIRED,
161
+
"amdgpu/%s_mc.bin", chip_name);
161
162
if (err) {
162
163
pr_err("cik_mc: Failed to load firmware \"%s_mc.bin\"\n", chip_name);
163
164
amdgpu_ucode_release(&adev->gmc.fw);
+2
-1
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+2
-1
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
···
259
259
return -EINVAL;
260
260
}
261
261
262
-
err = amdgpu_ucode_request(adev, &adev->gmc.fw, "amdgpu/%s_mc.bin", chip_name);
262
+
err = amdgpu_ucode_request(adev, &adev->gmc.fw, AMDGPU_UCODE_REQUIRED,
263
+
"amdgpu/%s_mc.bin", chip_name);
263
264
if (err) {
264
265
pr_err("mc: Failed to load firmware \"%s_mc.bin\"\n", chip_name);
265
266
amdgpu_ucode_release(&adev->gmc.fw);
+2
-1
drivers/gpu/drm/amd/amdgpu/imu_v11_0.c
+2
-1
drivers/gpu/drm/amd/amdgpu/imu_v11_0.c
···
50
50
DRM_DEBUG("\n");
51
51
52
52
amdgpu_ucode_ip_version_decode(adev, GC_HWIP, ucode_prefix, sizeof(ucode_prefix));
53
-
err = amdgpu_ucode_request(adev, &adev->gfx.imu_fw, "amdgpu/%s_imu.bin", ucode_prefix);
53
+
err = amdgpu_ucode_request(adev, &adev->gfx.imu_fw, AMDGPU_UCODE_REQUIRED,
54
+
"amdgpu/%s_imu.bin", ucode_prefix);
54
55
if (err)
55
56
goto out;
56
57
+2
-1
drivers/gpu/drm/amd/amdgpu/imu_v12_0.c
+2
-1
drivers/gpu/drm/amd/amdgpu/imu_v12_0.c
···
47
47
DRM_DEBUG("\n");
48
48
49
49
amdgpu_ucode_ip_version_decode(adev, GC_HWIP, ucode_prefix, sizeof(ucode_prefix));
50
-
err = amdgpu_ucode_request(adev, &adev->gfx.imu_fw, "amdgpu/%s_imu.bin", ucode_prefix);
50
+
err = amdgpu_ucode_request(adev, &adev->gfx.imu_fw, AMDGPU_UCODE_REQUIRED,
51
+
"amdgpu/%s_imu.bin", ucode_prefix);
51
52
if (err)
52
53
goto out;
53
54
+2
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
+2
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
···
145
145
for (i = 0; i < adev->sdma.num_instances; i++) {
146
146
if (i == 0)
147
147
err = amdgpu_ucode_request(adev, &adev->sdma.instance[i].fw,
148
+
AMDGPU_UCODE_REQUIRED,
148
149
"amdgpu/%s_sdma.bin", chip_name);
149
150
else
150
151
err = amdgpu_ucode_request(adev, &adev->sdma.instance[i].fw,
152
+
AMDGPU_UCODE_REQUIRED,
151
153
"amdgpu/%s_sdma1.bin", chip_name);
152
154
if (err)
153
155
goto out;
+2
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
+2
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
···
305
305
for (i = 0; i < adev->sdma.num_instances; i++) {
306
306
if (i == 0)
307
307
err = amdgpu_ucode_request(adev, &adev->sdma.instance[i].fw,
308
+
AMDGPU_UCODE_REQUIRED,
308
309
"amdgpu/%s_sdma.bin", chip_name);
309
310
else
310
311
err = amdgpu_ucode_request(adev, &adev->sdma.instance[i].fw,
312
+
AMDGPU_UCODE_REQUIRED,
311
313
"amdgpu/%s_sdma1.bin", chip_name);
312
314
if (err)
313
315
goto out;
+4
-2
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+4
-2
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
···
2338
2338
return 0;
2339
2339
}
2340
2340
2341
-
r = amdgpu_ucode_request(adev, &adev->dm.fw_dmcu, "%s", fw_name_dmcu);
2341
+
r = amdgpu_ucode_request(adev, &adev->dm.fw_dmcu, AMDGPU_UCODE_REQUIRED,
2342
+
"%s", fw_name_dmcu);
2342
2343
if (r == -ENODEV) {
2343
2344
/* DMCU firmware is not necessary, so don't raise a fuss if it's missing */
2344
2345
DRM_DEBUG_KMS("dm: DMCU firmware not found\n");
···
5307
5306
/* ASIC doesn't support DMUB. */
5308
5307
return 0;
5309
5308
}
5310
-
r = amdgpu_ucode_request(adev, &adev->dm.dmub_fw, "%s", fw_name_dmub);
5309
+
r = amdgpu_ucode_request(adev, &adev->dm.dmub_fw, AMDGPU_UCODE_REQUIRED,
5310
+
"%s", fw_name_dmub);
5311
5311
return r;
5312
5312
}
5313
5313
+2
-1
drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
+2
-1
drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
···
7709
7709
default: BUG();
7710
7710
}
7711
7711
7712
-
err = amdgpu_ucode_request(adev, &adev->pm.fw, "amdgpu/%s_smc.bin", chip_name);
7712
+
err = amdgpu_ucode_request(adev, &adev->pm.fw, AMDGPU_UCODE_REQUIRED,
7713
+
"amdgpu/%s_smc.bin", chip_name);
7713
7714
if (err) {
7714
7715
DRM_ERROR("si_smc: Failed to load firmware. err = %d\"%s_smc.bin\"\n",
7715
7716
err, chip_name);
+2
-1
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+2
-1
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
···
105
105
return 0;
106
106
107
107
amdgpu_ucode_ip_version_decode(adev, MP1_HWIP, ucode_prefix, sizeof(ucode_prefix));
108
-
err = amdgpu_ucode_request(adev, &adev->pm.fw, "amdgpu/%s.bin", ucode_prefix);
108
+
err = amdgpu_ucode_request(adev, &adev->pm.fw, AMDGPU_UCODE_REQUIRED,
109
+
"amdgpu/%s.bin", ucode_prefix);
109
110
if (err)
110
111
goto out;
111
112
+2
-1
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+2
-1
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
···
103
103
return 0;
104
104
105
105
amdgpu_ucode_ip_version_decode(adev, MP1_HWIP, ucode_prefix, sizeof(ucode_prefix));
106
-
err = amdgpu_ucode_request(adev, &adev->pm.fw, "amdgpu/%s.bin", ucode_prefix);
106
+
err = amdgpu_ucode_request(adev, &adev->pm.fw, AMDGPU_UCODE_REQUIRED,
107
+
"amdgpu/%s.bin", ucode_prefix);
107
108
if (err)
108
109
goto out;
109
110
+2
-1
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
+2
-1
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
···
305
305
306
306
amdgpu_ucode_ip_version_decode(adev, MP1_HWIP, ucode_prefix,
307
307
sizeof(ucode_prefix));
308
-
ret = amdgpu_ucode_request(adev, &adev->pm.fw, "amdgpu/%s.bin", ucode_prefix);
308
+
ret = amdgpu_ucode_request(adev, &adev->pm.fw, AMDGPU_UCODE_REQUIRED,
309
+
"amdgpu/%s.bin", ucode_prefix);
309
310
if (ret)
310
311
goto out;
311
312
+2
-1
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c
+2
-1
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c
···
79
79
return 0;
80
80
81
81
amdgpu_ucode_ip_version_decode(adev, MP1_HWIP, ucode_prefix, sizeof(ucode_prefix));
82
-
err = amdgpu_ucode_request(adev, &adev->pm.fw, "amdgpu/%s.bin", ucode_prefix);
82
+
err = amdgpu_ucode_request(adev, &adev->pm.fw, AMDGPU_UCODE_REQUIRED,
83
+
"amdgpu/%s.bin", ucode_prefix);
83
84
if (err)
84
85
goto out;
85
86