tjh.dev / kernel
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drm/panthor: Expose the selected coherency protocol to the UMD

If we want to be able to skip CPU cache maintenance operations on
CPU-cached mappings, the UMD needs to know the kind of coherency
in place. Add a field to drm_panthor_gpu_info to do that. We can re-use
a padding field for that since this object is write-only from the
KMD perspective, and the UMD should just ignore it.

v2:
- New commit

v3:
- Make coherency protocol a real enum, not a bitmask
- Add BUILD_BUG_ON()s to make sure the values in panthor_regs.h and
those exposed through the uAPI match

v4:
- Add Steve's R-b

v5:
- No changes

v6:
- No changes

v7:
- Fix kernel doc

v8:
- No changes

Reviewed-by: Steven Price <steven.price@arm.com>
Reviewed-by: Karunika Choo <karunika.choo@arm.com>
Link: https://patch.msgid.link/20251208100841.730527-4-boris.brezillon@collabora.com
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>

Boris Brezillon ea78ec98 9beb8dca

+46 -5
+9 -1
drivers/gpu/drm/panthor/panthor_device.c
··· 28 28 29 29 static int panthor_gpu_coherency_init(struct panthor_device *ptdev) 30 30 { 31 + BUILD_BUG_ON(GPU_COHERENCY_NONE != DRM_PANTHOR_GPU_COHERENCY_NONE); 32 + BUILD_BUG_ON(GPU_COHERENCY_ACE_LITE != DRM_PANTHOR_GPU_COHERENCY_ACE_LITE); 33 + BUILD_BUG_ON(GPU_COHERENCY_ACE != DRM_PANTHOR_GPU_COHERENCY_ACE); 34 + 35 + /* Start with no coherency, and update it if the device is flagged coherent. */ 36 + ptdev->gpu_info.selected_coherency = GPU_COHERENCY_NONE; 31 37 ptdev->coherent = device_get_dma_attr(ptdev->base.dev) == DEV_DMA_COHERENT; 32 38 33 39 if (!ptdev->coherent) ··· 43 37 * ACE protocol has never been supported for command stream frontend GPUs. 44 38 */ 45 39 if ((gpu_read(ptdev, GPU_COHERENCY_FEATURES) & 46 - GPU_COHERENCY_PROT_BIT(ACE_LITE))) 40 + GPU_COHERENCY_PROT_BIT(ACE_LITE))) { 41 + ptdev->gpu_info.selected_coherency = GPU_COHERENCY_ACE_LITE; 47 42 return 0; 43 + } 48 44 49 45 drm_err(&ptdev->base, "Coherency not supported by the device"); 50 46 return -ENOTSUPP;
+1 -1
drivers/gpu/drm/panthor/panthor_gpu.c
··· 51 51 static void panthor_gpu_coherency_set(struct panthor_device *ptdev) 52 52 { 53 53 gpu_write(ptdev, GPU_COHERENCY_PROTOCOL, 54 - ptdev->coherent ? GPU_COHERENCY_ACE_LITE : GPU_COHERENCY_NONE); 54 + ptdev->gpu_info.selected_coherency); 55 55 } 56 56 57 57 static void panthor_gpu_l2_config_set(struct panthor_device *ptdev)
+36 -3
include/uapi/drm/panthor_drm.h
··· 246 246 }; 247 247 248 248 /** 249 + * enum drm_panthor_gpu_coherency: Type of GPU coherency 250 + */ 251 + enum drm_panthor_gpu_coherency { 252 + /** 253 + * @DRM_PANTHOR_GPU_COHERENCY_ACE_LITE: ACE Lite coherency. 254 + */ 255 + DRM_PANTHOR_GPU_COHERENCY_ACE_LITE = 0, 256 + 257 + /** 258 + * @DRM_PANTHOR_GPU_COHERENCY_ACE: ACE coherency. 259 + */ 260 + DRM_PANTHOR_GPU_COHERENCY_ACE = 1, 261 + 262 + /** 263 + * @DRM_PANTHOR_GPU_COHERENCY_NONE: No coherency. 264 + */ 265 + DRM_PANTHOR_GPU_COHERENCY_NONE = 31, 266 + }; 267 + 268 + /** 249 269 * struct drm_panthor_gpu_info - GPU information 250 270 * 251 271 * Structure grouping all queryable information relating to the GPU. ··· 321 301 */ 322 302 __u32 thread_max_barrier_size; 323 303 324 - /** @coherency_features: Coherency features. */ 304 + /** 305 + * @coherency_features: Coherency features. 306 + * 307 + * Combination of drm_panthor_gpu_coherency flags. 308 + * 309 + * Note that this is just what the coherency protocols supported by the 310 + * GPU, but the actual coherency in place depends on the SoC 311 + * integration and is reflected by 312 + * drm_panthor_gpu_info::selected_coherency. 313 + */ 325 314 __u32 coherency_features; 326 315 327 316 /** @texture_features: Texture features. */ ··· 339 310 /** @as_present: Bitmask encoding the number of address-space exposed by the MMU. */ 340 311 __u32 as_present; 341 312 342 - /** @pad0: MBZ. */ 343 - __u32 pad0; 313 + /** 314 + * @select_coherency: Coherency selected for this device. 315 + * 316 + * One of drm_panthor_gpu_coherency. 317 + */ 318 + __u32 selected_coherency; 344 319 345 320 /** @shader_present: Bitmask encoding the shader cores exposed by the GPU. */ 346 321 __u64 shader_present;