Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Thomas Gleixner:
"An assorted pile of fixes along with some hardware enablement:
- a fix for a KASAN / branch profiling related boot failure
- some more fallout of the PUD rework
- a fix for the Always Running Timer which is not initialized when
the TSC frequency is known at boot time (via MSR/CPUID)
- a resource leak fix for the RDT filesystem
- another unwinder corner case fixup
- removal of the warning for duplicate NMI handlers because there are
legitimate cases where more than one handler can be registered at
the last level
- make a function static - found by sparse
- a set of updates for the Intel MID platform which got delayed due
to merge ordering constraints. It's hardware enablement for a non
mainstream platform, so there is no risk"
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/mpx: Make unnecessarily global function static
x86/intel_rdt: Put group node in rdtgroup_kn_unlock
x86/unwind: Fix last frame check for aligned function stacks
mm, x86: Fix native_pud_clear build error
x86/kasan: Fix boot with KASAN=y and PROFILE_ANNOTATED_BRANCHES=y
x86/platform/intel-mid: Add power button support for Merrifield
x86/platform/intel-mid: Use common power off sequence
x86/platform: Remove warning message for duplicate NMI handlers
x86/tsc: Fix ART for TSC_KNOWN_FREQ
x86/platform/intel-mid: Correct MSI IRQ line for watchdog device
+126
-24
+1
-1
arch/x86/kernel/cpu/intel_rdt_rdtgroup.c
+1
-1
arch/x86/kernel/cpu/intel_rdt_rdtgroup.c
+1
arch/x86/kernel/head64.c
+1
arch/x86/kernel/head64.c
+2
-4
arch/x86/kernel/nmi.c
+2
-4
arch/x86/kernel/nmi.c
···
166
166
spin_lock_irqsave(&desc->lock, flags);
167
167
168
168
/*
169
-
* most handlers of type NMI_UNKNOWN never return because
170
-
* they just assume the NMI is theirs. Just a sanity check
171
-
* to manage expectations
169
+
* Indicate if there are multiple registrations on the
170
+
* internal NMI handler call chains (SERR and IO_CHECK).
172
171
*/
173
-
WARN_ON_ONCE(type == NMI_UNKNOWN && !list_empty(&desc->head));
174
172
WARN_ON_ONCE(type == NMI_SERR && !list_empty(&desc->head));
175
173
WARN_ON_ONCE(type == NMI_IO_CHECK && !list_empty(&desc->head));
176
174
+2
arch/x86/kernel/tsc.c
+2
arch/x86/kernel/tsc.c
···
1333
1333
* the refined calibration and directly register it as a clocksource.
1334
1334
*/
1335
1335
if (boot_cpu_has(X86_FEATURE_TSC_KNOWN_FREQ)) {
1336
+
if (boot_cpu_has(X86_FEATURE_ART))
1337
+
art_related_clocksource = &clocksource_tsc;
1336
1338
clocksource_register_khz(&clocksource_tsc, tsc_khz);
1337
1339
return 0;
1338
1340
}
+30
-6
arch/x86/kernel/unwind_frame.c
+30
-6
arch/x86/kernel/unwind_frame.c
···
82
82
return sizeof(*regs);
83
83
}
84
84
85
+
#ifdef CONFIG_X86_32
86
+
#define GCC_REALIGN_WORDS 3
87
+
#else
88
+
#define GCC_REALIGN_WORDS 1
89
+
#endif
90
+
85
91
static bool is_last_task_frame(struct unwind_state *state)
86
92
{
87
-
unsigned long bp = (unsigned long)state->bp;
88
-
unsigned long regs = (unsigned long)task_pt_regs(state->task);
93
+
unsigned long *last_bp = (unsigned long *)task_pt_regs(state->task) - 2;
94
+
unsigned long *aligned_bp = last_bp - GCC_REALIGN_WORDS;
89
95
90
96
/*
91
97
* We have to check for the last task frame at two different locations
92
98
* because gcc can occasionally decide to realign the stack pointer and
93
-
* change the offset of the stack frame by a word in the prologue of a
94
-
* function called by head/entry code.
99
+
* change the offset of the stack frame in the prologue of a function
100
+
* called by head/entry code. Examples:
101
+
*
102
+
* <start_secondary>:
103
+
* push %edi
104
+
* lea 0x8(%esp),%edi
105
+
* and $0xfffffff8,%esp
106
+
* pushl -0x4(%edi)
107
+
* push %ebp
108
+
* mov %esp,%ebp
109
+
*
110
+
* <x86_64_start_kernel>:
111
+
* lea 0x8(%rsp),%r10
112
+
* and $0xfffffffffffffff0,%rsp
113
+
* pushq -0x8(%r10)
114
+
* push %rbp
115
+
* mov %rsp,%rbp
116
+
*
117
+
* Note that after aligning the stack, it pushes a duplicate copy of
118
+
* the return address before pushing the frame pointer.
95
119
*/
96
-
return bp == regs - FRAME_HEADER_SIZE ||
97
-
bp == regs - FRAME_HEADER_SIZE - sizeof(long);
120
+
return (state->bp == last_bp ||
121
+
(state->bp == aligned_bp && *(aligned_bp+1) == *(last_bp+1)));
98
122
}
99
123
100
124
/*
+1
arch/x86/mm/kasan_init_64.c
+1
arch/x86/mm/kasan_init_64.c
+1
-1
arch/x86/mm/mpx.c
+1
-1
arch/x86/mm/mpx.c
···
590
590
* we might run off the end of the bounds table if we are on
591
591
* a 64-bit kernel and try to get 8 bytes.
592
592
*/
593
-
int get_user_bd_entry(struct mm_struct *mm, unsigned long *bd_entry_ret,
593
+
static int get_user_bd_entry(struct mm_struct *mm, unsigned long *bd_entry_ret,
594
594
long __user *bd_entry_ptr)
595
595
{
596
596
u32 bd_entry_32;
+1
arch/x86/platform/intel-mid/device_libs/Makefile
+1
arch/x86/platform/intel-mid/device_libs/Makefile
···
26
26
obj-$(subst m,y,$(CONFIG_GPIO_PCA953X)) += platform_tca6416.o
27
27
# MISC Devices
28
28
obj-$(subst m,y,$(CONFIG_KEYBOARD_GPIO)) += platform_gpio_keys.o
29
+
obj-$(subst m,y,$(CONFIG_INTEL_MID_POWER_BUTTON)) += platform_mrfld_power_btn.o
29
30
obj-$(subst m,y,$(CONFIG_RTC_DRV_CMOS)) += platform_mrfld_rtc.o
30
31
obj-$(subst m,y,$(CONFIG_INTEL_MID_WATCHDOG)) += platform_mrfld_wdt.o
+82
arch/x86/platform/intel-mid/device_libs/platform_mrfld_power_btn.c
+82
arch/x86/platform/intel-mid/device_libs/platform_mrfld_power_btn.c
···
1
+
/*
2
+
* Intel Merrifield power button support
3
+
*
4
+
* (C) Copyright 2017 Intel Corporation
5
+
*
6
+
* Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7
+
*
8
+
* This program is free software; you can redistribute it and/or
9
+
* modify it under the terms of the GNU General Public License
10
+
* as published by the Free Software Foundation; version 2
11
+
* of the License.
12
+
*/
13
+
14
+
#include <linux/init.h>
15
+
#include <linux/ioport.h>
16
+
#include <linux/platform_device.h>
17
+
#include <linux/sfi.h>
18
+
19
+
#include <asm/intel-mid.h>
20
+
#include <asm/intel_scu_ipc.h>
21
+
22
+
static struct resource mrfld_power_btn_resources[] = {
23
+
{
24
+
.flags = IORESOURCE_IRQ,
25
+
},
26
+
};
27
+
28
+
static struct platform_device mrfld_power_btn_dev = {
29
+
.name = "msic_power_btn",
30
+
.id = PLATFORM_DEVID_NONE,
31
+
.num_resources = ARRAY_SIZE(mrfld_power_btn_resources),
32
+
.resource = mrfld_power_btn_resources,
33
+
};
34
+
35
+
static int mrfld_power_btn_scu_status_change(struct notifier_block *nb,
36
+
unsigned long code, void *data)
37
+
{
38
+
if (code == SCU_DOWN) {
39
+
platform_device_unregister(&mrfld_power_btn_dev);
40
+
return 0;
41
+
}
42
+
43
+
return platform_device_register(&mrfld_power_btn_dev);
44
+
}
45
+
46
+
static struct notifier_block mrfld_power_btn_scu_notifier = {
47
+
.notifier_call = mrfld_power_btn_scu_status_change,
48
+
};
49
+
50
+
static int __init register_mrfld_power_btn(void)
51
+
{
52
+
if (intel_mid_identify_cpu() != INTEL_MID_CPU_CHIP_TANGIER)
53
+
return -ENODEV;
54
+
55
+
/*
56
+
* We need to be sure that the SCU IPC is ready before
57
+
* PMIC power button device can be registered:
58
+
*/
59
+
intel_scu_notifier_add(&mrfld_power_btn_scu_notifier);
60
+
61
+
return 0;
62
+
}
63
+
arch_initcall(register_mrfld_power_btn);
64
+
65
+
static void __init *mrfld_power_btn_platform_data(void *info)
66
+
{
67
+
struct resource *res = mrfld_power_btn_resources;
68
+
struct sfi_device_table_entry *pentry = info;
69
+
70
+
res->start = res->end = pentry->irq;
71
+
return NULL;
72
+
}
73
+
74
+
static const struct devs_id mrfld_power_btn_dev_id __initconst = {
75
+
.name = "bcove_power_btn",
76
+
.type = SFI_DEV_TYPE_IPC,
77
+
.delay = 1,
78
+
.msic = 1,
79
+
.get_platform_data = &mrfld_power_btn_platform_data,
80
+
};
81
+
82
+
sfi_device(mrfld_power_btn_dev_id);
+1
-1
arch/x86/platform/intel-mid/device_libs/platform_mrfld_wdt.c
+1
-1
arch/x86/platform/intel-mid/device_libs/platform_mrfld_wdt.c
+4
-11
arch/x86/platform/intel-mid/mfld.c
+4
-11
arch/x86/platform/intel-mid/mfld.c
···
17
17
18
18
#include "intel_mid_weak_decls.h"
19
19
20
-
static void penwell_arch_setup(void);
21
-
/* penwell arch ops */
22
-
static struct intel_mid_ops penwell_ops = {
23
-
.arch_setup = penwell_arch_setup,
24
-
};
25
-
26
-
static void mfld_power_off(void)
27
-
{
28
-
}
29
-
30
20
static unsigned long __init mfld_calibrate_tsc(void)
31
21
{
32
22
unsigned long fast_calibrate;
···
53
63
static void __init penwell_arch_setup(void)
54
64
{
55
65
x86_platform.calibrate_tsc = mfld_calibrate_tsc;
56
-
pm_power_off = mfld_power_off;
57
66
}
67
+
68
+
static struct intel_mid_ops penwell_ops = {
69
+
.arch_setup = penwell_arch_setup,
70
+
};
58
71
59
72
void *get_penwell_ops(void)
60
73
{