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mei: trace: print return value of pci_cfg_read

Extend debug capabilities.
Add return value print in the trace_mei_pci_cfg_read().

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Link: https://patch.msgid.link/20260201094358.1440593-5-alexander.usyskin@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Alexander Usyskin and committed by
Greg Kroah-Hartman
eb1b5fc7 bf025a84

+17 -12
+9 -6
drivers/misc/mei/hw-me.c
··· 1505 1505 { 1506 1506 u32 reg; 1507 1507 unsigned int devfn; 1508 + int ret; 1508 1509 1509 1510 devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0); 1510 - pci_bus_read_config_dword(pdev->bus, devfn, PCI_CFG_HFS_2, &reg); 1511 - trace_mei_pci_cfg_read(&pdev->dev, "PCI_CFG_HFS_2", PCI_CFG_HFS_2, reg); 1511 + ret = pci_bus_read_config_dword(pdev->bus, devfn, PCI_CFG_HFS_2, &reg); 1512 + trace_mei_pci_cfg_read(&pdev->dev, "PCI_CFG_HFS_2", PCI_CFG_HFS_2, reg, ret); 1512 1513 /* make sure that bit 9 (NM) is up and bit 10 (DM) is down */ 1513 1514 return (reg & 0x600) == 0x200; 1514 1515 } ··· 1532 1531 { 1533 1532 u32 reg; 1534 1533 unsigned int devfn; 1534 + int ret; 1535 1535 1536 1536 devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0); 1537 - pci_bus_read_config_dword(pdev->bus, devfn, PCI_CFG_HFS_1, &reg); 1538 - trace_mei_pci_cfg_read(&pdev->dev, "PCI_CFG_HFS_1", PCI_CFG_HFS_1, reg); 1537 + ret = pci_bus_read_config_dword(pdev->bus, devfn, PCI_CFG_HFS_1, &reg); 1538 + trace_mei_pci_cfg_read(&pdev->dev, "PCI_CFG_HFS_1", PCI_CFG_HFS_1, reg, ret); 1539 1539 return (reg & PCI_CFG_HFS_1_OPMODE_MSK) == PCI_CFG_HFS_1_OPMODE_SPS; 1540 1540 } 1541 1541 ··· 1558 1556 u32 reg; 1559 1557 u32 fw_type; 1560 1558 unsigned int devfn; 1559 + int ret; 1561 1560 1562 1561 devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0); 1563 - pci_bus_read_config_dword(pdev->bus, devfn, PCI_CFG_HFS_3, &reg); 1564 - trace_mei_pci_cfg_read(&pdev->dev, "PCI_CFG_HFS_3", PCI_CFG_HFS_3, reg); 1562 + ret = pci_bus_read_config_dword(pdev->bus, devfn, PCI_CFG_HFS_3, &reg); 1563 + trace_mei_pci_cfg_read(&pdev->dev, "PCI_CFG_HFS_3", PCI_CFG_HFS_3, reg, ret); 1565 1564 fw_type = (reg & PCI_CFG_HFS_3_FW_SKU_MSK); 1566 1565 1567 1566 dev_dbg(&pdev->dev, "fw type is %d\n", fw_type);
+1 -1
drivers/misc/mei/hw-txe.c
··· 651 651 &fw_status->status[i]); 652 652 trace_mei_pci_cfg_read(&dev->dev, "PCI_CFG_HSF_X", 653 653 fw_src->status[i], 654 - fw_status->status[i]); 654 + fw_status->status[i], ret); 655 655 if (ret) 656 656 return ret; 657 657 }
+6 -4
drivers/misc/mei/mei-trace.h
··· 55 55 ); 56 56 57 57 TRACE_EVENT(mei_pci_cfg_read, 58 - TP_PROTO(const struct device *dev, const char *reg, u32 offs, u32 val), 59 - TP_ARGS(dev, reg, offs, val), 58 + TP_PROTO(const struct device *dev, const char *reg, u32 offs, u32 val, int ret), 59 + TP_ARGS(dev, reg, offs, val, ret), 60 60 TP_STRUCT__entry( 61 61 __string(dev, dev_name(dev)) 62 62 __string(reg, reg) 63 63 __field(u32, offs) 64 64 __field(u32, val) 65 + __field(int, ret) 65 66 ), 66 67 TP_fast_assign( 67 68 __assign_str(dev); 68 69 __assign_str(reg); 69 70 __entry->offs = offs; 70 71 __entry->val = val; 72 + __entry->ret = ret; 71 73 ), 72 - TP_printk("[%s] pci cfg read %s:[%#x] = %#x", 73 - __get_str(dev), __get_str(reg), __entry->offs, __entry->val) 74 + TP_printk("[%s] pci cfg read %s:[%#x] = %#x, ret = %d", 75 + __get_str(dev), __get_str(reg), __entry->offs, __entry->val, __entry->ret) 74 76 ); 75 77 76 78 #endif /* _MEI_TRACE_H_ */
+1 -1
drivers/misc/mei/pci-me.c
··· 152 152 int ret; 153 153 154 154 ret = pci_read_config_dword(pdev, where, val); 155 - trace_mei_pci_cfg_read(&dev->dev, name, where, *val); 155 + trace_mei_pci_cfg_read(&dev->dev, name, where, *val, ret); 156 156 return ret; 157 157 } 158 158