tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

Merge tag 'soc-fixes-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
"Too many fixes have accumulated in the soc tree, so this is a fairly
large set. As usual, most of the fixes are for devicetree files, but
there are also notable code changes for imx and omap regressions as
well as some maintainer file updates.

imx:
- Fix an Ethernet issue on imx6ul-14x14-evk board that is caused by
independent PHY reset.

- Add missing `dma-coherent` property for LayerScape device trees to
fix a kernel BUG report.

- Use IRQCHIP_DECLARE for AVIC driver to fix a boot issue on i.MX25
with fw_devlink=on.

- Add missing I2C pinctrl entry for imx8mp-phyboard-pollux-rdk board
to fix the broken I2C GPIO recovery support.

- Add `fsl,use-minimum-ecc` property for imx6ull-myir-mys-6ulx-eval
device tree to fix UBI filesystem mount failure.

at91:
- wrong phy address that blocks Ethernet use on boards with sama5d27
SoM1

- restrictive pin possibilities for sam9x60

omap:
- Fix ocp interconnect bus access error reporting for omap_l3_noc by
setting IRQF_NO_THREAD

- Fix changed mmc slot order regression by adding mmc aliases for
am335x

- Fix dra7 reboot regression caused by invalid pcie reset map

- Fix smartreflex init regression caused by dropped legacy data

- Fix ti-sysc driver warning on unbind if reset is not deasserted

- Fix flakey reset deassert for dra7 iva

stm32:
- MAINTAINER file updates

broadcom:
- brcmstb SoC ID build fix

- MAINTAINER file updates"

* tag 'soc-fixes-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
MAINTAINERS: Add Alain Volmat as STM32 I2C/SMBUS maintainer
MAINTAINERS: Remove Vincent Abriou for STM/STI DRM drivers.
MAINTAINERS: Update some st.com email addresses to foss.st.com
ARM: dts: imx6ull: fix ubi filesystem mount failed
ARM: imx6ul-14x14-evk: Do not reset the Ethernet PHYs independently
arm64: dts: imx8mp-phyboard-pollux-rdk: Add missing pinctrl entry
arm64: dts: ls1012a: mark crypto engine dma coherent
arm64: dts: ls1043a: mark crypto engine dma coherent
arm64: dts: ls1046a: mark crypto engine dma coherent
ARM: imx: avic: Convert to using IRQCHIP_DECLARE
ARM: dts: at91: sam9x60: fix mux-mask to match product's datasheet
ARM: dts: at91: sam9x60: fix mux-mask for PA7 so it can be set to A, B and C
ARM: dts: at91-sama5d27_som1: fix phy address to 7
soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva
bus: ti-sysc: Fix warning on unbind if reset is not deasserted
ARM: OMAP2+: Fix smartreflex init regression after dropping legacy data
soc: ti: omap-prm: Fix reboot issue with invalid pcie reset map for dra7
MAINTAINERS: rectify BROADCOM PMB (POWER MANAGEMENT BUS) DRIVER
ARM: dts: am33xx: add aliases for mmc interfaces
bus: omap_l3_noc: mark l3 irqs as IRQF_NO_THREAD

Linus Torvalds eb3991ef 6c20f6df

+136 -120
+16 -17
MAINTAINERS
··· 2489 2489 N: sc2731 2490 2490 2491 2491 ARM/STI ARCHITECTURE 2492 - M: Patrice Chotard <patrice.chotard@st.com> 2492 + M: Patrice Chotard <patrice.chotard@foss.st.com> 2493 2493 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 2494 2494 S: Maintained 2495 2495 W: http://www.stlinux.com ··· 2522 2522 2523 2523 ARM/STM32 ARCHITECTURE 2524 2524 M: Maxime Coquelin <mcoquelin.stm32@gmail.com> 2525 - M: Alexandre Torgue <alexandre.torgue@st.com> 2525 + M: Alexandre Torgue <alexandre.torgue@foss.st.com> 2526 2526 L: linux-stm32@st-md-mailman.stormreply.com (moderated for non-subscribers) 2527 2527 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 2528 2528 S: Maintained ··· 3115 3115 F: drivers/md/bcache/ 3116 3116 3117 3117 BDISP ST MEDIA DRIVER 3118 - M: Fabien Dessenne <fabien.dessenne@st.com> 3118 + M: Fabien Dessenne <fabien.dessenne@foss.st.com> 3119 3119 L: linux-media@vger.kernel.org 3120 3120 S: Supported 3121 3121 W: https://linuxtv.org ··· 3675 3675 L: linux-pm@vger.kernel.org 3676 3676 S: Maintained 3677 3677 T: git git://github.com/broadcom/stblinux.git 3678 - F: drivers/soc/bcm/bcm-pmb.c 3678 + F: drivers/soc/bcm/bcm63xx/bcm-pmb.c 3679 3679 F: include/dt-bindings/soc/bcm-pmb.h 3680 3680 3681 3681 BROADCOM SPECIFIC AMBA DRIVER (BCMA) ··· 5080 5080 F: drivers/platform/x86/dell/dell-wmi.c 5081 5081 5082 5082 DELTA ST MEDIA DRIVER 5083 - M: Hugues Fruchet <hugues.fruchet@st.com> 5083 + M: Hugues Fruchet <hugues.fruchet@foss.st.com> 5084 5084 L: linux-media@vger.kernel.org 5085 5085 S: Supported 5086 5086 W: https://linuxtv.org ··· 6006 6006 6007 6007 DRM DRIVERS FOR STI 6008 6008 M: Benjamin Gaignard <benjamin.gaignard@linaro.org> 6009 - M: Vincent Abriou <vincent.abriou@st.com> 6010 6009 L: dri-devel@lists.freedesktop.org 6011 6010 S: Maintained 6012 6011 T: git git://anongit.freedesktop.org/drm/drm-misc ··· 6013 6014 F: drivers/gpu/drm/sti 6014 6015 6015 6016 DRM DRIVERS FOR STM 6016 - M: Yannick Fertre <yannick.fertre@st.com> 6017 - M: Philippe Cornu <philippe.cornu@st.com> 6017 + M: Yannick Fertre <yannick.fertre@foss.st.com> 6018 + M: Philippe Cornu <philippe.cornu@foss.st.com> 6018 6019 M: Benjamin Gaignard <benjamin.gaignard@linaro.org> 6019 - M: Vincent Abriou <vincent.abriou@st.com> 6020 6020 L: dri-devel@lists.freedesktop.org 6021 6021 S: Maintained 6022 6022 T: git git://anongit.freedesktop.org/drm/drm-misc ··· 8228 8230 F: mm/hugetlb.c 8229 8231 8230 8232 HVA ST MEDIA DRIVER 8231 - M: Jean-Christophe Trotin <jean-christophe.trotin@st.com> 8233 + M: Jean-Christophe Trotin <jean-christophe.trotin@foss.st.com> 8232 8234 L: linux-media@vger.kernel.org 8233 8235 S: Supported 8234 8236 W: https://linuxtv.org ··· 11163 11165 F: drivers/media/dvb-frontends/stv6111* 11164 11166 11165 11167 MEDIA DRIVERS FOR STM32 - DCMI 11166 - M: Hugues Fruchet <hugues.fruchet@st.com> 11168 + M: Hugues Fruchet <hugues.fruchet@foss.st.com> 11167 11169 L: linux-media@vger.kernel.org 11168 11170 S: Supported 11169 11171 T: git git://linuxtv.org/media_tree.git ··· 16936 16938 F: drivers/media/i2c/st-mipid02.c 16937 16939 16938 16940 ST STM32 I2C/SMBUS DRIVER 16939 - M: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> 16941 + M: Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com> 16942 + M: Alain Volmat <alain.volmat@foss.st.com> 16940 16943 L: linux-i2c@vger.kernel.org 16941 16944 S: Maintained 16942 16945 F: drivers/i2c/busses/i2c-stm32* ··· 17062 17063 F: kernel/static_call.c 17063 17064 17064 17065 STI AUDIO (ASoC) DRIVERS 17065 - M: Arnaud Pouliquen <arnaud.pouliquen@st.com> 17066 + M: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> 17066 17067 L: alsa-devel@alsa-project.org (moderated for non-subscribers) 17067 17068 S: Maintained 17068 17069 F: Documentation/devicetree/bindings/sound/st,sti-asoc-card.txt ··· 17082 17083 F: drivers/media/usb/stk1160/ 17083 17084 17084 17085 STM32 AUDIO (ASoC) DRIVERS 17085 - M: Olivier Moysan <olivier.moysan@st.com> 17086 - M: Arnaud Pouliquen <arnaud.pouliquen@st.com> 17086 + M: Olivier Moysan <olivier.moysan@foss.st.com> 17087 + M: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> 17087 17088 L: alsa-devel@alsa-project.org (moderated for non-subscribers) 17088 17089 S: Maintained 17089 17090 F: Documentation/devicetree/bindings/iio/adc/st,stm32-*.yaml 17090 17091 F: sound/soc/stm/ 17091 17092 17092 17093 STM32 TIMER/LPTIMER DRIVERS 17093 - M: Fabrice Gasnier <fabrice.gasnier@st.com> 17094 + M: Fabrice Gasnier <fabrice.gasnier@foss.st.com> 17094 17095 S: Maintained 17095 17096 F: Documentation/ABI/testing/*timer-stm32 17096 17097 F: Documentation/devicetree/bindings/*/*stm32-*timer* ··· 17100 17101 17101 17102 STMMAC ETHERNET DRIVER 17102 17103 M: Giuseppe Cavallaro <peppe.cavallaro@st.com> 17103 - M: Alexandre Torgue <alexandre.torgue@st.com> 17104 + M: Alexandre Torgue <alexandre.torgue@foss.st.com> 17104 17105 M: Jose Abreu <joabreu@synopsys.com> 17105 17106 L: netdev@vger.kernel.org 17106 17107 S: Supported
+3
arch/arm/boot/dts/am33xx.dtsi
··· 40 40 ethernet1 = &cpsw_emac1; 41 41 spi0 = &spi0; 42 42 spi1 = &spi1; 43 + mmc0 = &mmc1; 44 + mmc1 = &mmc2; 45 + mmc2 = &mmc3; 43 46 }; 44 47 45 48 cpus {
-8
arch/arm/boot/dts/at91-sam9x60ek.dts
··· 334 334 }; 335 335 336 336 &pinctrl { 337 - atmel,mux-mask = < 338 - /* A B C */ 339 - 0xFFFFFE7F 0xC0E0397F 0xEF00019D /* pioA */ 340 - 0x03FFFFFF 0x02FC7E68 0x00780000 /* pioB */ 341 - 0xffffffff 0xF83FFFFF 0xB800F3FC /* pioC */ 342 - 0x003FFFFF 0x003F8000 0x00000000 /* pioD */ 343 - >; 344 - 345 337 adc { 346 338 pinctrl_adc_default: adc_default { 347 339 atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+2 -2
arch/arm/boot/dts/at91-sama5d27_som1.dtsi
··· 84 84 pinctrl-0 = <&pinctrl_macb0_default>; 85 85 phy-mode = "rmii"; 86 86 87 - ethernet-phy@0 { 88 - reg = <0x0>; 87 + ethernet-phy@7 { 88 + reg = <0x7>; 89 89 interrupt-parent = <&pioA>; 90 90 interrupts = <PIN_PD31 IRQ_TYPE_LEVEL_LOW>; 91 91 pinctrl-names = "default";
+16 -6
arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
··· 210 210 micrel,led-mode = <1>; 211 211 clocks = <&clks IMX6UL_CLK_ENET_REF>; 212 212 clock-names = "rmii-ref"; 213 - reset-gpios = <&gpio_spi 1 GPIO_ACTIVE_LOW>; 214 - reset-assert-us = <10000>; 215 - reset-deassert-us = <100>; 216 213 217 214 }; 218 215 ··· 219 222 micrel,led-mode = <1>; 220 223 clocks = <&clks IMX6UL_CLK_ENET2_REF>; 221 224 clock-names = "rmii-ref"; 222 - reset-gpios = <&gpio_spi 2 GPIO_ACTIVE_LOW>; 223 - reset-assert-us = <10000>; 224 - reset-deassert-us = <100>; 225 225 }; 226 226 }; 227 227 }; ··· 235 241 pinctrl-0 = <&pinctrl_flexcan2>; 236 242 xceiver-supply = <&reg_can_3v3>; 237 243 status = "okay"; 244 + }; 245 + 246 + &gpio_spi { 247 + eth0-phy-hog { 248 + gpio-hog; 249 + gpios = <1 GPIO_ACTIVE_HIGH>; 250 + output-high; 251 + line-name = "eth0-phy"; 252 + }; 253 + 254 + eth1-phy-hog { 255 + gpio-hog; 256 + gpios = <2 GPIO_ACTIVE_HIGH>; 257 + output-high; 258 + line-name = "eth1-phy"; 259 + }; 238 260 }; 239 261 240 262 &i2c1 {
+1
arch/arm/boot/dts/imx6ull-myir-mys-6ulx-eval.dts
··· 14 14 }; 15 15 16 16 &gpmi { 17 + fsl,use-minimum-ecc; 17 18 status = "okay"; 18 19 };
+9
arch/arm/boot/dts/sam9x60.dtsi
··· 606 606 compatible = "microchip,sam9x60-pinctrl", "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus"; 607 607 ranges = <0xfffff400 0xfffff400 0x800>; 608 608 609 + /* mux-mask corresponding to sam9x60 SoC in TFBGA228L package */ 610 + atmel,mux-mask = < 611 + /* A B C */ 612 + 0xffffffff 0xffe03fff 0xef00019d /* pioA */ 613 + 0x03ffffff 0x02fc7e7f 0x00780000 /* pioB */ 614 + 0xffffffff 0xffffffff 0xf83fffff /* pioC */ 615 + 0x003fffff 0x003f8000 0x00000000 /* pioD */ 616 + >; 617 + 609 618 pioA: gpio@fffff400 { 610 619 compatible = "microchip,sam9x60-gpio", "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 611 620 reg = <0xfffff400 0x200>;
+15 -1
arch/arm/mach-imx/avic.c
··· 7 7 #include <linux/module.h> 8 8 #include <linux/irq.h> 9 9 #include <linux/irqdomain.h> 10 + #include <linux/irqchip.h> 10 11 #include <linux/io.h> 11 12 #include <linux/of.h> 12 13 #include <linux/of_address.h> ··· 163 162 * interrupts. It registers the interrupt enable and disable functions 164 163 * to the kernel for each interrupt source. 165 164 */ 166 - void __init mxc_init_irq(void __iomem *irqbase) 165 + static void __init mxc_init_irq(void __iomem *irqbase) 167 166 { 168 167 struct device_node *np; 169 168 int irq_base; ··· 221 220 222 221 printk(KERN_INFO "MXC IRQ initialized\n"); 223 222 } 223 + 224 + static int __init imx_avic_init(struct device_node *node, 225 + struct device_node *parent) 226 + { 227 + void __iomem *avic_base; 228 + 229 + avic_base = of_iomap(node, 0); 230 + BUG_ON(!avic_base); 231 + mxc_init_irq(avic_base); 232 + return 0; 233 + } 234 + 235 + IRQCHIP_DECLARE(imx_avic, "fsl,avic", imx_avic_init);
-1
arch/arm/mach-imx/common.h
··· 22 22 void imx21_init_early(void); 23 23 void imx31_init_early(void); 24 24 void imx35_init_early(void); 25 - void mxc_init_irq(void __iomem *); 26 25 void mx31_init_irq(void); 27 26 void mx35_init_irq(void); 28 27 void mxc_set_cpu_type(unsigned int type);
-11
arch/arm/mach-imx/mach-imx1.c
··· 17 17 mxc_set_cpu_type(MXC_CPU_MX1); 18 18 } 19 19 20 - static void __init imx1_init_irq(void) 21 - { 22 - void __iomem *avic_addr; 23 - 24 - avic_addr = ioremap(MX1_AVIC_ADDR, SZ_4K); 25 - WARN_ON(!avic_addr); 26 - 27 - mxc_init_irq(avic_addr); 28 - } 29 - 30 20 static const char * const imx1_dt_board_compat[] __initconst = { 31 21 "fsl,imx1", 32 22 NULL ··· 24 34 25 35 DT_MACHINE_START(IMX1_DT, "Freescale i.MX1 (Device Tree Support)") 26 36 .init_early = imx1_init_early, 27 - .init_irq = imx1_init_irq, 28 37 .dt_compat = imx1_dt_board_compat, 29 38 .restart = mxc_restart, 30 39 MACHINE_END
-12
arch/arm/mach-imx/mach-imx25.c
··· 22 22 imx_aips_allow_unprivileged_access("fsl,imx25-aips"); 23 23 } 24 24 25 - static void __init mx25_init_irq(void) 26 - { 27 - struct device_node *np; 28 - void __iomem *avic_base; 29 - 30 - np = of_find_compatible_node(NULL, NULL, "fsl,avic"); 31 - avic_base = of_iomap(np, 0); 32 - BUG_ON(!avic_base); 33 - mxc_init_irq(avic_base); 34 - } 35 - 36 25 static const char * const imx25_dt_board_compat[] __initconst = { 37 26 "fsl,imx25", 38 27 NULL ··· 31 42 .init_early = imx25_init_early, 32 43 .init_machine = imx25_dt_init, 33 44 .init_late = imx25_pm_init, 34 - .init_irq = mx25_init_irq, 35 45 .dt_compat = imx25_dt_board_compat, 36 46 MACHINE_END
-12
arch/arm/mach-imx/mach-imx27.c
··· 56 56 mxc_set_cpu_type(MXC_CPU_MX27); 57 57 } 58 58 59 - static void __init mx27_init_irq(void) 60 - { 61 - void __iomem *avic_base; 62 - struct device_node *np; 63 - 64 - np = of_find_compatible_node(NULL, NULL, "fsl,avic"); 65 - avic_base = of_iomap(np, 0); 66 - BUG_ON(!avic_base); 67 - mxc_init_irq(avic_base); 68 - } 69 - 70 59 static const char * const imx27_dt_board_compat[] __initconst = { 71 60 "fsl,imx27", 72 61 NULL ··· 64 75 DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)") 65 76 .map_io = mx27_map_io, 66 77 .init_early = imx27_init_early, 67 - .init_irq = mx27_init_irq, 68 78 .init_late = imx27_pm_init, 69 79 .dt_compat = imx27_dt_board_compat, 70 80 MACHINE_END
-1
arch/arm/mach-imx/mach-imx31.c
··· 14 14 DT_MACHINE_START(IMX31_DT, "Freescale i.MX31 (Device Tree Support)") 15 15 .map_io = mx31_map_io, 16 16 .init_early = imx31_init_early, 17 - .init_irq = mx31_init_irq, 18 17 .dt_compat = imx31_dt_board_compat, 19 18 MACHINE_END
-1
arch/arm/mach-imx/mach-imx35.c
··· 27 27 .l2c_aux_mask = ~0, 28 28 .map_io = mx35_map_io, 29 29 .init_early = imx35_init_early, 30 - .init_irq = mx35_init_irq, 31 30 .dt_compat = imx35_dt_board_compat, 32 31 MACHINE_END
-24
arch/arm/mach-imx/mm-imx3.c
··· 109 109 mx3_ccm_base = of_iomap(np, 0); 110 110 BUG_ON(!mx3_ccm_base); 111 111 } 112 - 113 - void __init mx31_init_irq(void) 114 - { 115 - void __iomem *avic_base; 116 - struct device_node *np; 117 - 118 - np = of_find_compatible_node(NULL, NULL, "fsl,imx31-avic"); 119 - avic_base = of_iomap(np, 0); 120 - BUG_ON(!avic_base); 121 - 122 - mxc_init_irq(avic_base); 123 - } 124 112 #endif /* ifdef CONFIG_SOC_IMX31 */ 125 113 126 114 #ifdef CONFIG_SOC_IMX35 ··· 145 157 np = of_find_compatible_node(NULL, NULL, "fsl,imx35-ccm"); 146 158 mx3_ccm_base = of_iomap(np, 0); 147 159 BUG_ON(!mx3_ccm_base); 148 - } 149 - 150 - void __init mx35_init_irq(void) 151 - { 152 - void __iomem *avic_base; 153 - struct device_node *np; 154 - 155 - np = of_find_compatible_node(NULL, NULL, "fsl,imx35-avic"); 156 - avic_base = of_iomap(np, 0); 157 - BUG_ON(!avic_base); 158 - 159 - mxc_init_irq(avic_base); 160 160 } 161 161 #endif /* ifdef CONFIG_SOC_IMX35 */
+58 -17
arch/arm/mach-omap2/sr_device.c
··· 88 88 89 89 extern struct omap_sr_data omap_sr_pdata[]; 90 90 91 - static int __init sr_dev_init(struct omap_hwmod *oh, void *user) 91 + static int __init sr_init_by_name(const char *name, const char *voltdm) 92 92 { 93 93 struct omap_sr_data *sr_data = NULL; 94 94 struct omap_volt_data *volt_data; 95 - struct omap_smartreflex_dev_attr *sr_dev_attr; 96 95 static int i; 97 96 98 - if (!strncmp(oh->name, "smartreflex_mpu_iva", 20) || 99 - !strncmp(oh->name, "smartreflex_mpu", 16)) 97 + if (!strncmp(name, "smartreflex_mpu_iva", 20) || 98 + !strncmp(name, "smartreflex_mpu", 16)) 100 99 sr_data = &omap_sr_pdata[OMAP_SR_MPU]; 101 - else if (!strncmp(oh->name, "smartreflex_core", 17)) 100 + else if (!strncmp(name, "smartreflex_core", 17)) 102 101 sr_data = &omap_sr_pdata[OMAP_SR_CORE]; 103 - else if (!strncmp(oh->name, "smartreflex_iva", 16)) 102 + else if (!strncmp(name, "smartreflex_iva", 16)) 104 103 sr_data = &omap_sr_pdata[OMAP_SR_IVA]; 105 104 106 105 if (!sr_data) { 107 - pr_err("%s: Unknown instance %s\n", __func__, oh->name); 106 + pr_err("%s: Unknown instance %s\n", __func__, name); 108 107 return -EINVAL; 109 108 } 110 109 111 - sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr; 112 - if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) { 113 - pr_err("%s: No voltage domain specified for %s. Cannot initialize\n", 114 - __func__, oh->name); 115 - goto exit; 116 - } 117 - 118 - sr_data->name = oh->name; 110 + sr_data->name = name; 119 111 if (cpu_is_omap343x()) 120 112 sr_data->ip_type = 1; 121 113 else ··· 128 136 } 129 137 } 130 138 131 - sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name); 139 + sr_data->voltdm = voltdm_lookup(voltdm); 132 140 if (!sr_data->voltdm) { 133 141 pr_err("%s: Unable to get voltage domain pointer for VDD %s\n", 134 - __func__, sr_dev_attr->sensor_voltdm_name); 142 + __func__, voltdm); 135 143 goto exit; 136 144 } 137 145 ··· 152 160 return 0; 153 161 } 154 162 163 + static int __init sr_dev_init(struct omap_hwmod *oh, void *user) 164 + { 165 + struct omap_smartreflex_dev_attr *sr_dev_attr; 166 + 167 + sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr; 168 + if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) { 169 + pr_err("%s: No voltage domain specified for %s. Cannot initialize\n", 170 + __func__, oh->name); 171 + return 0; 172 + } 173 + 174 + return sr_init_by_name(oh->name, sr_dev_attr->sensor_voltdm_name); 175 + } 176 + 155 177 /* 156 178 * API to be called from board files to enable smartreflex 157 179 * autocompensation at init. ··· 175 169 sr_enable_on_init = true; 176 170 } 177 171 172 + static const char * const omap4_sr_instances[] = { 173 + "mpu", 174 + "iva", 175 + "core", 176 + }; 177 + 178 + static const char * const dra7_sr_instances[] = { 179 + "mpu", 180 + "core", 181 + }; 182 + 178 183 int __init omap_devinit_smartreflex(void) 179 184 { 185 + const char * const *sr_inst; 186 + int i, nr_sr = 0; 187 + 188 + if (soc_is_omap44xx()) { 189 + sr_inst = omap4_sr_instances; 190 + nr_sr = ARRAY_SIZE(omap4_sr_instances); 191 + 192 + } else if (soc_is_dra7xx()) { 193 + sr_inst = dra7_sr_instances; 194 + nr_sr = ARRAY_SIZE(dra7_sr_instances); 195 + } 196 + 197 + if (nr_sr) { 198 + const char *name, *voltdm; 199 + 200 + for (i = 0; i < nr_sr; i++) { 201 + name = kasprintf(GFP_KERNEL, "smartreflex_%s", sr_inst[i]); 202 + voltdm = sr_inst[i]; 203 + sr_init_by_name(name, voltdm); 204 + } 205 + 206 + return 0; 207 + } 208 + 180 209 return omap_hwmod_for_each_by_class("smartreflex", sr_dev_init, NULL); 181 210 }
+1
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
··· 198 198 ranges = <0x0 0x00 0x1700000 0x100000>; 199 199 reg = <0x00 0x1700000 0x0 0x100000>; 200 200 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 201 + dma-coherent; 201 202 202 203 sec_jr0: jr@10000 { 203 204 compatible = "fsl,sec-v5.4-job-ring",
+1
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
··· 348 348 ranges = <0x0 0x00 0x1700000 0x100000>; 349 349 reg = <0x00 0x1700000 0x0 0x100000>; 350 350 interrupts = <0 75 0x4>; 351 + dma-coherent; 351 352 352 353 sec_jr0: jr@10000 { 353 354 compatible = "fsl,sec-v5.4-job-ring",
+1
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
··· 354 354 ranges = <0x0 0x00 0x1700000 0x100000>; 355 355 reg = <0x00 0x1700000 0x0 0x100000>; 356 356 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 357 + dma-coherent; 357 358 358 359 sec_jr0: jr@10000 { 359 360 compatible = "fsl,sec-v5.4-job-ring",
+1 -1
arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
··· 35 35 36 36 &i2c2 { 37 37 clock-frequency = <400000>; 38 - pinctrl-names = "default"; 38 + pinctrl-names = "default", "gpio"; 39 39 pinctrl-0 = <&pinctrl_i2c2>; 40 40 pinctrl-1 = <&pinctrl_i2c2_gpio>; 41 41 sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+1 -1
arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
··· 67 67 68 68 &i2c1 { 69 69 clock-frequency = <400000>; 70 - pinctrl-names = "default"; 70 + pinctrl-names = "default", "gpio"; 71 71 pinctrl-0 = <&pinctrl_i2c1>; 72 72 pinctrl-1 = <&pinctrl_i2c1_gpio>; 73 73 sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+2 -2
drivers/bus/omap_l3_noc.c
··· 285 285 */ 286 286 l3->debug_irq = platform_get_irq(pdev, 0); 287 287 ret = devm_request_irq(l3->dev, l3->debug_irq, l3_interrupt_handler, 288 - 0x0, "l3-dbg-irq", l3); 288 + IRQF_NO_THREAD, "l3-dbg-irq", l3); 289 289 if (ret) { 290 290 dev_err(l3->dev, "request_irq failed for %d\n", 291 291 l3->debug_irq); ··· 294 294 295 295 l3->app_irq = platform_get_irq(pdev, 1); 296 296 ret = devm_request_irq(l3->dev, l3->app_irq, l3_interrupt_handler, 297 - 0x0, "l3-app-irq", l3); 297 + IRQF_NO_THREAD, "l3-app-irq", l3); 298 298 if (ret) 299 299 dev_err(l3->dev, "request_irq failed for %d\n", l3->app_irq); 300 300
+3 -1
drivers/bus/ti-sysc.c
··· 3053 3053 3054 3054 pm_runtime_put_sync(&pdev->dev); 3055 3055 pm_runtime_disable(&pdev->dev); 3056 - reset_control_assert(ddata->rsts); 3056 + 3057 + if (!reset_control_status(ddata->rsts)) 3058 + reset_control_assert(ddata->rsts); 3057 3059 3058 3060 unprepare: 3059 3061 sysc_unprepare(ddata);
+6 -2
drivers/soc/ti/omap_prm.c
··· 332 332 { 333 333 .name = "l3init", .base = 0x4ae07300, 334 334 .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_alwon, 335 - .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_012, 335 + .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_01, 336 336 .clkdm_name = "pcie" 337 337 }, 338 338 { ··· 830 830 reset->prm->data->name, id); 831 831 832 832 exit: 833 - if (reset->clkdm) 833 + if (reset->clkdm) { 834 + /* At least dra7 iva needs a delay before clkdm idle */ 835 + if (has_rstst) 836 + udelay(1); 834 837 pdata->clkdm_allow_idle(reset->clkdm); 838 + } 835 839 836 840 return ret; 837 841 }