Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6:
OMAP2: PRCM: fix some SHIFT macros that were actually bitmasks
OMAP2+: PM/serial: fix console semaphore acquire during suspend
OMAP1: SRAM: fix size for OMAP1611 SoCs
arm: omap2: io: fix clk_get() error check
arm: plat-omap: counter_32k: use IS_ERR() instead of NULL check
omap: nand: remove hardware ECC as default
omap: zoom: wl1271 slot is MMC_CAP_POWER_OFF_CARD
omap: PM debug: fix wake-on-timer debugfs dependency
+79
-37
+1
-1
arch/arm/mach-omap2/board-zoom-peripherals.c
+1
-1
arch/arm/mach-omap2/board-zoom-peripherals.c
+1
-1
arch/arm/mach-omap2/io.c
+1
-1
arch/arm/mach-omap2/io.c
+17
-17
arch/arm/mach-omap2/pm-debug.c
+17
-17
arch/arm/mach-omap2/pm-debug.c
···
161
161
printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val);
162
162
}
163
163
164
+
void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds)
165
+
{
166
+
u32 tick_rate, cycles;
167
+
168
+
if (!seconds && !milliseconds)
169
+
return;
170
+
171
+
tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup));
172
+
cycles = tick_rate * seconds + tick_rate * milliseconds / 1000;
173
+
omap_dm_timer_stop(gptimer_wakeup);
174
+
omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0xffffffff - cycles);
175
+
176
+
pr_info("PM: Resume timer in %u.%03u secs"
177
+
" (%d ticks at %d ticks/sec.)\n",
178
+
seconds, milliseconds, cycles, tick_rate);
179
+
}
180
+
164
181
#ifdef CONFIG_DEBUG_FS
165
182
#include <linux/debugfs.h>
166
183
#include <linux/seq_file.h>
···
369
352
pwrdm->state_timer[prev] += t - pwrdm->timer;
370
353
371
354
pwrdm->timer = t;
372
-
}
373
-
374
-
void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds)
375
-
{
376
-
u32 tick_rate, cycles;
377
-
378
-
if (!seconds && !milliseconds)
379
-
return;
380
-
381
-
tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup));
382
-
cycles = tick_rate * seconds + tick_rate * milliseconds / 1000;
383
-
omap_dm_timer_stop(gptimer_wakeup);
384
-
omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0xffffffff - cycles);
385
-
386
-
pr_info("PM: Resume timer in %u.%03u secs"
387
-
" (%d ticks at %d ticks/sec.)\n",
388
-
seconds, milliseconds, cycles, tick_rate);
389
355
}
390
356
391
357
static int clkdm_dbg_show_counter(struct clockdomain *clkdm, void *user)
+31
-3
arch/arm/mach-omap2/pm24xx.c
+31
-3
arch/arm/mach-omap2/pm24xx.c
···
53
53
#include <plat/powerdomain.h>
54
54
#include <plat/clockdomain.h>
55
55
56
+
#ifdef CONFIG_SUSPEND
57
+
static suspend_state_t suspend_state = PM_SUSPEND_ON;
58
+
static inline bool is_suspending(void)
59
+
{
60
+
return (suspend_state != PM_SUSPEND_ON);
61
+
}
62
+
#else
63
+
static inline bool is_suspending(void)
64
+
{
65
+
return false;
66
+
}
67
+
#endif
68
+
56
69
static void (*omap2_sram_idle)(void);
57
70
static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl,
58
71
void __iomem *sdrc_power);
···
133
120
goto no_sleep;
134
121
135
122
/* Block console output in case it is on one of the OMAP UARTs */
136
-
if (try_acquire_console_sem())
137
-
goto no_sleep;
123
+
if (!is_suspending())
124
+
if (try_acquire_console_sem())
125
+
goto no_sleep;
138
126
139
127
omap_uart_prepare_idle(0);
140
128
omap_uart_prepare_idle(1);
···
150
136
omap_uart_resume_idle(1);
151
137
omap_uart_resume_idle(0);
152
138
153
-
release_console_sem();
139
+
if (!is_suspending())
140
+
release_console_sem();
154
141
155
142
no_sleep:
156
143
if (omap2_pm_debug) {
···
299
284
local_irq_enable();
300
285
}
301
286
287
+
static int omap2_pm_begin(suspend_state_t state)
288
+
{
289
+
suspend_state = state;
290
+
return 0;
291
+
}
292
+
302
293
static int omap2_pm_prepare(void)
303
294
{
304
295
/* We cannot sleep in idle until we have resumed */
···
354
333
enable_hlt();
355
334
}
356
335
336
+
static void omap2_pm_end(void)
337
+
{
338
+
suspend_state = PM_SUSPEND_ON;
339
+
}
340
+
357
341
static struct platform_suspend_ops omap_pm_ops = {
342
+
.begin = omap2_pm_begin,
358
343
.prepare = omap2_pm_prepare,
359
344
.enter = omap2_pm_enter,
360
345
.finish = omap2_pm_finish,
346
+
.end = omap2_pm_end,
361
347
.valid = suspend_valid_only_mem,
362
348
};
363
349
+20
-7
arch/arm/mach-omap2/pm34xx.c
+20
-7
arch/arm/mach-omap2/pm34xx.c
···
50
50
#include "sdrc.h"
51
51
#include "control.h"
52
52
53
+
#ifdef CONFIG_SUSPEND
54
+
static suspend_state_t suspend_state = PM_SUSPEND_ON;
55
+
static inline bool is_suspending(void)
56
+
{
57
+
return (suspend_state != PM_SUSPEND_ON);
58
+
}
59
+
#else
60
+
static inline bool is_suspending(void)
61
+
{
62
+
return false;
63
+
}
64
+
#endif
65
+
53
66
/* Scratchpad offsets */
54
67
#define OMAP343X_TABLE_ADDRESS_OFFSET 0xc4
55
68
#define OMAP343X_TABLE_VALUE_OFFSET 0xc0
···
400
387
}
401
388
402
389
/* Block console output in case it is on one of the OMAP UARTs */
403
-
if (per_next_state < PWRDM_POWER_ON ||
404
-
core_next_state < PWRDM_POWER_ON)
405
-
if (try_acquire_console_sem())
406
-
goto console_still_active;
390
+
if (!is_suspending())
391
+
if (per_next_state < PWRDM_POWER_ON ||
392
+
core_next_state < PWRDM_POWER_ON)
393
+
if (try_acquire_console_sem())
394
+
goto console_still_active;
407
395
408
396
/* PER */
409
397
if (per_next_state < PWRDM_POWER_ON) {
···
484
470
omap_uart_resume_idle(3);
485
471
}
486
472
487
-
release_console_sem();
473
+
if (!is_suspending())
474
+
release_console_sem();
488
475
489
476
console_still_active:
490
477
/* Disable IO-PAD and IO-CHAIN wakeup */
···
529
514
}
530
515
531
516
#ifdef CONFIG_SUSPEND
532
-
static suspend_state_t suspend_state;
533
-
534
517
static int omap3_pm_prepare(void)
535
518
{
536
519
disable_hlt();
+6
-5
arch/arm/mach-omap2/prcm-common.h
+6
-5
arch/arm/mach-omap2/prcm-common.h
···
243
243
#define OMAP24XX_EN_GPT1_MASK (1 << 0)
244
244
245
245
/* PM_WKST_WKUP, CM_IDLEST_WKUP shared bits */
246
-
#define OMAP24XX_ST_GPIOS_SHIFT (1 << 2)
247
-
#define OMAP24XX_ST_GPIOS_MASK 2
248
-
#define OMAP24XX_ST_GPT1_SHIFT (1 << 0)
249
-
#define OMAP24XX_ST_GPT1_MASK 0
246
+
#define OMAP24XX_ST_GPIOS_SHIFT 2
247
+
#define OMAP24XX_ST_GPIOS_MASK (1 << 2)
248
+
#define OMAP24XX_ST_GPT1_SHIFT 0
249
+
#define OMAP24XX_ST_GPT1_MASK (1 << 0)
250
250
251
251
/* CM_IDLEST_MDM and PM_WKST_MDM shared bits */
252
-
#define OMAP2430_ST_MDM_SHIFT (1 << 0)
252
+
#define OMAP2430_ST_MDM_SHIFT 0
253
+
#define OMAP2430_ST_MDM_MASK (1 << 0)
253
254
254
255
255
256
/* 3430 register bits shared between CM & PRM registers */
+2
-1
arch/arm/plat-omap/counter_32k.c
+2
-1
arch/arm/plat-omap/counter_32k.c
···
16
16
#include <linux/init.h>
17
17
#include <linux/clk.h>
18
18
#include <linux/io.h>
19
+
#include <linux/err.h>
19
20
20
21
#include <plat/common.h>
21
22
#include <plat/board.h>
···
165
164
return -ENODEV;
166
165
167
166
sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
168
-
if (sync_32k_ick)
167
+
if (!IS_ERR(sync_32k_ick))
169
168
clk_enable(sync_32k_ick);
170
169
171
170
clocksource_32k.mult = clocksource_hz2mult(32768,
+1
-1
arch/arm/plat-omap/sram.c
+1
-1
arch/arm/plat-omap/sram.c