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Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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iio: gyro: mpu3050-core: make use of regmap_clear_bits(), regmap_set_bits()

Instead of using regmap_update_bits() and passing the mask twice, use
regmap_set_bits().

Instead of using regmap_update_bits() and passing val = 0, use
regmap_clear_bits().

Suggested-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Signed-off-by: Trevor Gamblin <tgamblin@baylibre.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Link: https://patch.msgid.link/20240617-review-v3-22-88d1338c4cca@baylibre.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

authored by

Trevor Gamblin and committed by
Jonathan Cameron eceddd01 e5757bd8

+14 -21
+14 -21
drivers/iio/gyro/mpu3050-core.c
··· 197 197 int i; 198 198 199 199 /* Reset */ 200 - ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM, 201 - MPU3050_PWR_MGM_RESET, MPU3050_PWR_MGM_RESET); 200 + ret = regmap_set_bits(mpu3050->map, MPU3050_PWR_MGM, 201 + MPU3050_PWR_MGM_RESET); 202 202 if (ret) 203 203 return ret; 204 204 ··· 513 513 "FIFO overflow! Emptying and resetting FIFO\n"); 514 514 fifo_overflow = true; 515 515 /* Reset and enable the FIFO */ 516 - ret = regmap_update_bits(mpu3050->map, 517 - MPU3050_USR_CTRL, 518 - MPU3050_USR_CTRL_FIFO_EN | 519 - MPU3050_USR_CTRL_FIFO_RST, 520 - MPU3050_USR_CTRL_FIFO_EN | 521 - MPU3050_USR_CTRL_FIFO_RST); 516 + ret = regmap_set_bits(mpu3050->map, MPU3050_USR_CTRL, 517 + MPU3050_USR_CTRL_FIFO_EN | 518 + MPU3050_USR_CTRL_FIFO_RST); 522 519 if (ret) { 523 520 dev_info(mpu3050->dev, "error resetting FIFO\n"); 524 521 goto out_trigger_unlock; ··· 796 799 u64 otp; 797 800 798 801 /* Reset */ 799 - ret = regmap_update_bits(mpu3050->map, 800 - MPU3050_PWR_MGM, 801 - MPU3050_PWR_MGM_RESET, 802 - MPU3050_PWR_MGM_RESET); 802 + ret = regmap_set_bits(mpu3050->map, MPU3050_PWR_MGM, 803 + MPU3050_PWR_MGM_RESET); 803 804 if (ret) 804 805 return ret; 805 806 ··· 867 872 msleep(200); 868 873 869 874 /* Take device out of sleep mode */ 870 - ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM, 871 - MPU3050_PWR_MGM_SLEEP, 0); 875 + ret = regmap_clear_bits(mpu3050->map, MPU3050_PWR_MGM, 876 + MPU3050_PWR_MGM_SLEEP); 872 877 if (ret) { 873 878 regulator_bulk_disable(ARRAY_SIZE(mpu3050->regs), mpu3050->regs); 874 879 dev_err(mpu3050->dev, "error setting power mode\n"); ··· 890 895 * then we would be wasting power unless we go to sleep mode 891 896 * first. 892 897 */ 893 - ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM, 894 - MPU3050_PWR_MGM_SLEEP, MPU3050_PWR_MGM_SLEEP); 898 + ret = regmap_set_bits(mpu3050->map, MPU3050_PWR_MGM, 899 + MPU3050_PWR_MGM_SLEEP); 895 900 if (ret) 896 901 dev_err(mpu3050->dev, "error putting to sleep\n"); 897 902 ··· 992 997 return ret; 993 998 994 999 /* Reset and enable the FIFO */ 995 - ret = regmap_update_bits(mpu3050->map, MPU3050_USR_CTRL, 996 - MPU3050_USR_CTRL_FIFO_EN | 997 - MPU3050_USR_CTRL_FIFO_RST, 998 - MPU3050_USR_CTRL_FIFO_EN | 999 - MPU3050_USR_CTRL_FIFO_RST); 1000 + ret = regmap_set_bits(mpu3050->map, MPU3050_USR_CTRL, 1001 + MPU3050_USR_CTRL_FIFO_EN | 1002 + MPU3050_USR_CTRL_FIFO_RST); 1000 1003 if (ret) 1001 1004 return ret; 1002 1005