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drm/amdgpu/vcn: identify unified queue in sw init

Determine whether VCN using unified queue in sw_init, instead of calling
functions later on.

v2: fix coding style

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Boyuan Zhang and committed by
Alex Deucher
ecfa23c8 7bbae44c

+16 -24
+15 -24
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
··· 147 147 } 148 148 } 149 149 150 + /* from vcn4 and above, only unified queue is used */ 151 + adev->vcn.using_unified_queue = 152 + amdgpu_ip_version(adev, UVD_HWIP, 0) >= IP_VERSION(4, 0, 0); 153 + 150 154 hdr = (const struct common_firmware_header *)adev->vcn.fw[0]->data; 151 155 adev->vcn.fw_version = le32_to_cpu(hdr->ucode_version); 152 156 ··· 277 273 mutex_destroy(&adev->vcn.vcn_pg_lock); 278 274 279 275 return 0; 280 - } 281 - 282 - /* from vcn4 and above, only unified queue is used */ 283 - static bool amdgpu_vcn_using_unified_queue(struct amdgpu_ring *ring) 284 - { 285 - struct amdgpu_device *adev = ring->adev; 286 - bool ret = false; 287 - 288 - if (amdgpu_ip_version(adev, UVD_HWIP, 0) >= IP_VERSION(4, 0, 0)) 289 - ret = true; 290 - 291 - return ret; 292 276 } 293 277 294 278 bool amdgpu_vcn_is_disabled_vcn(struct amdgpu_device *adev, enum vcn_ring_type type, uint32_t vcn_instance) ··· 716 724 struct amdgpu_job *job; 717 725 struct amdgpu_ib *ib; 718 726 uint64_t addr = AMDGPU_GPU_PAGE_ALIGN(ib_msg->gpu_addr); 719 - bool sq = amdgpu_vcn_using_unified_queue(ring); 720 727 uint32_t *ib_checksum; 721 728 uint32_t ib_pack_in_dw; 722 729 int i, r; 723 730 724 - if (sq) 731 + if (adev->vcn.using_unified_queue) 725 732 ib_size_dw += 8; 726 733 727 734 r = amdgpu_job_alloc_with_ib(ring->adev, NULL, NULL, ··· 733 742 ib->length_dw = 0; 734 743 735 744 /* single queue headers */ 736 - if (sq) { 745 + if (adev->vcn.using_unified_queue) { 737 746 ib_pack_in_dw = sizeof(struct amdgpu_vcn_decode_buffer) / sizeof(uint32_t) 738 747 + 4 + 2; /* engine info + decoding ib in dw */ 739 748 ib_checksum = amdgpu_vcn_unified_ring_ib_header(ib, ib_pack_in_dw, false); ··· 752 761 for (i = ib->length_dw; i < ib_size_dw; ++i) 753 762 ib->ptr[i] = 0x0; 754 763 755 - if (sq) 764 + if (adev->vcn.using_unified_queue) 756 765 amdgpu_vcn_unified_ring_ib_checksum(&ib_checksum, ib_pack_in_dw); 757 766 758 767 r = amdgpu_job_submit_direct(job, ring, &f); ··· 842 851 struct dma_fence **fence) 843 852 { 844 853 unsigned int ib_size_dw = 16; 854 + struct amdgpu_device *adev = ring->adev; 845 855 struct amdgpu_job *job; 846 856 struct amdgpu_ib *ib; 847 857 struct dma_fence *f = NULL; 848 858 uint32_t *ib_checksum = NULL; 849 859 uint64_t addr; 850 - bool sq = amdgpu_vcn_using_unified_queue(ring); 851 860 int i, r; 852 861 853 - if (sq) 862 + if (adev->vcn.using_unified_queue) 854 863 ib_size_dw += 8; 855 864 856 865 r = amdgpu_job_alloc_with_ib(ring->adev, NULL, NULL, ··· 864 873 865 874 ib->length_dw = 0; 866 875 867 - if (sq) 876 + if (adev->vcn.using_unified_queue) 868 877 ib_checksum = amdgpu_vcn_unified_ring_ib_header(ib, 0x11, true); 869 878 870 879 ib->ptr[ib->length_dw++] = 0x00000018; ··· 886 895 for (i = ib->length_dw; i < ib_size_dw; ++i) 887 896 ib->ptr[i] = 0x0; 888 897 889 - if (sq) 898 + if (adev->vcn.using_unified_queue) 890 899 amdgpu_vcn_unified_ring_ib_checksum(&ib_checksum, 0x11); 891 900 892 901 r = amdgpu_job_submit_direct(job, ring, &f); ··· 909 918 struct dma_fence **fence) 910 919 { 911 920 unsigned int ib_size_dw = 16; 921 + struct amdgpu_device *adev = ring->adev; 912 922 struct amdgpu_job *job; 913 923 struct amdgpu_ib *ib; 914 924 struct dma_fence *f = NULL; 915 925 uint32_t *ib_checksum = NULL; 916 926 uint64_t addr; 917 - bool sq = amdgpu_vcn_using_unified_queue(ring); 918 927 int i, r; 919 928 920 - if (sq) 929 + if (adev->vcn.using_unified_queue) 921 930 ib_size_dw += 8; 922 931 923 932 r = amdgpu_job_alloc_with_ib(ring->adev, NULL, NULL, ··· 931 940 932 941 ib->length_dw = 0; 933 942 934 - if (sq) 943 + if (adev->vcn.using_unified_queue) 935 944 ib_checksum = amdgpu_vcn_unified_ring_ib_header(ib, 0x11, true); 936 945 937 946 ib->ptr[ib->length_dw++] = 0x00000018; ··· 953 962 for (i = ib->length_dw; i < ib_size_dw; ++i) 954 963 ib->ptr[i] = 0x0; 955 964 956 - if (sq) 965 + if (adev->vcn.using_unified_queue) 957 966 amdgpu_vcn_unified_ring_ib_checksum(&ib_checksum, 0x11); 958 967 959 968 r = amdgpu_job_submit_direct(job, ring, &f);
+1
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
··· 329 329 330 330 uint16_t inst_mask; 331 331 uint8_t num_inst_per_aid; 332 + bool using_unified_queue; 332 333 }; 333 334 334 335 struct amdgpu_fw_shared_rb_ptrs_struct {