Merge branch 'bnxt_en-updates-for-net-next'

+29 -3

drivers/net/ethernet/broadcom/bnxt/bnxt.c

··· 4479 4479 ring->fw_ring_id = INVALID_HW_RING_ID; 4480 4480 if ((bp->flags & BNXT_FLAG_AGG_RINGS)) { 4481 4481 type = ((u32)BNXT_RX_PAGE_SIZE << RX_BD_LEN_SHIFT) | 4482 - RX_BD_TYPE_RX_AGG_BD | RX_BD_FLAGS_SOP; 4482 + RX_BD_TYPE_RX_AGG_BD; 4483 + 4484 + /* On P7, setting EOP will cause the chip to disable 4485 + * Relaxed Ordering (RO) for TPA data. Disable EOP for 4486 + * potentially higher performance with RO. 4487 + */ 4488 + if (BNXT_CHIP_P5_AND_MINUS(bp) || !(bp->flags & BNXT_FLAG_TPA)) 4489 + type |= RX_BD_FLAGS_AGG_EOP; 4483 4490 4484 4491 bnxt_init_rxbd_pages(ring, type); 4485 4492 } ··· 5694 5687 for (i = 0; i < ARRAY_SIZE(bnxt_vf_req_snif); i++) { 5695 5688 u16 cmd = bnxt_vf_req_snif[i]; 5696 5689 unsigned int bit, idx; 5690 + 5691 + if ((bp->fw_cap & BNXT_FW_CAP_LINK_ADMIN) && 5692 + cmd == HWRM_PORT_PHY_QCFG) 5693 + continue; 5697 5694 5698 5695 idx = cmd / 32; 5699 5696 bit = cmd % 32; ··· 8517 8506 8518 8507 if (flags & FUNC_QCFG_RESP_FLAGS_ENABLE_RDMA_SRIOV) 8519 8508 bp->fw_cap |= BNXT_FW_CAP_ENABLE_RDMA_SRIOV; 8509 + if (resp->roce_bidi_opt_mode & 8510 + FUNC_QCFG_RESP_ROCE_BIDI_OPT_MODE_DEDICATED) 8511 + bp->cos0_cos1_shared = 1; 8512 + else 8513 + bp->cos0_cos1_shared = 0; 8520 8514 8521 8515 switch (resp->port_partition_type) { 8522 8516 case FUNC_QCFG_RESP_PORT_PARTITION_TYPE_NPAR1_0: ··· 9669 9653 bp->flags |= BNXT_FLAG_ROCEV1_CAP; 9670 9654 if (flags & FUNC_QCAPS_RESP_FLAGS_ROCE_V2_SUPPORTED) 9671 9655 bp->flags |= BNXT_FLAG_ROCEV2_CAP; 9656 + if (flags & FUNC_QCAPS_RESP_FLAGS_LINK_ADMIN_STATUS_SUPPORTED) 9657 + bp->fw_cap |= BNXT_FW_CAP_LINK_ADMIN; 9672 9658 if (flags & FUNC_QCAPS_RESP_FLAGS_PCIE_STATS_SUPPORTED) 9673 9659 bp->fw_cap |= BNXT_FW_CAP_PCIE_STATS_SUPPORTED; 9674 9660 if (flags & FUNC_QCAPS_RESP_FLAGS_HOT_RESET_CAPABLE) ··· 14038 14020 14039 14021 static void bnxt_dump_cp_sw_state(struct bnxt_napi *bnapi) 14040 14022 { 14041 - struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; 14042 - int i = bnapi->index; 14023 + struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring, *cpr2; 14024 + int i = bnapi->index, j; 14043 14025 14044 14026 netdev_info(bnapi->bp->dev, "[%d]: cp{fw_ring: %d raw_cons: %x}\n", 14045 14027 i, cpr->cp_ring_struct.fw_ring_id, cpr->cp_raw_cons); 14028 + for (j = 0; j < cpr->cp_ring_count; j++) { 14029 + cpr2 = &cpr->cp_ring_arr[j]; 14030 + if (!cpr2->bnapi) 14031 + continue; 14032 + netdev_info(bnapi->bp->dev, "[%d.%d]: cp{fw_ring: %d raw_cons: %x}\n", 14033 + i, j, cpr2->cp_ring_struct.fw_ring_id, 14034 + cpr2->cp_raw_cons); 14035 + } 14046 14036 } 14047 14037 14048 14038 static void bnxt_dbg_dump_states(struct bnxt *bp)

+3

drivers/net/ethernet/broadcom/bnxt/bnxt.h

··· 131 131 #define RX_BD_TYPE_48B_BD_SIZE (2 << 4) 132 132 #define RX_BD_TYPE_64B_BD_SIZE (3 << 4) 133 133 #define RX_BD_FLAGS_SOP (1 << 6) 134 + #define RX_BD_FLAGS_AGG_EOP (1 << 6) 134 135 #define RX_BD_FLAGS_EOP (1 << 7) 135 136 #define RX_BD_FLAGS_BUFFERS (3 << 8) 136 137 #define RX_BD_FLAGS_1_BUFFER_PACKET (0 << 8) ··· 2425 2424 u8 tc_to_qidx[BNXT_MAX_QUEUE]; 2426 2425 u8 q_ids[BNXT_MAX_QUEUE]; 2427 2426 u8 max_q; 2427 + u8 cos0_cos1_shared; 2428 2428 u8 num_tc; 2429 2429 2430 2430 u16 max_pfcwd_tmo_ms; ··· 2484 2482 #define BNXT_FW_CAP_ROCE_VF_RESC_MGMT_SUPPORTED BIT_ULL(6) 2485 2483 #define BNXT_FW_CAP_KONG_MB_CHNL BIT_ULL(7) 2486 2484 #define BNXT_FW_CAP_ROCE_VF_DYN_ALLOC_SUPPORT BIT_ULL(8) 2485 + #define BNXT_FW_CAP_LINK_ADMIN BIT_ULL(9) 2487 2486 #define BNXT_FW_CAP_OVS_64BIT_HANDLE BIT_ULL(10) 2488 2487 #define BNXT_FW_CAP_TRUSTED_VF BIT_ULL(11) 2489 2488 #define BNXT_FW_CAP_ERROR_RECOVERY BIT_ULL(13)

+15 -4

drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c

··· 688 688 buf[j] = *(rx_port_stats_ext + n); 689 689 } 690 690 for (i = 0; i < 8; i++, j++) { 691 - long n = bnxt_tx_bytes_pri_arr[i].base_off + 692 - bp->pri2cos_idx[i]; 691 + u8 cos_idx = bp->pri2cos_idx[i]; 692 + long n; 693 693 694 + n = bnxt_tx_bytes_pri_arr[i].base_off + cos_idx; 694 695 buf[j] = *(tx_port_stats_ext + n); 696 + if (bp->cos0_cos1_shared && !cos_idx) 697 + buf[j] += *(tx_port_stats_ext + n + 1); 695 698 } 696 699 for (i = 0; i < 8; i++, j++) { 697 - long n = bnxt_tx_pkts_pri_arr[i].base_off + 698 - bp->pri2cos_idx[i]; 700 + u8 cos_idx = bp->pri2cos_idx[i]; 701 + long n; 699 702 703 + n = bnxt_tx_pkts_pri_arr[i].base_off + cos_idx; 700 704 buf[j] = *(tx_port_stats_ext + n); 705 + if (bp->cos0_cos1_shared && !cos_idx) 706 + buf[j] += *(tx_port_stats_ext + n + 1); 701 707 } 702 708 } 703 709 } ··· 4623 4617 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG) 4624 4618 return 0; 4625 4619 4620 + if (bp->link_info.phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET || 4621 + bp->link_info.phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE){ 4622 + NL_SET_ERR_MSG_MOD(extack, "Operation not supported as PHY type is Base-T"); 4623 + return -EOPNOTSUPP; 4624 + } 4626 4625 switch (bp->link_info.module_status) { 4627 4626 case PORT_PHY_QCFG_RESP_MODULE_STATUS_PWRDOWN: 4628 4627 NL_SET_ERR_MSG_MOD(extack, "Transceiver module is powering down");

+50 -5

drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c

··· 332 332 return rc; 333 333 } 334 334 335 + static int bnxt_set_vf_link_admin_state(struct bnxt *bp, int vf_id) 336 + { 337 + struct hwrm_func_cfg_input *req; 338 + struct bnxt_vf_info *vf; 339 + int rc; 340 + 341 + if (!(bp->fw_cap & BNXT_FW_CAP_LINK_ADMIN)) 342 + return 0; 343 + 344 + vf = &bp->pf.vf[vf_id]; 345 + 346 + rc = bnxt_hwrm_func_cfg_short_req_init(bp, &req); 347 + if (rc) 348 + return rc; 349 + 350 + req->fid = cpu_to_le16(vf->fw_fid); 351 + switch (vf->flags & (BNXT_VF_LINK_FORCED | BNXT_VF_LINK_UP)) { 352 + case BNXT_VF_LINK_FORCED: 353 + req->options = 354 + FUNC_CFG_REQ_OPTIONS_LINK_ADMIN_STATE_FORCED_DOWN; 355 + break; 356 + case (BNXT_VF_LINK_FORCED | BNXT_VF_LINK_UP): 357 + req->options = FUNC_CFG_REQ_OPTIONS_LINK_ADMIN_STATE_FORCED_UP; 358 + break; 359 + default: 360 + req->options = FUNC_CFG_REQ_OPTIONS_LINK_ADMIN_STATE_AUTO; 361 + break; 362 + } 363 + req->enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_ADMIN_LINK_STATE); 364 + return hwrm_req_send(bp, req); 365 + } 366 + 335 367 int bnxt_set_vf_link_state(struct net_device *dev, int vf_id, int link) 336 368 { 337 369 struct bnxt *bp = netdev_priv(dev); ··· 389 357 break; 390 358 default: 391 359 netdev_err(bp->dev, "Invalid link option\n"); 392 - rc = -EINVAL; 393 - break; 360 + return -EINVAL; 394 361 } 395 - if (vf->flags & (BNXT_VF_LINK_UP | BNXT_VF_LINK_FORCED)) 362 + if (bp->fw_cap & BNXT_FW_CAP_LINK_ADMIN) 363 + rc = bnxt_set_vf_link_admin_state(bp, vf_id); 364 + else if (vf->flags & (BNXT_VF_LINK_UP | BNXT_VF_LINK_FORCED)) 396 365 rc = bnxt_hwrm_fwd_async_event_cmpl(bp, vf, 397 366 ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE); 398 367 return rc; ··· 699 666 700 667 hwrm_req_hold(bp, req); 701 668 for (i = 0; i < num_vfs; i++) { 669 + struct bnxt_vf_info *vf = &pf->vf[i]; 670 + 671 + vf->fw_fid = pf->first_vf_id + i; 672 + rc = bnxt_set_vf_link_admin_state(bp, i); 673 + if (rc) 674 + break; 675 + 702 676 if (reset) 703 677 __bnxt_set_vf_params(bp, i); 704 678 705 - req->vf_id = cpu_to_le16(pf->first_vf_id + i); 679 + req->vf_id = cpu_to_le16(vf->fw_fid); 706 680 rc = hwrm_req_send(bp, req); 707 681 if (rc) 708 682 break; 709 683 pf->active_vfs = i + 1; 710 - pf->vf[i].fw_fid = pf->first_vf_id + i; 711 684 } 712 685 713 686 if (pf->active_vfs) { ··· 779 740 FUNC_CFG_REQ_ENABLES_NUM_L2_CTXS | 780 741 FUNC_CFG_REQ_ENABLES_NUM_VNICS | 781 742 FUNC_CFG_REQ_ENABLES_NUM_HW_RING_GRPS); 743 + 744 + if (bp->fw_cap & BNXT_FW_CAP_LINK_ADMIN) { 745 + req->options = FUNC_CFG_REQ_OPTIONS_LINK_ADMIN_STATE_AUTO; 746 + req->enables |= 747 + cpu_to_le32(FUNC_CFG_REQ_ENABLES_ADMIN_LINK_STATE); 748 + } 782 749 783 750 mtu = bp->dev->mtu + VLAN_ETH_HLEN; 784 751 req->mru = cpu_to_le16(mtu);

+2 -5

drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c

··· 142 142 edev->ulp_tbl->msix_requested = bnxt_get_ulp_msix_num(bp); 143 143 144 144 bnxt_fill_msix_vecs(bp, bp->edev->msix_entries); 145 - edev->flags |= BNXT_EN_FLAG_MSIX_REQUESTED; 146 145 exit: 147 146 mutex_unlock(&edev->en_dev_lock); 148 147 netdev_unlock(dev); ··· 158 159 ulp = edev->ulp_tbl; 159 160 netdev_lock(dev); 160 161 mutex_lock(&edev->en_dev_lock); 161 - if (ulp->msix_requested) 162 - edev->flags &= ~BNXT_EN_FLAG_MSIX_REQUESTED; 163 162 edev->ulp_tbl->msix_requested = 0; 164 163 165 164 if (ulp->max_async_event_id) ··· 295 298 struct bnxt_ulp_ops *ops; 296 299 bool reset = false; 297 300 298 - if (!edev || !(edev->flags & BNXT_EN_FLAG_MSIX_REQUESTED)) 301 + if (!edev) 299 302 return; 300 303 301 304 if (bnxt_ulp_registered(bp->edev)) { ··· 318 321 struct bnxt_en_dev *edev = bp->edev; 319 322 struct bnxt_ulp_ops *ops; 320 323 321 - if (!edev || !(edev->flags & BNXT_EN_FLAG_MSIX_REQUESTED)) 324 + if (!edev) 322 325 return; 323 326 324 327 if (bnxt_ulp_registered(bp->edev)) {

-1

drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.h

··· 58 58 #define BNXT_EN_FLAG_ROCEV2_CAP 0x2 59 59 #define BNXT_EN_FLAG_ROCE_CAP (BNXT_EN_FLAG_ROCEV1_CAP | \ 60 60 BNXT_EN_FLAG_ROCEV2_CAP) 61 - #define BNXT_EN_FLAG_MSIX_REQUESTED 0x4 62 61 #define BNXT_EN_FLAG_ULP_STOPPED 0x8 63 62 #define BNXT_EN_FLAG_VF 0x10 64 63 #define BNXT_EN_VF(edev) ((edev)->flags & BNXT_EN_FLAG_VF)

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