gpu: nova-core: gsp: Add SetSystemInfo command

+1

drivers/gpu/nova-core/gsp.rs

··· 15 15 }; 16 16 17 17 pub(crate) mod cmdq; 18 + pub(crate) mod commands; 18 19 mod fw; 19 20 20 21 pub(crate) use fw::{

+8 -2

drivers/gpu/nova-core/gsp/boot.rs

··· 29 29 FIRMWARE_VERSION, // 30 30 }, 31 31 gpu::Chipset, 32 - gsp::GspFwWprMeta, 32 + gsp::{ 33 + commands, 34 + GspFwWprMeta, // 35 + }, 33 36 regs, 34 37 vbios::Vbios, 35 38 }; ··· 122 119 /// 123 120 /// Upon return, the GSP is up and running, and its runtime object given as return value. 124 121 pub(crate) fn boot( 125 - self: Pin<&mut Self>, 122 + mut self: Pin<&mut Self>, 126 123 pdev: &pci::Device<device::Bound>, 127 124 bar: &Bar0, 128 125 chipset: Chipset, ··· 155 152 let wpr_meta = 156 153 CoherentAllocation::<GspFwWprMeta>::alloc_coherent(dev, 1, GFP_KERNEL | __GFP_ZERO)?; 157 154 dma_write!(wpr_meta[0] = GspFwWprMeta::new(&gsp_fw, &fb_layout))?; 155 + 156 + self.cmdq 157 + .send_command(bar, commands::SetSystemInfo::new(pdev))?; 158 158 159 159 Ok(()) 160 160 }

-1

drivers/gpu/nova-core/gsp/cmdq.rs

··· 489 489 /// written to by its [`CommandToGsp::init_variable_payload`] method. 490 490 /// 491 491 /// Error codes returned by the command initializers are propagated as-is. 492 - #[expect(unused)] 493 492 pub(crate) fn send_command<M>(&mut self, bar: &Bar0, command: M) -> Result 494 493 where 495 494 M: CommandToGsp,

+37

drivers/gpu/nova-core/gsp/commands.rs

··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + 3 + use kernel::{ 4 + device, 5 + pci, 6 + prelude::*, // 7 + }; 8 + 9 + use crate::gsp::{ 10 + cmdq::CommandToGsp, 11 + fw::{ 12 + commands::GspSetSystemInfo, 13 + MsgFunction, // 14 + }, 15 + }; 16 + 17 + /// The `GspSetSystemInfo` command. 18 + pub(crate) struct SetSystemInfo<'a> { 19 + pdev: &'a pci::Device<device::Bound>, 20 + } 21 + 22 + impl<'a> SetSystemInfo<'a> { 23 + /// Creates a new `GspSetSystemInfo` command using the parameters of `pdev`. 24 + pub(crate) fn new(pdev: &'a pci::Device<device::Bound>) -> Self { 25 + Self { pdev } 26 + } 27 + } 28 + 29 + impl<'a> CommandToGsp for SetSystemInfo<'a> { 30 + const FUNCTION: MsgFunction = MsgFunction::GspSetSystemInfo; 31 + type Command = GspSetSystemInfo; 32 + type InitError = Error; 33 + 34 + fn init(&self) -> impl Init<Self::Command, Self::InitError> { 35 + GspSetSystemInfo::init(self.pdev) 36 + } 37 + }

+1

drivers/gpu/nova-core/gsp/fw.rs

··· 1 1 // SPDX-License-Identifier: GPL-2.0 2 2 3 + pub(crate) mod commands; 3 4 mod r570_144; 4 5 5 6 // Alias to avoid repeating the version number with every use.

+56

drivers/gpu/nova-core/gsp/fw/commands.rs

··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + 3 + use kernel::prelude::*; 4 + use kernel::transmute::{AsBytes, FromBytes}; 5 + use kernel::{device, pci}; 6 + 7 + use crate::gsp::GSP_PAGE_SIZE; 8 + 9 + use super::bindings; 10 + 11 + /// Payload of the `GspSetSystemInfo` command. 12 + #[repr(transparent)] 13 + pub(crate) struct GspSetSystemInfo { 14 + inner: bindings::GspSystemInfo, 15 + } 16 + static_assert!(size_of::<GspSetSystemInfo>() < GSP_PAGE_SIZE); 17 + 18 + impl GspSetSystemInfo { 19 + /// Returns an in-place initializer for the `GspSetSystemInfo` command. 20 + #[allow(non_snake_case)] 21 + pub(crate) fn init<'a>(dev: &'a pci::Device<device::Bound>) -> impl Init<Self, Error> + 'a { 22 + type InnerGspSystemInfo = bindings::GspSystemInfo; 23 + let init_inner = try_init!(InnerGspSystemInfo { 24 + gpuPhysAddr: dev.resource_start(0)?, 25 + gpuPhysFbAddr: dev.resource_start(1)?, 26 + gpuPhysInstAddr: dev.resource_start(3)?, 27 + nvDomainBusDeviceFunc: u64::from(dev.dev_id()), 28 + 29 + // Using TASK_SIZE in r535_gsp_rpc_set_system_info() seems wrong because 30 + // TASK_SIZE is per-task. That's probably a design issue in GSP-RM though. 31 + maxUserVa: (1 << 47) - 4096, 32 + pciConfigMirrorBase: 0x088000, 33 + pciConfigMirrorSize: 0x001000, 34 + 35 + PCIDeviceID: (u32::from(dev.device_id()) << 16) | u32::from(dev.vendor_id().as_raw()), 36 + PCISubDeviceID: (u32::from(dev.subsystem_device_id()) << 16) 37 + | u32::from(dev.subsystem_vendor_id()), 38 + PCIRevisionID: u32::from(dev.revision_id()), 39 + bIsPrimary: 0, 40 + bPreserveVideoMemoryAllocations: 0, 41 + ..Zeroable::init_zeroed() 42 + }); 43 + 44 + try_init!(GspSetSystemInfo { 45 + inner <- init_inner, 46 + }) 47 + } 48 + } 49 + 50 + // SAFETY: These structs don't meet the no-padding requirements of AsBytes but 51 + // that is not a problem because they are not used outside the kernel. 52 + unsafe impl AsBytes for GspSetSystemInfo {} 53 + 54 + // SAFETY: These structs don't meet the no-padding requirements of FromBytes but 55 + // that is not a problem because they are not used outside the kernel. 56 + unsafe impl FromBytes for GspSetSystemInfo {}

+132

drivers/gpu/nova-core/gsp/fw/r570_144/bindings.rs

··· 321 321 pub type _bindgen_ty_3 = ffi::c_uint; 322 322 #[repr(C)] 323 323 #[derive(Debug, Default, Copy, Clone, Zeroable)] 324 + pub struct DOD_METHOD_DATA { 325 + pub status: u32_, 326 + pub acpiIdListLen: u32_, 327 + pub acpiIdList: [u32_; 16usize], 328 + } 329 + #[repr(C)] 330 + #[derive(Debug, Default, Copy, Clone, Zeroable)] 331 + pub struct JT_METHOD_DATA { 332 + pub status: u32_, 333 + pub jtCaps: u32_, 334 + pub jtRevId: u16_, 335 + pub bSBIOSCaps: u8_, 336 + pub __bindgen_padding_0: u8, 337 + } 338 + #[repr(C)] 339 + #[derive(Debug, Default, Copy, Clone, Zeroable)] 340 + pub struct MUX_METHOD_DATA_ELEMENT { 341 + pub acpiId: u32_, 342 + pub mode: u32_, 343 + pub status: u32_, 344 + } 345 + #[repr(C)] 346 + #[derive(Debug, Default, Copy, Clone, Zeroable)] 347 + pub struct MUX_METHOD_DATA { 348 + pub tableLen: u32_, 349 + pub acpiIdMuxModeTable: [MUX_METHOD_DATA_ELEMENT; 16usize], 350 + pub acpiIdMuxPartTable: [MUX_METHOD_DATA_ELEMENT; 16usize], 351 + pub acpiIdMuxStateTable: [MUX_METHOD_DATA_ELEMENT; 16usize], 352 + } 353 + #[repr(C)] 354 + #[derive(Debug, Default, Copy, Clone, Zeroable)] 355 + pub struct CAPS_METHOD_DATA { 356 + pub status: u32_, 357 + pub optimusCaps: u32_, 358 + } 359 + #[repr(C)] 360 + #[derive(Debug, Default, Copy, Clone, Zeroable)] 361 + pub struct ACPI_METHOD_DATA { 362 + pub bValid: u8_, 363 + pub __bindgen_padding_0: [u8; 3usize], 364 + pub dodMethodData: DOD_METHOD_DATA, 365 + pub jtMethodData: JT_METHOD_DATA, 366 + pub muxMethodData: MUX_METHOD_DATA, 367 + pub capsMethodData: CAPS_METHOD_DATA, 368 + } 369 + #[repr(C)] 370 + #[derive(Debug, Default, Copy, Clone, Zeroable)] 371 + pub struct BUSINFO { 372 + pub deviceID: u16_, 373 + pub vendorID: u16_, 374 + pub subdeviceID: u16_, 375 + pub subvendorID: u16_, 376 + pub revisionID: u8_, 377 + pub __bindgen_padding_0: u8, 378 + } 379 + #[repr(C)] 380 + #[derive(Debug, Default, Copy, Clone, Zeroable)] 381 + pub struct GSP_VF_INFO { 382 + pub totalVFs: u32_, 383 + pub firstVFOffset: u32_, 384 + pub FirstVFBar0Address: u64_, 385 + pub FirstVFBar1Address: u64_, 386 + pub FirstVFBar2Address: u64_, 387 + pub b64bitBar0: u8_, 388 + pub b64bitBar1: u8_, 389 + pub b64bitBar2: u8_, 390 + pub __bindgen_padding_0: [u8; 5usize], 391 + } 392 + #[repr(C)] 393 + #[derive(Debug, Default, Copy, Clone, Zeroable)] 394 + pub struct GSP_PCIE_CONFIG_REG { 395 + pub linkCap: u32_, 396 + } 397 + #[repr(C)] 398 + #[derive(Debug, Default, Copy, Clone, Zeroable)] 399 + pub struct GspSystemInfo { 400 + pub gpuPhysAddr: u64_, 401 + pub gpuPhysFbAddr: u64_, 402 + pub gpuPhysInstAddr: u64_, 403 + pub gpuPhysIoAddr: u64_, 404 + pub nvDomainBusDeviceFunc: u64_, 405 + pub simAccessBufPhysAddr: u64_, 406 + pub notifyOpSharedSurfacePhysAddr: u64_, 407 + pub pcieAtomicsOpMask: u64_, 408 + pub consoleMemSize: u64_, 409 + pub maxUserVa: u64_, 410 + pub pciConfigMirrorBase: u32_, 411 + pub pciConfigMirrorSize: u32_, 412 + pub PCIDeviceID: u32_, 413 + pub PCISubDeviceID: u32_, 414 + pub PCIRevisionID: u32_, 415 + pub pcieAtomicsCplDeviceCapMask: u32_, 416 + pub oorArch: u8_, 417 + pub __bindgen_padding_0: [u8; 7usize], 418 + pub clPdbProperties: u64_, 419 + pub Chipset: u32_, 420 + pub bGpuBehindBridge: u8_, 421 + pub bFlrSupported: u8_, 422 + pub b64bBar0Supported: u8_, 423 + pub bMnocAvailable: u8_, 424 + pub chipsetL1ssEnable: u32_, 425 + pub bUpstreamL0sUnsupported: u8_, 426 + pub bUpstreamL1Unsupported: u8_, 427 + pub bUpstreamL1PorSupported: u8_, 428 + pub bUpstreamL1PorMobileOnly: u8_, 429 + pub bSystemHasMux: u8_, 430 + pub upstreamAddressValid: u8_, 431 + pub FHBBusInfo: BUSINFO, 432 + pub chipsetIDInfo: BUSINFO, 433 + pub __bindgen_padding_1: [u8; 2usize], 434 + pub acpiMethodData: ACPI_METHOD_DATA, 435 + pub hypervisorType: u32_, 436 + pub bIsPassthru: u8_, 437 + pub __bindgen_padding_2: [u8; 7usize], 438 + pub sysTimerOffsetNs: u64_, 439 + pub gspVFInfo: GSP_VF_INFO, 440 + pub bIsPrimary: u8_, 441 + pub isGridBuild: u8_, 442 + pub __bindgen_padding_3: [u8; 2usize], 443 + pub pcieConfigReg: GSP_PCIE_CONFIG_REG, 444 + pub gridBuildCsp: u32_, 445 + pub bPreserveVideoMemoryAllocations: u8_, 446 + pub bTdrEventSupported: u8_, 447 + pub bFeatureStretchVblankCapable: u8_, 448 + pub bEnableDynamicGranularityPageArrays: u8_, 449 + pub bClockBoostSupported: u8_, 450 + pub bRouteDispIntrsToCPU: u8_, 451 + pub __bindgen_padding_4: [u8; 6usize], 452 + pub hostPageSize: u64_, 453 + } 454 + #[repr(C)] 455 + #[derive(Debug, Default, Copy, Clone, Zeroable)] 324 456 pub struct MESSAGE_QUEUE_INIT_ARGUMENTS { 325 457 pub sharedMemPhysAddr: u64_, 326 458 pub pageTableEntryCount: u32_,

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