Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'powerpc-4.16-3' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc fixes from Michael Ellerman:
"The main attraction is a fix for a bug in the new drmem code, which
was causing an oops on boot on some versions of Qemu.
There's also a fix for XIVE (Power9 interrupt controller) on KVM, as
well as a few other minor fixes.
Thanks to: Corentin Labbe, Cyril Bur, Cédric Le Goater, Daniel Black,
Nathan Fontenot, Nicholas Piggin"
* tag 'powerpc-4.16-3' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
powerpc/pseries: Check for zero filled ibm,dynamic-memory property
powerpc/pseries: Add empty update_numa_cpu_lookup_table() for NUMA=n
powerpc/powernv: IMC fix out of bounds memory access at shutdown
powerpc/xive: Use hw CPU ids when configuring the CPU queues
powerpc: Expose TSCR via sysfs only on powernv
+29
-10
+3
arch/powerpc/include/asm/topology.h
+3
arch/powerpc/include/asm/topology.h
+4
-2
arch/powerpc/kernel/sysfs.c
+4
-2
arch/powerpc/kernel/sysfs.c
···
788
788
if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
789
789
device_create_file(s, &dev_attr_pir);
790
790
791
-
if (cpu_has_feature(CPU_FTR_ARCH_206))
791
+
if (cpu_has_feature(CPU_FTR_ARCH_206) &&
792
+
!firmware_has_feature(FW_FEATURE_LPAR))
792
793
device_create_file(s, &dev_attr_tscr);
793
794
#endif /* CONFIG_PPC64 */
794
795
···
874
873
if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
875
874
device_remove_file(s, &dev_attr_pir);
876
875
877
-
if (cpu_has_feature(CPU_FTR_ARCH_206))
876
+
if (cpu_has_feature(CPU_FTR_ARCH_206) &&
877
+
!firmware_has_feature(FW_FEATURE_LPAR))
878
878
device_remove_file(s, &dev_attr_tscr);
879
879
#endif /* CONFIG_PPC64 */
880
880
+8
arch/powerpc/mm/drmem.c
+8
arch/powerpc/mm/drmem.c
···
216
216
u32 i, n_lmbs;
217
217
218
218
n_lmbs = of_read_number(prop++, 1);
219
+
if (n_lmbs == 0)
220
+
return;
219
221
220
222
for (i = 0; i < n_lmbs; i++) {
221
223
read_drconf_v1_cell(&lmb, &prop);
···
247
245
u32 i, j, lmb_sets;
248
246
249
247
lmb_sets = of_read_number(prop++, 1);
248
+
if (lmb_sets == 0)
249
+
return;
250
250
251
251
for (i = 0; i < lmb_sets; i++) {
252
252
read_drconf_v2_cell(&dr_cell, &prop);
···
358
354
struct drmem_lmb *lmb;
359
355
360
356
drmem_info->n_lmbs = of_read_number(prop++, 1);
357
+
if (drmem_info->n_lmbs == 0)
358
+
return;
361
359
362
360
drmem_info->lmbs = kcalloc(drmem_info->n_lmbs, sizeof(*lmb),
363
361
GFP_KERNEL);
···
379
373
int lmb_index;
380
374
381
375
lmb_sets = of_read_number(prop++, 1);
376
+
if (lmb_sets == 0)
377
+
return;
382
378
383
379
/* first pass, calculate the number of LMBs */
384
380
p = prop;
+4
-2
arch/powerpc/platforms/powernv/opal-imc.c
+4
-2
arch/powerpc/platforms/powernv/opal-imc.c
···
199
199
const struct cpumask *l_cpumask;
200
200
201
201
get_online_cpus();
202
-
for_each_online_node(nid) {
202
+
for_each_node_with_cpus(nid) {
203
203
l_cpumask = cpumask_of_node(nid);
204
-
cpu = cpumask_first(l_cpumask);
204
+
cpu = cpumask_first_and(l_cpumask, cpu_online_mask);
205
+
if (cpu >= nr_cpu_ids)
206
+
continue;
205
207
opal_imc_counters_stop(OPAL_IMC_COUNTERS_NEST,
206
208
get_hard_smp_processor_id(cpu));
207
209
}
+10
-6
arch/powerpc/sysdev/xive/spapr.c
+10
-6
arch/powerpc/sysdev/xive/spapr.c
···
356
356
357
357
rc = plpar_int_get_queue_info(0, target, prio, &esn_page, &esn_size);
358
358
if (rc) {
359
-
pr_err("Error %lld getting queue info prio %d\n", rc, prio);
359
+
pr_err("Error %lld getting queue info CPU %d prio %d\n", rc,
360
+
target, prio);
360
361
rc = -EIO;
361
362
goto fail;
362
363
}
···
371
370
/* Configure and enable the queue in HW */
372
371
rc = plpar_int_set_queue_config(flags, target, prio, qpage_phys, order);
373
372
if (rc) {
374
-
pr_err("Error %lld setting queue for prio %d\n", rc, prio);
373
+
pr_err("Error %lld setting queue for CPU %d prio %d\n", rc,
374
+
target, prio);
375
375
rc = -EIO;
376
376
} else {
377
377
q->qpage = qpage;
···
391
389
if (IS_ERR(qpage))
392
390
return PTR_ERR(qpage);
393
391
394
-
return xive_spapr_configure_queue(cpu, q, prio, qpage,
395
-
xive_queue_shift);
392
+
return xive_spapr_configure_queue(get_hard_smp_processor_id(cpu),
393
+
q, prio, qpage, xive_queue_shift);
396
394
}
397
395
398
396
static void xive_spapr_cleanup_queue(unsigned int cpu, struct xive_cpu *xc,
···
401
399
struct xive_q *q = &xc->queue[prio];
402
400
unsigned int alloc_order;
403
401
long rc;
402
+
int hw_cpu = get_hard_smp_processor_id(cpu);
404
403
405
-
rc = plpar_int_set_queue_config(0, cpu, prio, 0, 0);
404
+
rc = plpar_int_set_queue_config(0, hw_cpu, prio, 0, 0);
406
405
if (rc)
407
-
pr_err("Error %ld setting queue for prio %d\n", rc, prio);
406
+
pr_err("Error %ld setting queue for CPU %d prio %d\n", rc,
407
+
hw_cpu, prio);
408
408
409
409
alloc_order = xive_alloc_order(xive_queue_shift);
410
410
free_pages((unsigned long)q->qpage, alloc_order);