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drm/amd/display: Force flush after write to IPS driver signals

[Why]
It's possible that the write hasn't fully completed by the time we
send (and flush) a command to DMCUB to notify idle to request IPS2
exit.

[How]
Perform a readback of the volatile structure into dc_dmub_srv state.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Nicholas Kazlauskas and committed by
Alex Deucher
ef4af63e dc2be9c6

+3
+2
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
··· 1296 1296 } 1297 1297 1298 1298 ips_driver->signals = new_signals; 1299 + dc_dmub_srv->driver_signals = ips_driver->signals; 1299 1300 } 1300 1301 1301 1302 DC_LOG_IPS( ··· 1340 1339 ips2_exit_count = ips_fw->ips2_exit_count; 1341 1340 1342 1341 ips_driver->signals.all = 0; 1342 + dc_dmub_srv->driver_signals = ips_driver->signals; 1343 1343 1344 1344 DC_LOG_IPS( 1345 1345 "%s (allow ips1=%d ips2=%d) (commit ips1=%d ips2=%d) (count rcg=%d ips1=%d ips2=%d)",
+1
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h
··· 53 53 void *dm; 54 54 55 55 int32_t idle_exit_counter; 56 + union dmub_shared_state_ips_driver_signals driver_signals; 56 57 bool idle_allowed; 57 58 bool needs_idle_wake; 58 59 };