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Merge tag 'mtd/fixes-for-4.20-rc4' of git://git.infradead.org/linux-mtd

Pull mtd fixes from Boris Brezillon:
"SPI NOR fixes:

- Various fixes related to the SFDP parsing code merged in 4.20

- Fix for a page fault in the cadence-qspi

NAND fixes:

- Fix a macro name conflict between the QCOM NAND controller driver
and the RISC-V asm headers

- Fix of-node handling in the atmel driver"

* tag 'mtd/fixes-for-4.20-rc4' of git://git.infradead.org/linux-mtd:
mtd: spi-nor: fix selection of uniform erase type in flexible conf
mtd: spi-nor: Fix Cadence QSPI page fault kernel panic
mtd: rawnand: qcom: Namespace prefix some commands
mtd: rawnand: atmel: fix OF child-node lookup
mtd: spi_nor: pass DMA-able buffer to spi_nor_read_raw()
mtd: spi-nor: don't overwrite errno in spi_nor_get_map_in_use()
mtd: spi-nor: fix iteration over smpt array
mtd: spi-nor: don't drop sfdp data if optional parsers fail

+137 -55
+7 -4
drivers/mtd/nand/raw/atmel/nand-controller.c
··· 2032 2032 int ret; 2033 2033 2034 2034 nand_np = dev->of_node; 2035 - nfc_np = of_find_compatible_node(dev->of_node, NULL, 2036 - "atmel,sama5d3-nfc"); 2035 + nfc_np = of_get_compatible_child(dev->of_node, "atmel,sama5d3-nfc"); 2037 2036 if (!nfc_np) { 2038 2037 dev_err(dev, "Could not find device node for sama5d3-nfc\n"); 2039 2038 return -ENODEV; ··· 2446 2447 } 2447 2448 2448 2449 if (caps->legacy_of_bindings) { 2450 + struct device_node *nfc_node; 2449 2451 u32 ale_offs = 21; 2450 2452 2451 2453 /* 2452 2454 * If we are parsing legacy DT props and the DT contains a 2453 2455 * valid NFC node, forward the request to the sama5 logic. 2454 2456 */ 2455 - if (of_find_compatible_node(pdev->dev.of_node, NULL, 2456 - "atmel,sama5d3-nfc")) 2457 + nfc_node = of_get_compatible_child(pdev->dev.of_node, 2458 + "atmel,sama5d3-nfc"); 2459 + if (nfc_node) { 2457 2460 caps = &atmel_sama5_nand_caps; 2461 + of_node_put(nfc_node); 2462 + } 2458 2463 2459 2464 /* 2460 2465 * Even if the compatible says we are dealing with an
+16 -16
drivers/mtd/nand/raw/qcom_nandc.c
··· 150 150 #define NAND_VERSION_MINOR_SHIFT 16 151 151 152 152 /* NAND OP_CMDs */ 153 - #define PAGE_READ 0x2 154 - #define PAGE_READ_WITH_ECC 0x3 155 - #define PAGE_READ_WITH_ECC_SPARE 0x4 156 - #define PROGRAM_PAGE 0x6 157 - #define PAGE_PROGRAM_WITH_ECC 0x7 158 - #define PROGRAM_PAGE_SPARE 0x9 159 - #define BLOCK_ERASE 0xa 160 - #define FETCH_ID 0xb 161 - #define RESET_DEVICE 0xd 153 + #define OP_PAGE_READ 0x2 154 + #define OP_PAGE_READ_WITH_ECC 0x3 155 + #define OP_PAGE_READ_WITH_ECC_SPARE 0x4 156 + #define OP_PROGRAM_PAGE 0x6 157 + #define OP_PAGE_PROGRAM_WITH_ECC 0x7 158 + #define OP_PROGRAM_PAGE_SPARE 0x9 159 + #define OP_BLOCK_ERASE 0xa 160 + #define OP_FETCH_ID 0xb 161 + #define OP_RESET_DEVICE 0xd 162 162 163 163 /* Default Value for NAND_DEV_CMD_VLD */ 164 164 #define NAND_DEV_CMD_VLD_VAL (READ_START_VLD | WRITE_START_VLD | \ ··· 692 692 693 693 if (read) { 694 694 if (host->use_ecc) 695 - cmd = PAGE_READ_WITH_ECC | PAGE_ACC | LAST_PAGE; 695 + cmd = OP_PAGE_READ_WITH_ECC | PAGE_ACC | LAST_PAGE; 696 696 else 697 - cmd = PAGE_READ | PAGE_ACC | LAST_PAGE; 697 + cmd = OP_PAGE_READ | PAGE_ACC | LAST_PAGE; 698 698 } else { 699 - cmd = PROGRAM_PAGE | PAGE_ACC | LAST_PAGE; 699 + cmd = OP_PROGRAM_PAGE | PAGE_ACC | LAST_PAGE; 700 700 } 701 701 702 702 if (host->use_ecc) { ··· 1170 1170 * in use. we configure the controller to perform a raw read of 512 1171 1171 * bytes to read onfi params 1172 1172 */ 1173 - nandc_set_reg(nandc, NAND_FLASH_CMD, PAGE_READ | PAGE_ACC | LAST_PAGE); 1173 + nandc_set_reg(nandc, NAND_FLASH_CMD, OP_PAGE_READ | PAGE_ACC | LAST_PAGE); 1174 1174 nandc_set_reg(nandc, NAND_ADDR0, 0); 1175 1175 nandc_set_reg(nandc, NAND_ADDR1, 0); 1176 1176 nandc_set_reg(nandc, NAND_DEV0_CFG0, 0 << CW_PER_PAGE ··· 1224 1224 struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip); 1225 1225 1226 1226 nandc_set_reg(nandc, NAND_FLASH_CMD, 1227 - BLOCK_ERASE | PAGE_ACC | LAST_PAGE); 1227 + OP_BLOCK_ERASE | PAGE_ACC | LAST_PAGE); 1228 1228 nandc_set_reg(nandc, NAND_ADDR0, page_addr); 1229 1229 nandc_set_reg(nandc, NAND_ADDR1, 0); 1230 1230 nandc_set_reg(nandc, NAND_DEV0_CFG0, ··· 1255 1255 if (column == -1) 1256 1256 return 0; 1257 1257 1258 - nandc_set_reg(nandc, NAND_FLASH_CMD, FETCH_ID); 1258 + nandc_set_reg(nandc, NAND_FLASH_CMD, OP_FETCH_ID); 1259 1259 nandc_set_reg(nandc, NAND_ADDR0, column); 1260 1260 nandc_set_reg(nandc, NAND_ADDR1, 0); 1261 1261 nandc_set_reg(nandc, NAND_FLASH_CHIP_SELECT, ··· 1276 1276 struct nand_chip *chip = &host->chip; 1277 1277 struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip); 1278 1278 1279 - nandc_set_reg(nandc, NAND_FLASH_CMD, RESET_DEVICE); 1279 + nandc_set_reg(nandc, NAND_FLASH_CMD, OP_RESET_DEVICE); 1280 1280 nandc_set_reg(nandc, NAND_EXEC_CMD, 1); 1281 1281 1282 1282 write_reg_dma(nandc, NAND_FLASH_CMD, 1, NAND_BAM_NEXT_SGL);
+16 -3
drivers/mtd/spi-nor/cadence-quadspi.c
··· 644 644 ndelay(cqspi->wr_delay); 645 645 646 646 while (remaining > 0) { 647 + size_t write_words, mod_bytes; 648 + 647 649 write_bytes = remaining > page_size ? page_size : remaining; 648 - iowrite32_rep(cqspi->ahb_base, txbuf, 649 - DIV_ROUND_UP(write_bytes, 4)); 650 + write_words = write_bytes / 4; 651 + mod_bytes = write_bytes % 4; 652 + /* Write 4 bytes at a time then single bytes. */ 653 + if (write_words) { 654 + iowrite32_rep(cqspi->ahb_base, txbuf, write_words); 655 + txbuf += (write_words * 4); 656 + } 657 + if (mod_bytes) { 658 + unsigned int temp = 0xFFFFFFFF; 659 + 660 + memcpy(&temp, txbuf, mod_bytes); 661 + iowrite32(temp, cqspi->ahb_base); 662 + txbuf += mod_bytes; 663 + } 650 664 651 665 if (!wait_for_completion_timeout(&cqspi->transfer_complete, 652 666 msecs_to_jiffies(CQSPI_TIMEOUT_MS))) { ··· 669 655 goto failwr; 670 656 } 671 657 672 - txbuf += write_bytes; 673 658 remaining -= write_bytes; 674 659 675 660 if (remaining > 0)
+98 -32
drivers/mtd/spi-nor/spi-nor.c
··· 2156 2156 * @nor: pointer to a 'struct spi_nor' 2157 2157 * @addr: offset in the serial flash memory 2158 2158 * @len: number of bytes to read 2159 - * @buf: buffer where the data is copied into 2159 + * @buf: buffer where the data is copied into (dma-safe memory) 2160 2160 * 2161 2161 * Return: 0 on success, -errno otherwise. 2162 2162 */ ··· 2522 2522 } 2523 2523 2524 2524 /** 2525 + * spi_nor_sort_erase_mask() - sort erase mask 2526 + * @map: the erase map of the SPI NOR 2527 + * @erase_mask: the erase type mask to be sorted 2528 + * 2529 + * Replicate the sort done for the map's erase types in BFPT: sort the erase 2530 + * mask in ascending order with the smallest erase type size starting from 2531 + * BIT(0) in the sorted erase mask. 2532 + * 2533 + * Return: sorted erase mask. 2534 + */ 2535 + static u8 spi_nor_sort_erase_mask(struct spi_nor_erase_map *map, u8 erase_mask) 2536 + { 2537 + struct spi_nor_erase_type *erase_type = map->erase_type; 2538 + int i; 2539 + u8 sorted_erase_mask = 0; 2540 + 2541 + if (!erase_mask) 2542 + return 0; 2543 + 2544 + /* Replicate the sort done for the map's erase types. */ 2545 + for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) 2546 + if (erase_type[i].size && erase_mask & BIT(erase_type[i].idx)) 2547 + sorted_erase_mask |= BIT(i); 2548 + 2549 + return sorted_erase_mask; 2550 + } 2551 + 2552 + /** 2525 2553 * spi_nor_regions_sort_erase_types() - sort erase types in each region 2526 2554 * @map: the erase map of the SPI NOR 2527 2555 * ··· 2564 2536 static void spi_nor_regions_sort_erase_types(struct spi_nor_erase_map *map) 2565 2537 { 2566 2538 struct spi_nor_erase_region *region = map->regions; 2567 - struct spi_nor_erase_type *erase_type = map->erase_type; 2568 - int i; 2569 2539 u8 region_erase_mask, sorted_erase_mask; 2570 2540 2571 2541 while (region) { 2572 2542 region_erase_mask = region->offset & SNOR_ERASE_TYPE_MASK; 2573 2543 2574 - /* Replicate the sort done for the map's erase types. */ 2575 - sorted_erase_mask = 0; 2576 - for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) 2577 - if (erase_type[i].size && 2578 - region_erase_mask & BIT(erase_type[i].idx)) 2579 - sorted_erase_mask |= BIT(i); 2544 + sorted_erase_mask = spi_nor_sort_erase_mask(map, 2545 + region_erase_mask); 2580 2546 2581 2547 /* Overwrite erase mask. */ 2582 2548 region->offset = (region->offset & ~SNOR_ERASE_TYPE_MASK) | ··· 2877 2855 * spi_nor_get_map_in_use() - get the configuration map in use 2878 2856 * @nor: pointer to a 'struct spi_nor' 2879 2857 * @smpt: pointer to the sector map parameter table 2858 + * @smpt_len: sector map parameter table length 2859 + * 2860 + * Return: pointer to the map in use, ERR_PTR(-errno) otherwise. 2880 2861 */ 2881 - static const u32 *spi_nor_get_map_in_use(struct spi_nor *nor, const u32 *smpt) 2862 + static const u32 *spi_nor_get_map_in_use(struct spi_nor *nor, const u32 *smpt, 2863 + u8 smpt_len) 2882 2864 { 2883 - const u32 *ret = NULL; 2884 - u32 i, addr; 2865 + const u32 *ret; 2866 + u8 *buf; 2867 + u32 addr; 2885 2868 int err; 2869 + u8 i; 2886 2870 u8 addr_width, read_opcode, read_dummy; 2887 - u8 read_data_mask, data_byte, map_id; 2871 + u8 read_data_mask, map_id; 2872 + 2873 + /* Use a kmalloc'ed bounce buffer to guarantee it is DMA-able. */ 2874 + buf = kmalloc(sizeof(*buf), GFP_KERNEL); 2875 + if (!buf) 2876 + return ERR_PTR(-ENOMEM); 2888 2877 2889 2878 addr_width = nor->addr_width; 2890 2879 read_dummy = nor->read_dummy; 2891 2880 read_opcode = nor->read_opcode; 2892 2881 2893 2882 map_id = 0; 2894 - i = 0; 2895 2883 /* Determine if there are any optional Detection Command Descriptors */ 2896 - while (!(smpt[i] & SMPT_DESC_TYPE_MAP)) { 2884 + for (i = 0; i < smpt_len; i += 2) { 2885 + if (smpt[i] & SMPT_DESC_TYPE_MAP) 2886 + break; 2887 + 2897 2888 read_data_mask = SMPT_CMD_READ_DATA(smpt[i]); 2898 2889 nor->addr_width = spi_nor_smpt_addr_width(nor, smpt[i]); 2899 2890 nor->read_dummy = spi_nor_smpt_read_dummy(nor, smpt[i]); 2900 2891 nor->read_opcode = SMPT_CMD_OPCODE(smpt[i]); 2901 2892 addr = smpt[i + 1]; 2902 2893 2903 - err = spi_nor_read_raw(nor, addr, 1, &data_byte); 2904 - if (err) 2894 + err = spi_nor_read_raw(nor, addr, 1, buf); 2895 + if (err) { 2896 + ret = ERR_PTR(err); 2905 2897 goto out; 2898 + } 2906 2899 2907 2900 /* 2908 2901 * Build an index value that is used to select the Sector Map 2909 2902 * Configuration that is currently in use. 2910 2903 */ 2911 - map_id = map_id << 1 | !!(data_byte & read_data_mask); 2912 - i = i + 2; 2904 + map_id = map_id << 1 | !!(*buf & read_data_mask); 2913 2905 } 2914 2906 2915 - /* Find the matching configuration map */ 2916 - while (SMPT_MAP_ID(smpt[i]) != map_id) { 2907 + /* 2908 + * If command descriptors are provided, they always precede map 2909 + * descriptors in the table. There is no need to start the iteration 2910 + * over smpt array all over again. 2911 + * 2912 + * Find the matching configuration map. 2913 + */ 2914 + ret = ERR_PTR(-EINVAL); 2915 + while (i < smpt_len) { 2916 + if (SMPT_MAP_ID(smpt[i]) == map_id) { 2917 + ret = smpt + i; 2918 + break; 2919 + } 2920 + 2921 + /* 2922 + * If there are no more configuration map descriptors and no 2923 + * configuration ID matched the configuration identifier, the 2924 + * sector address map is unknown. 2925 + */ 2917 2926 if (smpt[i] & SMPT_DESC_END) 2918 - goto out; 2927 + break; 2928 + 2919 2929 /* increment the table index to the next map */ 2920 2930 i += SMPT_MAP_REGION_COUNT(smpt[i]) + 1; 2921 2931 } 2922 2932 2923 - ret = smpt + i; 2924 2933 /* fall through */ 2925 2934 out: 2935 + kfree(buf); 2926 2936 nor->addr_width = addr_width; 2927 2937 nor->read_dummy = read_dummy; 2928 2938 nor->read_opcode = read_opcode; ··· 3000 2946 u64 offset; 3001 2947 u32 region_count; 3002 2948 int i, j; 3003 - u8 erase_type; 2949 + u8 erase_type, uniform_erase_type; 3004 2950 3005 2951 region_count = SMPT_MAP_REGION_COUNT(*smpt); 3006 2952 /* ··· 3013 2959 return -ENOMEM; 3014 2960 map->regions = region; 3015 2961 3016 - map->uniform_erase_type = 0xff; 2962 + uniform_erase_type = 0xff; 3017 2963 offset = 0; 3018 2964 /* Populate regions. */ 3019 2965 for (i = 0; i < region_count; i++) { ··· 3028 2974 * Save the erase types that are supported in all regions and 3029 2975 * can erase the entire flash memory. 3030 2976 */ 3031 - map->uniform_erase_type &= erase_type; 2977 + uniform_erase_type &= erase_type; 3032 2978 3033 2979 offset = (region[i].offset & ~SNOR_ERASE_FLAGS_MASK) + 3034 2980 region[i].size; 3035 2981 } 2982 + 2983 + map->uniform_erase_type = spi_nor_sort_erase_mask(map, 2984 + uniform_erase_type); 3036 2985 3037 2986 spi_nor_region_mark_end(&region[i - 1]); 3038 2987 ··· 3077 3020 for (i = 0; i < smpt_header->length; i++) 3078 3021 smpt[i] = le32_to_cpu(smpt[i]); 3079 3022 3080 - sector_map = spi_nor_get_map_in_use(nor, smpt); 3081 - if (!sector_map) { 3082 - ret = -EINVAL; 3023 + sector_map = spi_nor_get_map_in_use(nor, smpt, smpt_header->length); 3024 + if (IS_ERR(sector_map)) { 3025 + ret = PTR_ERR(sector_map); 3083 3026 goto out; 3084 3027 } 3085 3028 ··· 3182 3125 if (err) 3183 3126 goto exit; 3184 3127 3185 - /* Parse other parameter headers. */ 3128 + /* Parse optional parameter tables. */ 3186 3129 for (i = 0; i < header.nph; i++) { 3187 3130 param_header = &param_headers[i]; 3188 3131 ··· 3195 3138 break; 3196 3139 } 3197 3140 3198 - if (err) 3199 - goto exit; 3141 + if (err) { 3142 + dev_warn(dev, "Failed to parse optional parameter table: %04x\n", 3143 + SFDP_PARAM_HEADER_ID(param_header)); 3144 + /* 3145 + * Let's not drop all information we extracted so far 3146 + * if optional table parsers fail. In case of failing, 3147 + * each optional parser is responsible to roll back to 3148 + * the previously known spi_nor data. 3149 + */ 3150 + err = 0; 3151 + } 3200 3152 } 3201 3153 3202 3154 exit: