tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6:
ALSA: hda - targa and targa-2ch fix
ALSA: hda - fix beep tone calculation for IDT/STAC codecs
ALSA: hda - Missing volume controls for Intel HDA (ALC269/EeePC)
ALSA: hda - Disable AMD SB600 64bit address support only
ALSA: hda - Check widget types while parsing capture source in patch_via.c
ALSA: hda - Fix capture source selection in patch_via.c
ALSA: hda - Add missing EAPD initialization for VIA codecs
ALSA: hda - Clean up VT170x dig-in initialization code
ALSA: hda - Fix error path in the sanity check in azx_pcm_open()
ALSA: hda - move 8086:fb30 quirk (stac9205) to the proper section
ASoC: Fix wm8753 register cache size and initialization
ASoC: add locking to mpc5200-psc-ac97 driver
ASoC: Fix mpc5200-psc-ac97 to ensure the data ready bit is cleared
ASoC: Fix register cache initialisation for WM8753

Linus Torvalds f00caa76 8711c67b

+112 -65
+7 -4
sound/pci/hda/hda_beep.c
··· 50 50 * The tone frequency of beep generator on IDT/STAC codecs is 51 51 * defined from the 8bit tone parameter, in Hz, 52 52 * freq = 48000 * (257 - tone) / 1024 53 - * that is from 12kHz to 93.75kHz in step of 46.875 hz 53 + * that is from 12kHz to 93.75Hz in steps of 46.875 Hz 54 54 */ 55 55 static int beep_linear_tone(struct hda_beep *beep, int hz) 56 56 { 57 + if (hz <= 0) 58 + return 0; 57 59 hz *= 1000; /* fixed point */ 58 - hz = hz - DIGBEEP_HZ_MIN; 60 + hz = hz - DIGBEEP_HZ_MIN 61 + + DIGBEEP_HZ_STEP / 2; /* round to nearest step */ 59 62 if (hz < 0) 60 63 hz = 0; /* turn off PC beep*/ 61 64 else if (hz >= (DIGBEEP_HZ_MAX - DIGBEEP_HZ_MIN)) 62 - hz = 0xff; 65 + hz = 1; /* max frequency */ 63 66 else { 64 67 hz /= DIGBEEP_HZ_STEP; 65 - hz++; 68 + hz = 255 - hz; 66 69 } 67 70 return hz; 68 71 }
+24 -10
sound/pci/hda/hda_intel.c
··· 1455 1455 return err; 1456 1456 } 1457 1457 snd_pcm_limit_hw_rates(runtime); 1458 + /* sanity check */ 1459 + if (snd_BUG_ON(!runtime->hw.channels_min) || 1460 + snd_BUG_ON(!runtime->hw.channels_max) || 1461 + snd_BUG_ON(!runtime->hw.formats) || 1462 + snd_BUG_ON(!runtime->hw.rates)) { 1463 + azx_release_device(azx_dev); 1464 + hinfo->ops.close(hinfo, apcm->codec, substream); 1465 + snd_hda_power_down(apcm->codec); 1466 + mutex_unlock(&chip->open_mutex); 1467 + return -EINVAL; 1468 + } 1458 1469 spin_lock_irqsave(&chip->reg_lock, flags); 1459 1470 azx_dev->substream = substream; 1460 1471 azx_dev->running = 0; ··· 1474 1463 runtime->private_data = azx_dev; 1475 1464 snd_pcm_set_sync(substream); 1476 1465 mutex_unlock(&chip->open_mutex); 1477 - 1478 - if (snd_BUG_ON(!runtime->hw.channels_min || !runtime->hw.channels_max)) 1479 - return -EINVAL; 1480 - if (snd_BUG_ON(!runtime->hw.formats)) 1481 - return -EINVAL; 1482 - if (snd_BUG_ON(!runtime->hw.rates)) 1483 - return -EINVAL; 1484 1466 return 0; 1485 1467 } 1486 1468 ··· 2333 2329 gcap = azx_readw(chip, GCAP); 2334 2330 snd_printdd(SFX "chipset global capabilities = 0x%x\n", gcap); 2335 2331 2336 - /* ATI chips seems buggy about 64bit DMA addresses */ 2337 - if (chip->driver_type == AZX_DRIVER_ATI) 2338 - gcap &= ~ICH6_GCAP_64OK; 2332 + /* disable SB600 64bit support for safety */ 2333 + if ((chip->driver_type == AZX_DRIVER_ATI) || 2334 + (chip->driver_type == AZX_DRIVER_ATIHDMI)) { 2335 + struct pci_dev *p_smbus; 2336 + p_smbus = pci_get_device(PCI_VENDOR_ID_ATI, 2337 + PCI_DEVICE_ID_ATI_SBX00_SMBUS, 2338 + NULL); 2339 + if (p_smbus) { 2340 + if (p_smbus->revision < 0x30) 2341 + gcap &= ~ICH6_GCAP_64OK; 2342 + pci_dev_put(p_smbus); 2343 + } 2344 + } 2339 2345 2340 2346 /* allow 64bit DMA address if supported by H/W */ 2341 2347 if ((gcap & ICH6_GCAP_64OK) && !pci_set_dma_mask(pci, DMA_BIT_MASK(64)))
+8 -8
sound/pci/hda/patch_realtek.c
··· 6919 6919 {0x1b, AC_VERB_SET_CONNECT_SEL, 0x00}, /* HP */ 6920 6920 6921 6921 {0x14, AC_VERB_SET_UNSOLICITED_ENABLE, ALC880_HP_EVENT | AC_USRSP_EN}, 6922 - {0x01, AC_VERB_SET_GPIO_MASK, 0x03}, 6923 - {0x01, AC_VERB_SET_GPIO_DIRECTION, 0x03}, 6924 - {0x01, AC_VERB_SET_GPIO_DATA, 0x03}, 6925 6922 { } /* end */ 6926 6923 }; 6927 6924 ··· 7238 7241 }, 7239 7242 [ALC882_TARGA] = { 7240 7243 .mixers = { alc882_targa_mixer, alc882_chmode_mixer }, 7241 - .init_verbs = { alc882_init_verbs, alc882_targa_verbs}, 7244 + .init_verbs = { alc882_init_verbs, alc880_gpio3_init_verbs, 7245 + alc882_targa_verbs}, 7242 7246 .num_dacs = ARRAY_SIZE(alc882_dac_nids), 7243 7247 .dac_nids = alc882_dac_nids, 7244 7248 .dig_out_nid = ALC882_DIGOUT_NID, ··· 9236 9238 }, 9237 9239 [ALC883_TARGA_DIG] = { 9238 9240 .mixers = { alc883_targa_mixer, alc883_chmode_mixer }, 9239 - .init_verbs = { alc883_init_verbs, alc883_targa_verbs}, 9241 + .init_verbs = { alc883_init_verbs, alc880_gpio3_init_verbs, 9242 + alc883_targa_verbs}, 9240 9243 .num_dacs = ARRAY_SIZE(alc883_dac_nids), 9241 9244 .dac_nids = alc883_dac_nids, 9242 9245 .dig_out_nid = ALC883_DIGOUT_NID, ··· 9250 9251 }, 9251 9252 [ALC883_TARGA_2ch_DIG] = { 9252 9253 .mixers = { alc883_targa_2ch_mixer}, 9253 - .init_verbs = { alc883_init_verbs, alc883_targa_verbs}, 9254 + .init_verbs = { alc883_init_verbs, alc880_gpio3_init_verbs, 9255 + alc883_targa_verbs}, 9254 9256 .num_dacs = ARRAY_SIZE(alc883_dac_nids), 9255 9257 .dac_nids = alc883_dac_nids, 9256 9258 .adc_nids = alc883_adc_nids_alt, ··· 12878 12878 12879 12879 static struct snd_kcontrol_new alc269_eeepc_mixer[] = { 12880 12880 HDA_CODEC_MUTE("Speaker Playback Switch", 0x14, 0x0, HDA_OUTPUT), 12881 - HDA_CODEC_MUTE("Speaker Playback Volume", 0x02, 0x0, HDA_OUTPUT), 12881 + HDA_CODEC_VOLUME("Speaker Playback Volume", 0x02, 0x0, HDA_OUTPUT), 12882 12882 HDA_CODEC_MUTE("Headphone Playback Switch", 0x15, 0x0, HDA_OUTPUT), 12883 - HDA_CODEC_MUTE("Headphone Playback Volume", 0x03, 0x0, HDA_OUTPUT), 12883 + HDA_CODEC_VOLUME("Headphone Playback Volume", 0x03, 0x0, HDA_OUTPUT), 12884 12884 { } /* end */ 12885 12885 }; 12886 12886
+2 -2
sound/pci/hda/patch_sigmatel.c
··· 1590 1590 /* SigmaTel reference board */ 1591 1591 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 1592 1592 "DFI LanParty", STAC_REF), 1593 - SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30, 1594 - "SigmaTel",STAC_9205_REF), 1595 1593 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 1596 1594 "DFI LanParty", STAC_REF), 1597 1595 /* Dell laptops have BIOS problem */ ··· 2342 2344 /* SigmaTel reference board */ 2343 2345 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 2344 2346 "DFI LanParty", STAC_9205_REF), 2347 + SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30, 2348 + "SigmaTel", STAC_9205_REF), 2345 2349 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 2346 2350 "DFI LanParty", STAC_9205_REF), 2347 2351 /* Dell */
+50 -37
sound/pci/hda/patch_via.c
··· 210 210 /* capture */ 211 211 unsigned int num_adc_nids; 212 212 hda_nid_t *adc_nids; 213 + hda_nid_t mux_nids[3]; 213 214 hda_nid_t dig_in_nid; 215 + hda_nid_t dig_in_pin; 214 216 215 217 /* capture source */ 216 218 const struct hda_input_mux *input_mux; ··· 321 319 pin_type); 322 320 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_AMP_GAIN_MUTE, 323 321 AMP_OUT_UNMUTE); 322 + if (snd_hda_query_pin_caps(codec, nid) & AC_PINCAP_EAPD) 323 + snd_hda_codec_write(codec, nid, 0, 324 + AC_VERB_SET_EAPD_BTLENABLE, 0x02); 324 325 } 325 326 326 327 ··· 392 387 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 393 388 struct via_spec *spec = codec->spec; 394 389 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 395 - unsigned int vendor_id = codec->vendor_id; 396 390 397 - /* AIW0 lydia 060801 add for correct sw0 input select */ 398 - if (IS_VT1708_VENDORID(vendor_id) && (adc_idx == 0)) 399 - return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol, 400 - 0x18, &spec->cur_mux[adc_idx]); 401 - else if ((IS_VT1709_10CH_VENDORID(vendor_id) || 402 - IS_VT1709_6CH_VENDORID(vendor_id)) && (adc_idx == 0)) 403 - return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol, 404 - 0x19, &spec->cur_mux[adc_idx]); 405 - else if ((IS_VT1708B_8CH_VENDORID(vendor_id) || 406 - IS_VT1708B_4CH_VENDORID(vendor_id)) && (adc_idx == 0)) 407 - return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol, 408 - 0x17, &spec->cur_mux[adc_idx]); 409 - else if (IS_VT1702_VENDORID(vendor_id) && (adc_idx == 0)) 410 - return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol, 411 - 0x13, &spec->cur_mux[adc_idx]); 412 - else 413 - return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol, 414 - spec->adc_nids[adc_idx], 415 - &spec->cur_mux[adc_idx]); 391 + if (!spec->mux_nids[adc_idx]) 392 + return -EINVAL; 393 + return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol, 394 + spec->mux_nids[adc_idx], 395 + &spec->cur_mux[adc_idx]); 416 396 } 417 397 418 398 static int via_independent_hp_info(struct snd_kcontrol *kcontrol, ··· 988 998 989 999 /* Lydia Add for EAPD enable */ 990 1000 if (!spec->dig_in_nid) { /* No Digital In connection */ 991 - if (IS_VT1708_VENDORID(codec->vendor_id)) { 992 - snd_hda_codec_write(codec, VT1708_DIGIN_PIN, 0, 1001 + if (spec->dig_in_pin) { 1002 + snd_hda_codec_write(codec, spec->dig_in_pin, 0, 993 1003 AC_VERB_SET_PIN_WIDGET_CONTROL, 994 1004 PIN_OUT); 995 - snd_hda_codec_write(codec, VT1708_DIGIN_PIN, 0, 996 - AC_VERB_SET_EAPD_BTLENABLE, 0x02); 997 - } else if (IS_VT1709_10CH_VENDORID(codec->vendor_id) || 998 - IS_VT1709_6CH_VENDORID(codec->vendor_id)) { 999 - snd_hda_codec_write(codec, VT1709_DIGIN_PIN, 0, 1000 - AC_VERB_SET_PIN_WIDGET_CONTROL, 1001 - PIN_OUT); 1002 - snd_hda_codec_write(codec, VT1709_DIGIN_PIN, 0, 1003 - AC_VERB_SET_EAPD_BTLENABLE, 0x02); 1004 - } else if (IS_VT1708B_8CH_VENDORID(codec->vendor_id) || 1005 - IS_VT1708B_4CH_VENDORID(codec->vendor_id)) { 1006 - snd_hda_codec_write(codec, VT1708B_DIGIN_PIN, 0, 1007 - AC_VERB_SET_PIN_WIDGET_CONTROL, 1008 - PIN_OUT); 1009 - snd_hda_codec_write(codec, VT1708B_DIGIN_PIN, 0, 1005 + snd_hda_codec_write(codec, spec->dig_in_pin, 0, 1010 1006 AC_VERB_SET_EAPD_BTLENABLE, 0x02); 1011 1007 } 1012 1008 } else /* enable SPDIF-input pin */ ··· 1302 1326 1303 1327 if (spec->autocfg.dig_outs) 1304 1328 spec->multiout.dig_out_nid = VT1708_DIGOUT_NID; 1329 + spec->dig_in_pin = VT1708_DIGIN_PIN; 1305 1330 if (spec->autocfg.dig_in_pin) 1306 1331 spec->dig_in_nid = VT1708_DIGIN_NID; 1307 1332 ··· 1326 1349 via_auto_init_multi_out(codec); 1327 1350 via_auto_init_hp_out(codec); 1328 1351 via_auto_init_analog_input(codec); 1352 + return 0; 1353 + } 1354 + 1355 + static int get_mux_nids(struct hda_codec *codec) 1356 + { 1357 + struct via_spec *spec = codec->spec; 1358 + hda_nid_t nid, conn[8]; 1359 + unsigned int type; 1360 + int i, n; 1361 + 1362 + for (i = 0; i < spec->num_adc_nids; i++) { 1363 + nid = spec->adc_nids[i]; 1364 + while (nid) { 1365 + type = (get_wcaps(codec, nid) & AC_WCAP_TYPE) 1366 + >> AC_WCAP_TYPE_SHIFT; 1367 + if (type == AC_WID_PIN) 1368 + break; 1369 + n = snd_hda_get_connections(codec, nid, conn, 1370 + ARRAY_SIZE(conn)); 1371 + if (n <= 0) 1372 + break; 1373 + if (n > 1) { 1374 + spec->mux_nids[i] = nid; 1375 + break; 1376 + } 1377 + nid = conn[0]; 1378 + } 1379 + } 1329 1380 return 0; 1330 1381 } 1331 1382 ··· 1804 1799 1805 1800 if (spec->autocfg.dig_outs) 1806 1801 spec->multiout.dig_out_nid = VT1709_DIGOUT_NID; 1802 + spec->dig_in_pin = VT1709_DIGIN_PIN; 1807 1803 if (spec->autocfg.dig_in_pin) 1808 1804 spec->dig_in_nid = VT1709_DIGIN_NID; 1809 1805 ··· 1865 1859 if (!spec->adc_nids && spec->input_mux) { 1866 1860 spec->adc_nids = vt1709_adc_nids; 1867 1861 spec->num_adc_nids = ARRAY_SIZE(vt1709_adc_nids); 1862 + get_mux_nids(codec); 1868 1863 spec->mixers[spec->num_mixers] = vt1709_capture_mixer; 1869 1864 spec->num_mixers++; 1870 1865 } ··· 1959 1952 if (!spec->adc_nids && spec->input_mux) { 1960 1953 spec->adc_nids = vt1709_adc_nids; 1961 1954 spec->num_adc_nids = ARRAY_SIZE(vt1709_adc_nids); 1955 + get_mux_nids(codec); 1962 1956 spec->mixers[spec->num_mixers] = vt1709_capture_mixer; 1963 1957 spec->num_mixers++; 1964 1958 } ··· 2352 2344 2353 2345 if (spec->autocfg.dig_outs) 2354 2346 spec->multiout.dig_out_nid = VT1708B_DIGOUT_NID; 2347 + spec->dig_in_pin = VT1708B_DIGIN_PIN; 2355 2348 if (spec->autocfg.dig_in_pin) 2356 2349 spec->dig_in_nid = VT1708B_DIGIN_NID; 2357 2350 ··· 2413 2404 if (!spec->adc_nids && spec->input_mux) { 2414 2405 spec->adc_nids = vt1708B_adc_nids; 2415 2406 spec->num_adc_nids = ARRAY_SIZE(vt1708B_adc_nids); 2407 + get_mux_nids(codec); 2416 2408 spec->mixers[spec->num_mixers] = vt1708B_capture_mixer; 2417 2409 spec->num_mixers++; 2418 2410 } ··· 2465 2455 if (!spec->adc_nids && spec->input_mux) { 2466 2456 spec->adc_nids = vt1708B_adc_nids; 2467 2457 spec->num_adc_nids = ARRAY_SIZE(vt1708B_adc_nids); 2458 + get_mux_nids(codec); 2468 2459 spec->mixers[spec->num_mixers] = vt1708B_capture_mixer; 2469 2460 spec->num_mixers++; 2470 2461 } ··· 2900 2889 if (!spec->adc_nids && spec->input_mux) { 2901 2890 spec->adc_nids = vt1708S_adc_nids; 2902 2891 spec->num_adc_nids = ARRAY_SIZE(vt1708S_adc_nids); 2892 + get_mux_nids(codec); 2903 2893 spec->mixers[spec->num_mixers] = vt1708S_capture_mixer; 2904 2894 spec->num_mixers++; 2905 2895 } ··· 3218 3206 if (!spec->adc_nids && spec->input_mux) { 3219 3207 spec->adc_nids = vt1702_adc_nids; 3220 3208 spec->num_adc_nids = ARRAY_SIZE(vt1702_adc_nids); 3209 + get_mux_nids(codec); 3221 3210 spec->mixers[spec->num_mixers] = vt1702_capture_mixer; 3222 3211 spec->num_mixers++; 3223 3212 }
+3 -3
sound/soc/codecs/wm8753.c
··· 79 79 0x0097, 0x0097, 0x0000, 0x0004, 80 80 0x0000, 0x0083, 0x0024, 0x01ba, 81 81 0x0000, 0x0083, 0x0024, 0x01ba, 82 - 0x0000, 0x0000 82 + 0x0000, 0x0000, 0x0000 83 83 }; 84 84 85 85 /* codec private data */ ··· 1660 1660 codec->set_bias_level = wm8753_set_bias_level; 1661 1661 codec->dai = wm8753_dai; 1662 1662 codec->num_dai = 2; 1663 - codec->reg_cache_size = ARRAY_SIZE(wm8753->reg_cache); 1663 + codec->reg_cache_size = ARRAY_SIZE(wm8753->reg_cache) + 1; 1664 1664 codec->reg_cache = &wm8753->reg_cache; 1665 1665 codec->private_data = wm8753; 1666 1666 1667 - memcpy(codec->reg_cache, wm8753_reg, sizeof(codec->reg_cache)); 1667 + memcpy(codec->reg_cache, wm8753_reg, sizeof(wm8753->reg_cache)); 1668 1668 INIT_DELAYED_WORK(&codec->delayed_work, wm8753_work); 1669 1669 1670 1670 ret = wm8753_reset(codec);
+1
sound/soc/fsl/mpc5200_dma.c
··· 456 456 return -ENODEV; 457 457 458 458 spin_lock_init(&psc_dma->lock); 459 + mutex_init(&psc_dma->mutex); 459 460 psc_dma->id = be32_to_cpu(*prop); 460 461 psc_dma->irq = irq; 461 462 psc_dma->psc_regs = regs;
+1
sound/soc/fsl/mpc5200_dma.h
··· 55 55 unsigned int irq; 56 56 struct device *dev; 57 57 spinlock_t lock; 58 + struct mutex mutex; 58 59 u32 sicr; 59 60 uint sysclk; 60 61 int imr;
+16 -1
sound/soc/fsl/mpc5200_psc_ac97.c
··· 34 34 int status; 35 35 unsigned int val; 36 36 37 + mutex_lock(&psc_dma->mutex); 38 + 37 39 /* Wait for command send status zero = ready */ 38 40 status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) & 39 41 MPC52xx_PSC_SR_CMDSEND), 100, 0); 40 42 if (status == 0) { 41 43 pr_err("timeout on ac97 bus (rdy)\n"); 44 + mutex_unlock(&psc_dma->mutex); 42 45 return -ENODEV; 43 46 } 47 + 48 + /* Force clear the data valid bit */ 49 + in_be32(&psc_dma->psc_regs->ac97_data); 50 + 44 51 /* Send the read */ 45 52 out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24)); 46 53 ··· 57 50 if (status == 0) { 58 51 pr_err("timeout on ac97 read (val) %x\n", 59 52 in_be16(&psc_dma->psc_regs->sr_csr.status)); 53 + mutex_unlock(&psc_dma->mutex); 60 54 return -ENODEV; 61 55 } 62 56 /* Get the data */ 63 57 val = in_be32(&psc_dma->psc_regs->ac97_data); 64 58 if (((val >> 24) & 0x7f) != reg) { 65 59 pr_err("reg echo error on ac97 read\n"); 60 + mutex_unlock(&psc_dma->mutex); 66 61 return -ENODEV; 67 62 } 68 63 val = (val >> 8) & 0xffff; 69 64 65 + mutex_unlock(&psc_dma->mutex); 70 66 return (unsigned short) val; 71 67 } 72 68 ··· 78 68 { 79 69 int status; 80 70 71 + mutex_lock(&psc_dma->mutex); 72 + 81 73 /* Wait for command status zero = ready */ 82 74 status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) & 83 75 MPC52xx_PSC_SR_CMDSEND), 100, 0); 84 76 if (status == 0) { 85 77 pr_err("timeout on ac97 bus (write)\n"); 86 - return; 78 + goto out; 87 79 } 88 80 /* Write data */ 89 81 out_be32(&psc_dma->psc_regs->ac97_cmd, 90 82 ((reg & 0x7f) << 24) | (val << 8)); 83 + 84 + out: 85 + mutex_unlock(&psc_dma->mutex); 91 86 } 92 87 93 88 static void psc_ac97_warm_reset(struct snd_ac97 *ac97)