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riscv/atomic.h: use RISCV_FULL_BARRIER in _arch_atomic* function.

Replace the same code with the pre-defined macro
RISCV_FULL_BARRIER to simplify the code.

Signed-off-by: Zongmin Zhou <zhouzongmin@kylinos.cn>
Link: https://patch.msgid.link/20251120095831.64211-1-min_halo@163.com
Signed-off-by: Paul Walmsley <pjw@kernel.org>

authored by

Zongmin Zhou and committed by
Paul Walmsley f02dd254 6118ebed

+4 -4
+4 -4
arch/riscv/include/asm/atomic.h
··· 203 203 " add %[rc], %[p], %[a]\n" \ 204 204 " sc." sfx ".rl %[rc], %[rc], %[c]\n" \ 205 205 " bnez %[rc], 0b\n" \ 206 - " fence rw, rw\n" \ 206 + RISCV_FULL_BARRIER \ 207 207 "1:\n" \ 208 208 : [p]"=&r" (_prev), [rc]"=&r" (_rc), [c]"+A" (counter) \ 209 209 : [a]"r" (_a), [u]"r" (_u) \ ··· 242 242 " addi %[rc], %[p], 1\n" \ 243 243 " sc." sfx ".rl %[rc], %[rc], %[c]\n" \ 244 244 " bnez %[rc], 0b\n" \ 245 - " fence rw, rw\n" \ 245 + RISCV_FULL_BARRIER \ 246 246 "1:\n" \ 247 247 : [p]"=&r" (_prev), [rc]"=&r" (_rc), [c]"+A" (counter) \ 248 248 : \ ··· 268 268 " addi %[rc], %[p], -1\n" \ 269 269 " sc." sfx ".rl %[rc], %[rc], %[c]\n" \ 270 270 " bnez %[rc], 0b\n" \ 271 - " fence rw, rw\n" \ 271 + RISCV_FULL_BARRIER \ 272 272 "1:\n" \ 273 273 : [p]"=&r" (_prev), [rc]"=&r" (_rc), [c]"+A" (counter) \ 274 274 : \ ··· 294 294 " bltz %[rc], 1f\n" \ 295 295 " sc." sfx ".rl %[rc], %[rc], %[c]\n" \ 296 296 " bnez %[rc], 0b\n" \ 297 - " fence rw, rw\n" \ 297 + RISCV_FULL_BARRIER \ 298 298 "1:\n" \ 299 299 : [p]"=&r" (_prev), [rc]"=&r" (_rc), [c]"+A" (counter) \ 300 300 : \