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KVM: arm64: Turn kvm_vgic_vcpu_enable() into kvm_vgic_vcpu_reset()

Now that we always reconfigure the vgic HCR register on entry,
the "enable" part of kvm_vgic_vcpu_enable() is pretty useless.

Removing the enable bits from these functions makes it plain that
they are just about computing the reset state. Just rename the
functions accordingly.

Tested-by: Fuad Tabba <tabba@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Tested-by: Mark Brown <broonie@kernel.org>
Link: https://msgid.link/20251120172540.2267180-23-maz@kernel.org
Signed-off-by: Oliver Upton <oupton@kernel.org>

authored by

Marc Zyngier and committed by
Oliver Upton
f04b8a5a 6780a756

+8 -14
+4 -4
arch/arm64/kvm/vgic/vgic-init.c
··· 353 353 return ret; 354 354 } 355 355 356 - static void kvm_vgic_vcpu_enable(struct kvm_vcpu *vcpu) 356 + static void kvm_vgic_vcpu_reset(struct kvm_vcpu *vcpu) 357 357 { 358 358 if (kvm_vgic_global_state.type == VGIC_V2) 359 - vgic_v2_enable(vcpu); 359 + vgic_v2_reset(vcpu); 360 360 else 361 - vgic_v3_enable(vcpu); 361 + vgic_v3_reset(vcpu); 362 362 } 363 363 364 364 /* ··· 405 405 } 406 406 407 407 kvm_for_each_vcpu(idx, vcpu, kvm) 408 - kvm_vgic_vcpu_enable(vcpu); 408 + kvm_vgic_vcpu_reset(vcpu); 409 409 410 410 ret = kvm_vgic_setup_default_irq_routing(kvm); 411 411 if (ret)
+1 -4
arch/arm64/kvm/vgic/vgic-v2.c
··· 285 285 GICH_VMCR_PRIMASK_SHIFT) << GICV_PMR_PRIORITY_SHIFT; 286 286 } 287 287 288 - void vgic_v2_enable(struct kvm_vcpu *vcpu) 288 + void vgic_v2_reset(struct kvm_vcpu *vcpu) 289 289 { 290 290 /* 291 291 * By forcing VMCR to zero, the GIC will restore the binary ··· 293 293 * anyway. 294 294 */ 295 295 vcpu->arch.vgic_cpu.vgic_v2.vgic_vmcr = 0; 296 - 297 - /* Get the show on the road... */ 298 - vcpu->arch.vgic_cpu.vgic_v2.vgic_hcr = GICH_HCR_EN; 299 296 } 300 297 301 298 /* check for overlapping regions and for regions crossing the end of memory */
+1 -4
arch/arm64/kvm/vgic/vgic-v3.c
··· 293 293 GIC_BASER_CACHEABILITY(GICR_PENDBASER, OUTER, SameAsInner) | \ 294 294 GIC_BASER_SHAREABILITY(GICR_PENDBASER, InnerShareable)) 295 295 296 - void vgic_v3_enable(struct kvm_vcpu *vcpu) 296 + void vgic_v3_reset(struct kvm_vcpu *vcpu) 297 297 { 298 298 struct vgic_v3_cpu_if *vgic_v3 = &vcpu->arch.vgic_cpu.vgic_v3; 299 299 ··· 323 323 kvm_vgic_global_state.ich_vtr_el2); 324 324 vcpu->arch.vgic_cpu.num_pri_bits = FIELD_GET(ICH_VTR_EL2_PRIbits, 325 325 kvm_vgic_global_state.ich_vtr_el2) + 1; 326 - 327 - /* Get the show on the road... */ 328 - vgic_v3->vgic_hcr = ICH_HCR_EL2_En; 329 326 } 330 327 331 328 void vcpu_set_ich_hcr(struct kvm_vcpu *vcpu)
+2 -2
arch/arm64/kvm/vgic/vgic.h
··· 285 285 int offset, u32 *val); 286 286 void vgic_v2_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr); 287 287 void vgic_v2_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr); 288 - void vgic_v2_enable(struct kvm_vcpu *vcpu); 288 + void vgic_v2_reset(struct kvm_vcpu *vcpu); 289 289 int vgic_v2_probe(const struct gic_kvm_info *info); 290 290 int vgic_v2_map_resources(struct kvm *kvm); 291 291 int vgic_register_dist_iodev(struct kvm *kvm, gpa_t dist_base_address, ··· 320 320 void vgic_v3_configure_hcr(struct kvm_vcpu *vcpu, struct ap_list_summary *als); 321 321 void vgic_v3_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr); 322 322 void vgic_v3_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr); 323 - void vgic_v3_enable(struct kvm_vcpu *vcpu); 323 + void vgic_v3_reset(struct kvm_vcpu *vcpu); 324 324 int vgic_v3_probe(const struct gic_kvm_info *info); 325 325 int vgic_v3_map_resources(struct kvm *kvm); 326 326 int vgic_v3_lpi_sync_pending_status(struct kvm *kvm, struct vgic_irq *irq);