Merge tag 'loongarch-fixes-6.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson

+2

arch/loongarch/Kconfig

··· 39 39 select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION 40 40 select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION 41 41 select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION 42 + select ARCH_KEEP_MEMBLOCK 42 43 select ARCH_MIGHT_HAVE_PC_PARPORT 43 44 select ARCH_MIGHT_HAVE_PC_SERIO 44 45 select ARCH_SPARSEMEM_ENABLE ··· 52 51 select ARCH_USE_CMPXCHG_LOCKREF 53 52 select ARCH_USE_QUEUED_RWLOCKS 54 53 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT 54 + select ARCH_WANT_LD_ORPHAN_WARN 55 55 select ARCH_WANTS_NO_INSTR 56 56 select BUILDTIME_TABLE_SORT 57 57 select COMMON_CLK

+1 -1

arch/loongarch/include/asm/acpi.h

··· 15 15 extern int acpi_noirq; 16 16 17 17 #define acpi_os_ioremap acpi_os_ioremap 18 - void __init __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size); 18 + void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size); 19 19 20 20 static inline void disable_acpi(void) 21 21 {

+1 -1

arch/loongarch/kernel/acpi.c

··· 48 48 early_memunmap(map, size); 49 49 } 50 50 51 - void __init __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size) 51 + void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size) 52 52 { 53 53 if (!memblock_is_memory(phys)) 54 54 return ioremap(phys, size);

+2 -2

arch/loongarch/kernel/signal.c

··· 529 529 signal_setup_done(ret, ksig, 0); 530 530 } 531 531 532 - void arch_do_signal_or_restart(struct pt_regs *regs, bool has_signal) 532 + void arch_do_signal_or_restart(struct pt_regs *regs) 533 533 { 534 534 struct ksignal ksig; 535 535 536 - if (has_signal && get_signal(&ksig)) { 536 + if (get_signal(&ksig)) { 537 537 /* Whee! Actually deliver the signal. */ 538 538 handle_signal(&ksig, regs); 539 539 return;

+2

arch/loongarch/kernel/vmlinux.lds.S

··· 77 77 PERCPU_SECTION(1 << CONFIG_L1_CACHE_SHIFT) 78 78 #endif 79 79 80 + .rela.dyn : ALIGN(8) { *(.rela.dyn) *(.rela*) } 81 + 80 82 .init.bss : { 81 83 *(.init.bss) 82 84 }

+13 -13

arch/loongarch/lib/dump_tlb.c

··· 18 18 { 19 19 const int field = 2 * sizeof(unsigned long); 20 20 21 - pr_info("Index : %0x\n", read_csr_tlbidx()); 22 - pr_info("PageSize : %0x\n", read_csr_pagesize()); 23 - pr_info("EntryHi : %0*llx\n", field, read_csr_entryhi()); 24 - pr_info("EntryLo0 : %0*llx\n", field, read_csr_entrylo0()); 25 - pr_info("EntryLo1 : %0*llx\n", field, read_csr_entrylo1()); 21 + pr_info("Index : 0x%0x\n", read_csr_tlbidx()); 22 + pr_info("PageSize : 0x%0x\n", read_csr_pagesize()); 23 + pr_info("EntryHi : 0x%0*llx\n", field, read_csr_entryhi()); 24 + pr_info("EntryLo0 : 0x%0*llx\n", field, read_csr_entrylo0()); 25 + pr_info("EntryLo1 : 0x%0*llx\n", field, read_csr_entrylo1()); 26 26 } 27 27 28 28 static void dump_tlb(int first, int last) ··· 33 33 unsigned int s_index, s_asid; 34 34 unsigned int pagesize, c0, c1, i; 35 35 unsigned long asidmask = cpu_asid_mask(&current_cpu_data); 36 - int pwidth = 11; 37 - int vwidth = 11; 36 + int pwidth = 16; 37 + int vwidth = 16; 38 38 int asidwidth = DIV_ROUND_UP(ilog2(asidmask) + 1, 4); 39 39 40 40 s_entryhi = read_csr_entryhi(); ··· 64 64 /* 65 65 * Only print entries in use 66 66 */ 67 - pr_info("Index: %2d pgsize=%x ", i, (1 << pagesize)); 67 + pr_info("Index: %4d pgsize=0x%x ", i, (1 << pagesize)); 68 68 69 69 c0 = (entrylo0 & ENTRYLO_C) >> ENTRYLO_C_SHIFT; 70 70 c1 = (entrylo1 & ENTRYLO_C) >> ENTRYLO_C_SHIFT; 71 71 72 - pr_cont("va=%0*lx asid=%0*lx", 72 + pr_cont("va=0x%0*lx asid=0x%0*lx", 73 73 vwidth, (entryhi & ~0x1fffUL), asidwidth, asid & asidmask); 74 74 75 75 /* NR/NX are in awkward places, so mask them off separately */ 76 76 pa = entrylo0 & ~(ENTRYLO_NR | ENTRYLO_NX); 77 77 pa = pa & PAGE_MASK; 78 78 pr_cont("\n\t["); 79 - pr_cont("ri=%d xi=%d ", 79 + pr_cont("nr=%d nx=%d ", 80 80 (entrylo0 & ENTRYLO_NR) ? 1 : 0, 81 81 (entrylo0 & ENTRYLO_NX) ? 1 : 0); 82 - pr_cont("pa=%0*llx c=%d d=%d v=%d g=%d plv=%lld] [", 82 + pr_cont("pa=0x%0*llx c=%d d=%d v=%d g=%d plv=%lld] [", 83 83 pwidth, pa, c0, 84 84 (entrylo0 & ENTRYLO_D) ? 1 : 0, 85 85 (entrylo0 & ENTRYLO_V) ? 1 : 0, ··· 88 88 /* NR/NX are in awkward places, so mask them off separately */ 89 89 pa = entrylo1 & ~(ENTRYLO_NR | ENTRYLO_NX); 90 90 pa = pa & PAGE_MASK; 91 - pr_cont("ri=%d xi=%d ", 91 + pr_cont("nr=%d nx=%d ", 92 92 (entrylo1 & ENTRYLO_NR) ? 1 : 0, 93 93 (entrylo1 & ENTRYLO_NX) ? 1 : 0); 94 - pr_cont("pa=%0*llx c=%d d=%d v=%d g=%d plv=%lld]\n", 94 + pr_cont("pa=0x%0*llx c=%d d=%d v=%d g=%d plv=%lld]\n", 95 95 pwidth, pa, c1, 96 96 (entrylo1 & ENTRYLO_D) ? 1 : 0, 97 97 (entrylo1 & ENTRYLO_V) ? 1 : 0,

+7 -12

arch/loongarch/mm/init.c

··· 131 131 return ret; 132 132 } 133 133 134 - #ifdef CONFIG_NUMA 135 - int memory_add_physaddr_to_nid(u64 start) 136 - { 137 - int nid; 138 - 139 - nid = pa_to_nid(start); 140 - return nid; 141 - } 142 - EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid); 143 - #endif 144 - 145 - #ifdef CONFIG_MEMORY_HOTREMOVE 146 134 void arch_remove_memory(u64 start, u64 size, struct vmem_altmap *altmap) 147 135 { 148 136 unsigned long start_pfn = start >> PAGE_SHIFT; ··· 142 154 page += vmem_altmap_offset(altmap); 143 155 __remove_pages(start_pfn, nr_pages, altmap); 144 156 } 157 + 158 + #ifdef CONFIG_NUMA 159 + int memory_add_physaddr_to_nid(u64 start) 160 + { 161 + return pa_to_nid(start); 162 + } 163 + EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid); 145 164 #endif 146 165 #endif 147 166

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