Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'i2c-for-6.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c fixes from Wolfram Sang:
"I2C driver bugfixes for mlxbf and imx, a few documentation fixes after
the rework this cycle, and one hardening for the i2c-mux core"
* tag 'i2c-for-6.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: mux: harden i2c_mux_alloc() against integer overflows
i2c: mlxbf: Fix frequency calculation
i2c: mlxbf: prevent stack overflow in mlxbf_i2c_smbus_start_transaction()
i2c: mlxbf: incorrect base address passed during io write
Documentation: i2c: fix references to other documents
MAINTAINERS: remove Nehal Shah from AMD MP2 I2C DRIVER
i2c: imx: If pm_runtime_get_sync() returned 1 device access is possible
+37
-51
+1
-1
Documentation/i2c/dev-interface.rst
+1
-1
Documentation/i2c/dev-interface.rst
···
148
148
You do not need to pass the address byte; instead, set it through
149
149
ioctl I2C_SLAVE before you try to access the device.
150
150
151
-
You can do SMBus level transactions (see documentation file smbus-protocol
151
+
You can do SMBus level transactions (see documentation file smbus-protocol.rst
152
152
for details) through the following functions::
153
153
154
154
__s32 i2c_smbus_write_quick(int file, __u8 value);
+3
-3
Documentation/i2c/slave-interface.rst
+3
-3
Documentation/i2c/slave-interface.rst
···
32
32
===========
33
33
34
34
I2C slave backends behave like standard I2C clients. So, you can instantiate
35
-
them as described in the document 'instantiating-devices'. The only difference
36
-
is that i2c slave backends have their own address space. So, you have to add
37
-
0x1000 to the address you would originally request. An example for
35
+
them as described in the document instantiating-devices.rst. The only
36
+
difference is that i2c slave backends have their own address space. So, you
37
+
have to add 0x1000 to the address you would originally request. An example for
38
38
instantiating the slave-eeprom driver from userspace at the 7 bit address 0x64
39
39
on bus 1::
40
40
+2
-2
Documentation/i2c/writing-clients.rst
+2
-2
Documentation/i2c/writing-clients.rst
···
364
364
contains for each message the client address, the number of bytes of the
365
365
message and the message data itself.
366
366
367
-
You can read the file ``i2c-protocol`` for more information about the
367
+
You can read the file i2c-protocol.rst for more information about the
368
368
actual I2C protocol.
369
369
370
370
···
414
414
value, except for block transactions, which return the number of values
415
415
read. The block buffers need not be longer than 32 bytes.
416
416
417
-
You can read the file ``smbus-protocol`` for more information about the
417
+
You can read the file smbus-protocol.rst for more information about the
418
418
actual SMBus protocol.
419
419
420
420
-1
MAINTAINERS
-1
MAINTAINERS
+1
-1
drivers/i2c/busses/i2c-imx.c
+1
-1
drivers/i2c/busses/i2c-imx.c
+27
-41
drivers/i2c/busses/i2c-mlxbf.c
+27
-41
drivers/i2c/busses/i2c-mlxbf.c
···
6
6
*/
7
7
8
8
#include <linux/acpi.h>
9
+
#include <linux/bitfield.h>
9
10
#include <linux/delay.h>
10
11
#include <linux/err.h>
11
12
#include <linux/interrupt.h>
···
64
63
*/
65
64
#define MLXBF_I2C_TYU_PLL_OUT_FREQ (400 * 1000 * 1000)
66
65
/* Reference clock for Bluefield - 156 MHz. */
67
-
#define MLXBF_I2C_PLL_IN_FREQ (156 * 1000 * 1000)
66
+
#define MLXBF_I2C_PLL_IN_FREQ 156250000ULL
68
67
69
68
/* Constant used to determine the PLL frequency. */
70
-
#define MLNXBF_I2C_COREPLL_CONST 16384
69
+
#define MLNXBF_I2C_COREPLL_CONST 16384ULL
70
+
71
+
#define MLXBF_I2C_FREQUENCY_1GHZ 1000000000ULL
71
72
72
73
/* PLL registers. */
73
-
#define MLXBF_I2C_CORE_PLL_REG0 0x0
74
74
#define MLXBF_I2C_CORE_PLL_REG1 0x4
75
75
#define MLXBF_I2C_CORE_PLL_REG2 0x8
76
76
···
183
181
#define MLXBF_I2C_COREPLL_FREQ MLXBF_I2C_TYU_PLL_OUT_FREQ
184
182
185
183
/* Core PLL TYU configuration. */
186
-
#define MLXBF_I2C_COREPLL_CORE_F_TYU_MASK GENMASK(12, 0)
187
-
#define MLXBF_I2C_COREPLL_CORE_OD_TYU_MASK GENMASK(3, 0)
188
-
#define MLXBF_I2C_COREPLL_CORE_R_TYU_MASK GENMASK(5, 0)
189
-
190
-
#define MLXBF_I2C_COREPLL_CORE_F_TYU_SHIFT 3
191
-
#define MLXBF_I2C_COREPLL_CORE_OD_TYU_SHIFT 16
192
-
#define MLXBF_I2C_COREPLL_CORE_R_TYU_SHIFT 20
184
+
#define MLXBF_I2C_COREPLL_CORE_F_TYU_MASK GENMASK(15, 3)
185
+
#define MLXBF_I2C_COREPLL_CORE_OD_TYU_MASK GENMASK(19, 16)
186
+
#define MLXBF_I2C_COREPLL_CORE_R_TYU_MASK GENMASK(25, 20)
193
187
194
188
/* Core PLL YU configuration. */
195
189
#define MLXBF_I2C_COREPLL_CORE_F_YU_MASK GENMASK(25, 0)
196
190
#define MLXBF_I2C_COREPLL_CORE_OD_YU_MASK GENMASK(3, 0)
197
-
#define MLXBF_I2C_COREPLL_CORE_R_YU_MASK GENMASK(5, 0)
191
+
#define MLXBF_I2C_COREPLL_CORE_R_YU_MASK GENMASK(31, 26)
198
192
199
-
#define MLXBF_I2C_COREPLL_CORE_F_YU_SHIFT 0
200
-
#define MLXBF_I2C_COREPLL_CORE_OD_YU_SHIFT 1
201
-
#define MLXBF_I2C_COREPLL_CORE_R_YU_SHIFT 26
202
193
203
194
/* Core PLL frequency. */
204
195
static u64 mlxbf_i2c_corepll_frequency;
···
474
479
#define MLXBF_I2C_MASK_8 GENMASK(7, 0)
475
480
#define MLXBF_I2C_MASK_16 GENMASK(15, 0)
476
481
477
-
#define MLXBF_I2C_FREQUENCY_1GHZ 1000000000
478
-
479
482
/*
480
483
* Function to poll a set of bits at a specific address; it checks whether
481
484
* the bits are equal to zero when eq_zero is set to 'true', and not equal
···
662
669
/* Clear status bits. */
663
670
writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_STATUS);
664
671
/* Set the cause data. */
665
-
writel(~0x0, priv->smbus->io + MLXBF_I2C_CAUSE_OR_CLEAR);
672
+
writel(~0x0, priv->mst_cause->io + MLXBF_I2C_CAUSE_OR_CLEAR);
666
673
/* Zero PEC byte. */
667
674
writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_PEC);
668
675
/* Zero byte count. */
···
731
738
if (flags & MLXBF_I2C_F_WRITE) {
732
739
write_en = 1;
733
740
write_len += operation->length;
741
+
if (data_idx + operation->length >
742
+
MLXBF_I2C_MASTER_DATA_DESC_SIZE)
743
+
return -ENOBUFS;
734
744
memcpy(data_desc + data_idx,
735
745
operation->buffer, operation->length);
736
746
data_idx += operation->length;
···
1403
1407
return 0;
1404
1408
}
1405
1409
1406
-
static u64 mlxbf_calculate_freq_from_tyu(struct mlxbf_i2c_resource *corepll_res)
1410
+
static u64 mlxbf_i2c_calculate_freq_from_tyu(struct mlxbf_i2c_resource *corepll_res)
1407
1411
{
1408
-
u64 core_frequency, pad_frequency;
1412
+
u64 core_frequency;
1409
1413
u8 core_od, core_r;
1410
1414
u32 corepll_val;
1411
1415
u16 core_f;
1412
1416
1413
-
pad_frequency = MLXBF_I2C_PLL_IN_FREQ;
1414
-
1415
1417
corepll_val = readl(corepll_res->io + MLXBF_I2C_CORE_PLL_REG1);
1416
1418
1417
1419
/* Get Core PLL configuration bits. */
1418
-
core_f = rol32(corepll_val, MLXBF_I2C_COREPLL_CORE_F_TYU_SHIFT) &
1419
-
MLXBF_I2C_COREPLL_CORE_F_TYU_MASK;
1420
-
core_od = rol32(corepll_val, MLXBF_I2C_COREPLL_CORE_OD_TYU_SHIFT) &
1421
-
MLXBF_I2C_COREPLL_CORE_OD_TYU_MASK;
1422
-
core_r = rol32(corepll_val, MLXBF_I2C_COREPLL_CORE_R_TYU_SHIFT) &
1423
-
MLXBF_I2C_COREPLL_CORE_R_TYU_MASK;
1420
+
core_f = FIELD_GET(MLXBF_I2C_COREPLL_CORE_F_TYU_MASK, corepll_val);
1421
+
core_od = FIELD_GET(MLXBF_I2C_COREPLL_CORE_OD_TYU_MASK, corepll_val);
1422
+
core_r = FIELD_GET(MLXBF_I2C_COREPLL_CORE_R_TYU_MASK, corepll_val);
1424
1423
1425
1424
/*
1426
1425
* Compute PLL output frequency as follow:
···
1427
1436
* Where PLL_OUT_FREQ and PLL_IN_FREQ refer to CoreFrequency
1428
1437
* and PadFrequency, respectively.
1429
1438
*/
1430
-
core_frequency = pad_frequency * (++core_f);
1439
+
core_frequency = MLXBF_I2C_PLL_IN_FREQ * (++core_f);
1431
1440
core_frequency /= (++core_r) * (++core_od);
1432
1441
1433
1442
return core_frequency;
1434
1443
}
1435
1444
1436
-
static u64 mlxbf_calculate_freq_from_yu(struct mlxbf_i2c_resource *corepll_res)
1445
+
static u64 mlxbf_i2c_calculate_freq_from_yu(struct mlxbf_i2c_resource *corepll_res)
1437
1446
{
1438
1447
u32 corepll_reg1_val, corepll_reg2_val;
1439
-
u64 corepll_frequency, pad_frequency;
1448
+
u64 corepll_frequency;
1440
1449
u8 core_od, core_r;
1441
1450
u32 core_f;
1442
-
1443
-
pad_frequency = MLXBF_I2C_PLL_IN_FREQ;
1444
1451
1445
1452
corepll_reg1_val = readl(corepll_res->io + MLXBF_I2C_CORE_PLL_REG1);
1446
1453
corepll_reg2_val = readl(corepll_res->io + MLXBF_I2C_CORE_PLL_REG2);
1447
1454
1448
1455
/* Get Core PLL configuration bits */
1449
-
core_f = rol32(corepll_reg1_val, MLXBF_I2C_COREPLL_CORE_F_YU_SHIFT) &
1450
-
MLXBF_I2C_COREPLL_CORE_F_YU_MASK;
1451
-
core_r = rol32(corepll_reg1_val, MLXBF_I2C_COREPLL_CORE_R_YU_SHIFT) &
1452
-
MLXBF_I2C_COREPLL_CORE_R_YU_MASK;
1453
-
core_od = rol32(corepll_reg2_val, MLXBF_I2C_COREPLL_CORE_OD_YU_SHIFT) &
1454
-
MLXBF_I2C_COREPLL_CORE_OD_YU_MASK;
1456
+
core_f = FIELD_GET(MLXBF_I2C_COREPLL_CORE_F_YU_MASK, corepll_reg1_val);
1457
+
core_r = FIELD_GET(MLXBF_I2C_COREPLL_CORE_R_YU_MASK, corepll_reg1_val);
1458
+
core_od = FIELD_GET(MLXBF_I2C_COREPLL_CORE_OD_YU_MASK, corepll_reg2_val);
1455
1459
1456
1460
/*
1457
1461
* Compute PLL output frequency as follow:
···
1458
1472
* Where PLL_OUT_FREQ and PLL_IN_FREQ refer to CoreFrequency
1459
1473
* and PadFrequency, respectively.
1460
1474
*/
1461
-
corepll_frequency = (pad_frequency * core_f) / MLNXBF_I2C_COREPLL_CONST;
1475
+
corepll_frequency = (MLXBF_I2C_PLL_IN_FREQ * core_f) / MLNXBF_I2C_COREPLL_CONST;
1462
1476
corepll_frequency /= (++core_r) * (++core_od);
1463
1477
1464
1478
return corepll_frequency;
···
2166
2180
[1] = &mlxbf_i2c_corepll_res[MLXBF_I2C_CHIP_TYPE_1],
2167
2181
[2] = &mlxbf_i2c_gpio_res[MLXBF_I2C_CHIP_TYPE_1]
2168
2182
},
2169
-
.calculate_freq = mlxbf_calculate_freq_from_tyu
2183
+
.calculate_freq = mlxbf_i2c_calculate_freq_from_tyu
2170
2184
},
2171
2185
[MLXBF_I2C_CHIP_TYPE_2] = {
2172
2186
.type = MLXBF_I2C_CHIP_TYPE_2,
2173
2187
.shared_res = {
2174
2188
[0] = &mlxbf_i2c_corepll_res[MLXBF_I2C_CHIP_TYPE_2]
2175
2189
},
2176
-
.calculate_freq = mlxbf_calculate_freq_from_yu
2190
+
.calculate_freq = mlxbf_i2c_calculate_freq_from_yu
2177
2191
}
2178
2192
};
2179
2193
+3
-2
drivers/i2c/i2c-mux.c
+3
-2
drivers/i2c/i2c-mux.c
···
243
243
int (*deselect)(struct i2c_mux_core *, u32))
244
244
{
245
245
struct i2c_mux_core *muxc;
246
+
size_t mux_size;
246
247
247
-
muxc = devm_kzalloc(dev, struct_size(muxc, adapter, max_adapters)
248
-
+ sizeof_priv, GFP_KERNEL);
248
+
mux_size = struct_size(muxc, adapter, max_adapters);
249
+
muxc = devm_kzalloc(dev, size_add(mux_size, sizeof_priv), GFP_KERNEL);
249
250
if (!muxc)
250
251
return NULL;
251
252
if (sizeof_priv)