Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'drm-fixes-2018-09-28' of git://anongit.freedesktop.org/drm/drm
Dave writes:
"drm fixes for 4.19-rc6
Looks like a pretty normal week for graphics,
core: syncobj fix, panel link regression revert
amd: suspend/resume fixes, EDID emulation fix
mali-dp: NV12 writeback and vblank reset fixes
etnaviv: DMA setup fix"
* tag 'drm-fixes-2018-09-28' of git://anongit.freedesktop.org/drm/drm:
drm/amd/display: Fix Edid emulation for linux
drm/amd/display: Fix Vega10 lightup on S3 resume
drm/amdgpu: Fix vce work queue was not cancelled when suspend
Revert "drm/panel: Add device_link from panel device to DRM device"
drm/syncobj: Don't leak fences when WAIT_FOR_SUBMIT is set
drm/malidp: Fix writeback in NV12
drm: mali-dp: Call drm_crtc_vblank_reset on device init
drm/etnaviv: add DMA configuration for etnaviv platform device
+217
-52
+2
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+2
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
···
258
258
{
259
259
int i;
260
260
261
+
cancel_delayed_work_sync(&adev->vce.idle_work);
262
+
261
263
if (adev->vce.vcpu_bo == NULL)
262
264
return 0;
263
265
···
270
268
if (i == AMDGPU_MAX_VCE_HANDLES)
271
269
return 0;
272
270
273
-
cancel_delayed_work_sync(&adev->vce.idle_work);
274
271
/* TODO: suspending running encoding sessions isn't supported */
275
272
return -EINVAL;
276
273
}
+2
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
+2
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
···
153
153
unsigned size;
154
154
void *ptr;
155
155
156
+
cancel_delayed_work_sync(&adev->vcn.idle_work);
157
+
156
158
if (adev->vcn.vcpu_bo == NULL)
157
159
return 0;
158
-
159
-
cancel_delayed_work_sync(&adev->vcn.idle_work);
160
160
161
161
size = amdgpu_bo_size(adev->vcn.vcpu_bo);
162
162
ptr = adev->vcn.cpu_addr;
+134
-5
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+134
-5
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
···
641
641
return NULL;
642
642
}
643
643
644
+
static void emulated_link_detect(struct dc_link *link)
645
+
{
646
+
struct dc_sink_init_data sink_init_data = { 0 };
647
+
struct display_sink_capability sink_caps = { 0 };
648
+
enum dc_edid_status edid_status;
649
+
struct dc_context *dc_ctx = link->ctx;
650
+
struct dc_sink *sink = NULL;
651
+
struct dc_sink *prev_sink = NULL;
652
+
653
+
link->type = dc_connection_none;
654
+
prev_sink = link->local_sink;
655
+
656
+
if (prev_sink != NULL)
657
+
dc_sink_retain(prev_sink);
658
+
659
+
switch (link->connector_signal) {
660
+
case SIGNAL_TYPE_HDMI_TYPE_A: {
661
+
sink_caps.transaction_type = DDC_TRANSACTION_TYPE_I2C;
662
+
sink_caps.signal = SIGNAL_TYPE_HDMI_TYPE_A;
663
+
break;
664
+
}
665
+
666
+
case SIGNAL_TYPE_DVI_SINGLE_LINK: {
667
+
sink_caps.transaction_type = DDC_TRANSACTION_TYPE_I2C;
668
+
sink_caps.signal = SIGNAL_TYPE_DVI_SINGLE_LINK;
669
+
break;
670
+
}
671
+
672
+
case SIGNAL_TYPE_DVI_DUAL_LINK: {
673
+
sink_caps.transaction_type = DDC_TRANSACTION_TYPE_I2C;
674
+
sink_caps.signal = SIGNAL_TYPE_DVI_DUAL_LINK;
675
+
break;
676
+
}
677
+
678
+
case SIGNAL_TYPE_LVDS: {
679
+
sink_caps.transaction_type = DDC_TRANSACTION_TYPE_I2C;
680
+
sink_caps.signal = SIGNAL_TYPE_LVDS;
681
+
break;
682
+
}
683
+
684
+
case SIGNAL_TYPE_EDP: {
685
+
sink_caps.transaction_type =
686
+
DDC_TRANSACTION_TYPE_I2C_OVER_AUX;
687
+
sink_caps.signal = SIGNAL_TYPE_EDP;
688
+
break;
689
+
}
690
+
691
+
case SIGNAL_TYPE_DISPLAY_PORT: {
692
+
sink_caps.transaction_type =
693
+
DDC_TRANSACTION_TYPE_I2C_OVER_AUX;
694
+
sink_caps.signal = SIGNAL_TYPE_VIRTUAL;
695
+
break;
696
+
}
697
+
698
+
default:
699
+
DC_ERROR("Invalid connector type! signal:%d\n",
700
+
link->connector_signal);
701
+
return;
702
+
}
703
+
704
+
sink_init_data.link = link;
705
+
sink_init_data.sink_signal = sink_caps.signal;
706
+
707
+
sink = dc_sink_create(&sink_init_data);
708
+
if (!sink) {
709
+
DC_ERROR("Failed to create sink!\n");
710
+
return;
711
+
}
712
+
713
+
link->local_sink = sink;
714
+
715
+
edid_status = dm_helpers_read_local_edid(
716
+
link->ctx,
717
+
link,
718
+
sink);
719
+
720
+
if (edid_status != EDID_OK)
721
+
DC_ERROR("Failed to read EDID");
722
+
723
+
}
724
+
644
725
static int dm_resume(void *handle)
645
726
{
646
727
struct amdgpu_device *adev = handle;
···
735
654
struct drm_plane *plane;
736
655
struct drm_plane_state *new_plane_state;
737
656
struct dm_plane_state *dm_new_plane_state;
657
+
enum dc_connection_type new_connection_type = dc_connection_none;
738
658
int ret;
739
659
int i;
740
660
···
766
684
continue;
767
685
768
686
mutex_lock(&aconnector->hpd_lock);
769
-
dc_link_detect(aconnector->dc_link, DETECT_REASON_HPD);
687
+
if (!dc_link_detect_sink(aconnector->dc_link, &new_connection_type))
688
+
DRM_ERROR("KMS: Failed to detect connector\n");
689
+
690
+
if (aconnector->base.force && new_connection_type == dc_connection_none)
691
+
emulated_link_detect(aconnector->dc_link);
692
+
else
693
+
dc_link_detect(aconnector->dc_link, DETECT_REASON_HPD);
770
694
771
695
if (aconnector->fake_enable && aconnector->dc_link->local_sink)
772
696
aconnector->fake_enable = false;
···
1010
922
struct amdgpu_dm_connector *aconnector = (struct amdgpu_dm_connector *)param;
1011
923
struct drm_connector *connector = &aconnector->base;
1012
924
struct drm_device *dev = connector->dev;
925
+
enum dc_connection_type new_connection_type = dc_connection_none;
1013
926
1014
927
/* In case of failure or MST no need to update connector status or notify the OS
1015
928
* since (for MST case) MST does this in it's own context.
···
1020
931
if (aconnector->fake_enable)
1021
932
aconnector->fake_enable = false;
1022
933
1023
-
if (dc_link_detect(aconnector->dc_link, DETECT_REASON_HPD)) {
934
+
if (!dc_link_detect_sink(aconnector->dc_link, &new_connection_type))
935
+
DRM_ERROR("KMS: Failed to detect connector\n");
936
+
937
+
if (aconnector->base.force && new_connection_type == dc_connection_none) {
938
+
emulated_link_detect(aconnector->dc_link);
939
+
940
+
941
+
drm_modeset_lock_all(dev);
942
+
dm_restore_drm_connector_state(dev, connector);
943
+
drm_modeset_unlock_all(dev);
944
+
945
+
if (aconnector->base.force == DRM_FORCE_UNSPECIFIED)
946
+
drm_kms_helper_hotplug_event(dev);
947
+
948
+
} else if (dc_link_detect(aconnector->dc_link, DETECT_REASON_HPD)) {
1024
949
amdgpu_dm_update_connector_after_detect(aconnector);
1025
950
1026
951
···
1134
1031
struct drm_device *dev = connector->dev;
1135
1032
struct dc_link *dc_link = aconnector->dc_link;
1136
1033
bool is_mst_root_connector = aconnector->mst_mgr.mst_state;
1034
+
enum dc_connection_type new_connection_type = dc_connection_none;
1137
1035
1138
1036
/* TODO:Temporary add mutex to protect hpd interrupt not have a gpio
1139
1037
* conflict, after implement i2c helper, this mutex should be
···
1146
1042
if (dc_link_handle_hpd_rx_irq(dc_link, NULL, NULL) &&
1147
1043
!is_mst_root_connector) {
1148
1044
/* Downstream Port status changed. */
1149
-
if (dc_link_detect(dc_link, DETECT_REASON_HPDRX)) {
1045
+
if (!dc_link_detect_sink(dc_link, &new_connection_type))
1046
+
DRM_ERROR("KMS: Failed to detect connector\n");
1047
+
1048
+
if (aconnector->base.force && new_connection_type == dc_connection_none) {
1049
+
emulated_link_detect(dc_link);
1050
+
1051
+
if (aconnector->fake_enable)
1052
+
aconnector->fake_enable = false;
1053
+
1054
+
amdgpu_dm_update_connector_after_detect(aconnector);
1055
+
1056
+
1057
+
drm_modeset_lock_all(dev);
1058
+
dm_restore_drm_connector_state(dev, connector);
1059
+
drm_modeset_unlock_all(dev);
1060
+
1061
+
drm_kms_helper_hotplug_event(dev);
1062
+
} else if (dc_link_detect(dc_link, DETECT_REASON_HPDRX)) {
1150
1063
1151
1064
if (aconnector->fake_enable)
1152
1065
aconnector->fake_enable = false;
···
1554
1433
struct amdgpu_mode_info *mode_info = &adev->mode_info;
1555
1434
uint32_t link_cnt;
1556
1435
int32_t total_overlay_planes, total_primary_planes;
1436
+
enum dc_connection_type new_connection_type = dc_connection_none;
1557
1437
1558
1438
link_cnt = dm->dc->caps.max_links;
1559
1439
if (amdgpu_dm_mode_config_init(dm->adev)) {
···
1621
1499
1622
1500
link = dc_get_link_at_index(dm->dc, i);
1623
1501
1624
-
if (dc_link_detect(link, DETECT_REASON_BOOT)) {
1502
+
if (!dc_link_detect_sink(link, &new_connection_type))
1503
+
DRM_ERROR("KMS: Failed to detect connector\n");
1504
+
1505
+
if (aconnector->base.force && new_connection_type == dc_connection_none) {
1506
+
emulated_link_detect(link);
1507
+
amdgpu_dm_update_connector_after_detect(aconnector);
1508
+
1509
+
} else if (dc_link_detect(link, DETECT_REASON_BOOT)) {
1625
1510
amdgpu_dm_update_connector_after_detect(aconnector);
1626
1511
register_backlight_device(dm, link);
1627
1512
}
···
2623
2494
if (dm_state && dm_state->freesync_capable)
2624
2495
stream->ignore_msa_timing_param = true;
2625
2496
finish:
2626
-
if (sink && sink->sink_signal == SIGNAL_TYPE_VIRTUAL)
2497
+
if (sink && sink->sink_signal == SIGNAL_TYPE_VIRTUAL && aconnector->base.force != DRM_FORCE_ON)
2627
2498
dc_sink_release(sink);
2628
2499
2629
2500
return stream;
+2
-2
drivers/gpu/drm/amd/display/dc/core/dc_link.c
+2
-2
drivers/gpu/drm/amd/display/dc/core/dc_link.c
···
195
195
return result;
196
196
}
197
197
198
-
static bool detect_sink(struct dc_link *link, enum dc_connection_type *type)
198
+
bool dc_link_detect_sink(struct dc_link *link, enum dc_connection_type *type)
199
199
{
200
200
uint32_t is_hpd_high = 0;
201
201
struct gpio *hpd_pin;
···
604
604
if (link->connector_signal == SIGNAL_TYPE_VIRTUAL)
605
605
return false;
606
606
607
-
if (false == detect_sink(link, &new_connection_type)) {
607
+
if (false == dc_link_detect_sink(link, &new_connection_type)) {
608
608
BREAK_TO_DEBUGGER();
609
609
return false;
610
610
}
+1
drivers/gpu/drm/amd/display/dc/dc_link.h
+1
drivers/gpu/drm/amd/display/dc/dc_link.h
+1
-1
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+1
-1
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
-5
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h
-5
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h
···
68
68
const struct dc_state *context,
69
69
struct dm_pp_display_configuration *pp_display_cfg);
70
70
71
-
void dce110_set_bandwidth(
72
-
struct dc *dc,
73
-
struct dc_state *context,
74
-
bool decrease_allowed);
75
-
76
71
uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context);
77
72
78
73
void dp_receiver_power_ctrl(struct dc_link *link, bool on);
-12
drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c
-12
drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c
···
244
244
dh_data->dchub_info_valid = false;
245
245
}
246
246
247
-
static void dce120_set_bandwidth(
248
-
struct dc *dc,
249
-
struct dc_state *context,
250
-
bool decrease_allowed)
251
-
{
252
-
if (context->stream_count <= 0)
253
-
return;
254
-
255
-
dce110_set_bandwidth(dc, context, decrease_allowed);
256
-
}
257
-
258
247
void dce120_hw_sequencer_construct(struct dc *dc)
259
248
{
260
249
/* All registers used by dce11.2 match those in dce11 in offset and
···
252
263
dce110_hw_sequencer_construct(dc);
253
264
dc->hwss.enable_display_power_gating = dce120_enable_display_power_gating;
254
265
dc->hwss.update_dchub = dce120_update_dchub;
255
-
dc->hwss.set_bandwidth = dce120_set_bandwidth;
256
266
}
257
267
+1
drivers/gpu/drm/arm/malidp_drv.c
+1
drivers/gpu/drm/arm/malidp_drv.c
+23
-2
drivers/gpu/drm/arm/malidp_hw.c
+23
-2
drivers/gpu/drm/arm/malidp_hw.c
···
384
384
385
385
static int malidp500_enable_memwrite(struct malidp_hw_device *hwdev,
386
386
dma_addr_t *addrs, s32 *pitches,
387
-
int num_planes, u16 w, u16 h, u32 fmt_id)
387
+
int num_planes, u16 w, u16 h, u32 fmt_id,
388
+
const s16 *rgb2yuv_coeffs)
388
389
{
389
390
u32 base = MALIDP500_SE_MEMWRITE_BASE;
390
391
u32 de_base = malidp_get_block_base(hwdev, MALIDP_DE_BLOCK);
···
417
416
418
417
malidp_hw_write(hwdev, MALIDP_DE_H_ACTIVE(w) | MALIDP_DE_V_ACTIVE(h),
419
418
MALIDP500_SE_MEMWRITE_OUT_SIZE);
419
+
420
+
if (rgb2yuv_coeffs) {
421
+
int i;
422
+
423
+
for (i = 0; i < MALIDP_COLORADJ_NUM_COEFFS; i++) {
424
+
malidp_hw_write(hwdev, rgb2yuv_coeffs[i],
425
+
MALIDP500_SE_RGB_YUV_COEFFS + i * 4);
426
+
}
427
+
}
428
+
420
429
malidp_hw_setbits(hwdev, MALIDP_SE_MEMWRITE_EN, MALIDP500_SE_CONTROL);
421
430
422
431
return 0;
···
669
658
670
659
static int malidp550_enable_memwrite(struct malidp_hw_device *hwdev,
671
660
dma_addr_t *addrs, s32 *pitches,
672
-
int num_planes, u16 w, u16 h, u32 fmt_id)
661
+
int num_planes, u16 w, u16 h, u32 fmt_id,
662
+
const s16 *rgb2yuv_coeffs)
673
663
{
674
664
u32 base = MALIDP550_SE_MEMWRITE_BASE;
675
665
u32 de_base = malidp_get_block_base(hwdev, MALIDP_DE_BLOCK);
···
700
688
MALIDP550_SE_MEMWRITE_OUT_SIZE);
701
689
malidp_hw_setbits(hwdev, MALIDP550_SE_MEMWRITE_ONESHOT | MALIDP_SE_MEMWRITE_EN,
702
690
MALIDP550_SE_CONTROL);
691
+
692
+
if (rgb2yuv_coeffs) {
693
+
int i;
694
+
695
+
for (i = 0; i < MALIDP_COLORADJ_NUM_COEFFS; i++) {
696
+
malidp_hw_write(hwdev, rgb2yuv_coeffs[i],
697
+
MALIDP550_SE_RGB_YUV_COEFFS + i * 4);
698
+
}
699
+
}
703
700
704
701
return 0;
705
702
}
+2
-1
drivers/gpu/drm/arm/malidp_hw.h
+2
-1
drivers/gpu/drm/arm/malidp_hw.h
···
191
191
* @param fmt_id - internal format ID of output buffer
192
192
*/
193
193
int (*enable_memwrite)(struct malidp_hw_device *hwdev, dma_addr_t *addrs,
194
-
s32 *pitches, int num_planes, u16 w, u16 h, u32 fmt_id);
194
+
s32 *pitches, int num_planes, u16 w, u16 h, u32 fmt_id,
195
+
const s16 *rgb2yuv_coeffs);
195
196
196
197
/*
197
198
* Disable the writing to memory of the next frame's content.
+21
-4
drivers/gpu/drm/arm/malidp_mw.c
+21
-4
drivers/gpu/drm/arm/malidp_mw.c
···
26
26
s32 pitches[2];
27
27
u8 format;
28
28
u8 n_planes;
29
+
bool rgb2yuv_initialized;
30
+
const s16 *rgb2yuv_coeffs;
29
31
};
30
32
31
33
static int malidp_mw_connector_get_modes(struct drm_connector *connector)
···
86
84
static struct drm_connector_state *
87
85
malidp_mw_connector_duplicate_state(struct drm_connector *connector)
88
86
{
89
-
struct malidp_mw_connector_state *mw_state;
87
+
struct malidp_mw_connector_state *mw_state, *mw_current_state;
90
88
91
89
if (WARN_ON(!connector->state))
92
90
return NULL;
···
95
93
if (!mw_state)
96
94
return NULL;
97
95
98
-
/* No need to preserve any of our driver-local data */
96
+
mw_current_state = to_mw_state(connector->state);
97
+
mw_state->rgb2yuv_coeffs = mw_current_state->rgb2yuv_coeffs;
98
+
mw_state->rgb2yuv_initialized = mw_current_state->rgb2yuv_initialized;
99
+
99
100
__drm_atomic_helper_connector_duplicate_state(connector, &mw_state->base);
100
101
101
102
return &mw_state->base;
···
111
106
.destroy = malidp_mw_connector_destroy,
112
107
.atomic_duplicate_state = malidp_mw_connector_duplicate_state,
113
108
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
109
+
};
110
+
111
+
static const s16 rgb2yuv_coeffs_bt709_limited[MALIDP_COLORADJ_NUM_COEFFS] = {
112
+
47, 157, 16,
113
+
-26, -87, 112,
114
+
112, -102, -10,
115
+
16, 128, 128
114
116
};
115
117
116
118
static int
···
168
156
mw_state->addrs[i] = obj->paddr + fb->offsets[i];
169
157
}
170
158
mw_state->n_planes = n_planes;
159
+
160
+
if (fb->format->is_yuv)
161
+
mw_state->rgb2yuv_coeffs = rgb2yuv_coeffs_bt709_limited;
171
162
172
163
return 0;
173
164
}
···
254
239
255
240
drm_writeback_queue_job(mw_conn, conn_state->writeback_job);
256
241
conn_state->writeback_job = NULL;
257
-
258
242
hwdev->hw->enable_memwrite(hwdev, mw_state->addrs,
259
243
mw_state->pitches, mw_state->n_planes,
260
-
fb->width, fb->height, mw_state->format);
244
+
fb->width, fb->height, mw_state->format,
245
+
!mw_state->rgb2yuv_initialized ?
246
+
mw_state->rgb2yuv_coeffs : NULL);
247
+
mw_state->rgb2yuv_initialized = !!mw_state->rgb2yuv_coeffs;
261
248
} else {
262
249
DRM_DEV_DEBUG_DRIVER(drm->dev, "Disable memwrite\n");
263
250
hwdev->hw->disable_memwrite(hwdev);
+2
drivers/gpu/drm/arm/malidp_regs.h
+2
drivers/gpu/drm/arm/malidp_regs.h
···
205
205
#define MALIDP500_SE_BASE 0x00c00
206
206
#define MALIDP500_SE_CONTROL 0x00c0c
207
207
#define MALIDP500_SE_MEMWRITE_OUT_SIZE 0x00c2c
208
+
#define MALIDP500_SE_RGB_YUV_COEFFS 0x00C74
208
209
#define MALIDP500_SE_MEMWRITE_BASE 0x00e00
209
210
#define MALIDP500_DC_IRQ_BASE 0x00f00
210
211
#define MALIDP500_CONFIG_VALID 0x00f00
···
239
238
#define MALIDP550_SE_CONTROL 0x08010
240
239
#define MALIDP550_SE_MEMWRITE_ONESHOT (1 << 7)
241
240
#define MALIDP550_SE_MEMWRITE_OUT_SIZE 0x08030
241
+
#define MALIDP550_SE_RGB_YUV_COEFFS 0x08078
242
242
#define MALIDP550_SE_MEMWRITE_BASE 0x08100
243
243
#define MALIDP550_DC_BASE 0x0c000
244
244
#define MALIDP550_DC_CONTROL 0x0c010
-10
drivers/gpu/drm/drm_panel.c
-10
drivers/gpu/drm/drm_panel.c
···
24
24
#include <linux/err.h>
25
25
#include <linux/module.h>
26
26
27
-
#include <drm/drm_device.h>
28
27
#include <drm/drm_crtc.h>
29
28
#include <drm/drm_panel.h>
30
29
···
104
105
if (panel->connector)
105
106
return -EBUSY;
106
107
107
-
panel->link = device_link_add(connector->dev->dev, panel->dev, 0);
108
-
if (!panel->link) {
109
-
dev_err(panel->dev, "failed to link panel to %s\n",
110
-
dev_name(connector->dev->dev));
111
-
return -EINVAL;
112
-
}
113
-
114
108
panel->connector = connector;
115
109
panel->drm = connector->dev;
116
110
···
125
133
*/
126
134
int drm_panel_detach(struct drm_panel *panel)
127
135
{
128
-
device_link_del(panel->link);
129
-
130
136
panel->connector = NULL;
131
137
panel->drm = NULL;
132
138
+5
drivers/gpu/drm/drm_syncobj.c
+5
drivers/gpu/drm/drm_syncobj.c
···
97
97
{
98
98
int ret;
99
99
100
+
WARN_ON(*fence);
101
+
100
102
*fence = drm_syncobj_fence_get(syncobj);
101
103
if (*fence)
102
104
return 1;
···
745
743
746
744
if (flags & DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT) {
747
745
for (i = 0; i < count; ++i) {
746
+
if (entries[i].fence)
747
+
continue;
748
+
748
749
drm_syncobj_fence_get_or_add_callback(syncobjs[i],
749
750
&entries[i].fence,
750
751
&entries[i].syncobj_cb,