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arm64: Convert ID_AA64MMFR0_EL1.TGRAN{4,16,64}_2 to UnsignedEnum

ID_AA64MMFR0_EL1.TGRAN{4,16,64}_2 are currently represented as unordered
enumerations. However, the architecture treats them as Unsigned,
as hinted to by the MRS data:

(FEAT_S2TGran4K <=> (((UInt(ID_AA64MMFR0_EL1.TGran4_2) == 0) &&
FEAT_TGran4K) ||
(UInt(ID_AA64MMFR0_EL1.TGran4_2) >= 2))))

and similar descriptions exist for 16 and 64k.

This is also confirmed by D24.1.3.3 ("Alternative ID scheme used for
ID_AA64MMFR0_EL1 stage 2 granule sizes") in the L.b revision of
the ARM ARM.

Turn these fields into UnsignedEnum so that we can use the above
description more or less literally.

Reviewed-by: Fuad Tabba <tabba@google.com>
Tested-by: Fuad Tabba <tabba@google.com>
Link: https://patch.msgid.link/20251210173024.561160-3-maz@kernel.org
Signed-off-by: Marc Zyngier <maz@kernel.org>

Marc Zyngier f1640174 a98cd5c2

+3 -3
+3 -3
arch/arm64/tools/sysreg
··· 2098 2098 0b0000 NI 2099 2099 0b0001 IMP 2100 2100 EndEnum 2101 - Enum 43:40 TGRAN4_2 2101 + UnsignedEnum 43:40 TGRAN4_2 2102 2102 0b0000 TGRAN4 2103 2103 0b0001 NI 2104 2104 0b0010 IMP 2105 2105 0b0011 52_BIT 2106 2106 EndEnum 2107 - Enum 39:36 TGRAN64_2 2107 + UnsignedEnum 39:36 TGRAN64_2 2108 2108 0b0000 TGRAN64 2109 2109 0b0001 NI 2110 2110 0b0010 IMP 2111 2111 EndEnum 2112 - Enum 35:32 TGRAN16_2 2112 + UnsignedEnum 35:32 TGRAN16_2 2113 2113 0b0000 TGRAN16 2114 2114 0b0001 NI 2115 2115 0b0010 IMP