tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/amdgpu/vcn: set no_user_fence for VCN v3.0 enc/dec rings

VCN encoder and decoder rings do not support 64-bit user fence writes,
reject CS submissions with user fences.

Fixes: cf14826cdfb5 ("drm/amdgpu: add VCN3.0 support for Sienna_Cichlid")
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Yinjie Yao <yinjie.yao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 663bed3c7b8b9a7624b0d95d300ddae034ad0614)

authored by

Yinjie Yao and committed by
Alex Deucher f1e5a666 4f317863

+3
+3
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
··· 1856 1856 .type = AMDGPU_RING_TYPE_VCN_DEC, 1857 1857 .align_mask = 0x3f, 1858 1858 .nop = VCN_DEC_SW_CMD_NO_OP, 1859 + .no_user_fence = true, 1859 1860 .secure_submission_supported = true, 1860 1861 .get_rptr = vcn_v3_0_dec_ring_get_rptr, 1861 1862 .get_wptr = vcn_v3_0_dec_ring_get_wptr, ··· 2037 2036 static const struct amdgpu_ring_funcs vcn_v3_0_dec_ring_vm_funcs = { 2038 2037 .type = AMDGPU_RING_TYPE_VCN_DEC, 2039 2038 .align_mask = 0xf, 2039 + .no_user_fence = true, 2040 2040 .secure_submission_supported = true, 2041 2041 .get_rptr = vcn_v3_0_dec_ring_get_rptr, 2042 2042 .get_wptr = vcn_v3_0_dec_ring_get_wptr, ··· 2140 2138 .type = AMDGPU_RING_TYPE_VCN_ENC, 2141 2139 .align_mask = 0x3f, 2142 2140 .nop = VCN_ENC_CMD_NO_OP, 2141 + .no_user_fence = true, 2143 2142 .get_rptr = vcn_v3_0_enc_ring_get_rptr, 2144 2143 .get_wptr = vcn_v3_0_enc_ring_get_wptr, 2145 2144 .set_wptr = vcn_v3_0_enc_ring_set_wptr,