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Merge tag 'mmc-v4.17-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc

Pull MMC fixes from Ulf Hansson:
"MMC core:
- Propagate correct error code for RPMB requests

MMC host:
- sdhci-iproc: Drop hard coded cap for 1.8v
- sdhci-iproc: Fix 32bit writes for transfer mode
- sdhci-iproc: Enable SDHCI_QUIRK2_HOST_OFF_CARD_ON for cygnus"

* tag 'mmc-v4.17-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc:
mmc: sdhci-iproc: add SDHCI_QUIRK2_HOST_OFF_CARD_ON for cygnus
mmc: sdhci-iproc: fix 32bit writes for TRANSFER_MODE register
mmc: sdhci-iproc: remove hard coded mmc cap 1.8v
mmc: block: propagate correct returned value in mmc_rpmb_ioctl

+27 -8
+1 -1
drivers/mmc/core/block.c
··· 2485 2485 break; 2486 2486 } 2487 2487 2488 - return 0; 2488 + return ret; 2489 2489 } 2490 2490 2491 2491 #ifdef CONFIG_COMPAT
+26 -7
drivers/mmc/host/sdhci-iproc.c
··· 33 33 const struct sdhci_iproc_data *data; 34 34 u32 shadow_cmd; 35 35 u32 shadow_blk; 36 + bool is_cmd_shadowed; 37 + bool is_blk_shadowed; 36 38 }; 37 39 38 40 #define REG_OFFSET_IN_BITS(reg) ((reg) << 3 & 0x18) ··· 50 48 51 49 static u16 sdhci_iproc_readw(struct sdhci_host *host, int reg) 52 50 { 53 - u32 val = sdhci_iproc_readl(host, (reg & ~3)); 54 - u16 word = val >> REG_OFFSET_IN_BITS(reg) & 0xffff; 51 + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 52 + struct sdhci_iproc_host *iproc_host = sdhci_pltfm_priv(pltfm_host); 53 + u32 val; 54 + u16 word; 55 + 56 + if ((reg == SDHCI_TRANSFER_MODE) && iproc_host->is_cmd_shadowed) { 57 + /* Get the saved transfer mode */ 58 + val = iproc_host->shadow_cmd; 59 + } else if ((reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) && 60 + iproc_host->is_blk_shadowed) { 61 + /* Get the saved block info */ 62 + val = iproc_host->shadow_blk; 63 + } else { 64 + val = sdhci_iproc_readl(host, (reg & ~3)); 65 + } 66 + word = val >> REG_OFFSET_IN_BITS(reg) & 0xffff; 55 67 return word; 56 68 } 57 69 ··· 121 105 122 106 if (reg == SDHCI_COMMAND) { 123 107 /* Write the block now as we are issuing a command */ 124 - if (iproc_host->shadow_blk != 0) { 108 + if (iproc_host->is_blk_shadowed) { 125 109 sdhci_iproc_writel(host, iproc_host->shadow_blk, 126 110 SDHCI_BLOCK_SIZE); 127 - iproc_host->shadow_blk = 0; 111 + iproc_host->is_blk_shadowed = false; 128 112 } 129 113 oldval = iproc_host->shadow_cmd; 130 - } else if (reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) { 114 + iproc_host->is_cmd_shadowed = false; 115 + } else if ((reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) && 116 + iproc_host->is_blk_shadowed) { 131 117 /* Block size and count are stored in shadow reg */ 132 118 oldval = iproc_host->shadow_blk; 133 119 } else { ··· 141 123 if (reg == SDHCI_TRANSFER_MODE) { 142 124 /* Save the transfer mode until the command is issued */ 143 125 iproc_host->shadow_cmd = newval; 126 + iproc_host->is_cmd_shadowed = true; 144 127 } else if (reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) { 145 128 /* Save the block info until the command is issued */ 146 129 iproc_host->shadow_blk = newval; 130 + iproc_host->is_blk_shadowed = true; 147 131 } else { 148 132 /* Command or other regular 32-bit write */ 149 133 sdhci_iproc_writel(host, newval, reg & ~3); ··· 186 166 187 167 static const struct sdhci_pltfm_data sdhci_iproc_cygnus_pltfm_data = { 188 168 .quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK, 189 - .quirks2 = SDHCI_QUIRK2_ACMD23_BROKEN, 169 + .quirks2 = SDHCI_QUIRK2_ACMD23_BROKEN | SDHCI_QUIRK2_HOST_OFF_CARD_ON, 190 170 .ops = &sdhci_iproc_32only_ops, 191 171 }; 192 172 ··· 226 206 .caps1 = SDHCI_DRIVER_TYPE_C | 227 207 SDHCI_DRIVER_TYPE_D | 228 208 SDHCI_SUPPORT_DDR50, 229 - .mmc_caps = MMC_CAP_1_8V_DDR, 230 209 }; 231 210 232 211 static const struct sdhci_pltfm_data sdhci_bcm2835_pltfm_data = {